atmel_serial.c 47 KB

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  1. /*
  2. * Driver for Atmel AT91 / AT32 Serial ports
  3. * Copyright (C) 2003 Rick Bronson
  4. *
  5. * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
  6. * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
  7. *
  8. * DMA support added by Chip Coldwell.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  23. *
  24. */
  25. #include <linux/module.h>
  26. #include <linux/tty.h>
  27. #include <linux/ioport.h>
  28. #include <linux/slab.h>
  29. #include <linux/init.h>
  30. #include <linux/serial.h>
  31. #include <linux/clk.h>
  32. #include <linux/console.h>
  33. #include <linux/sysrq.h>
  34. #include <linux/tty_flip.h>
  35. #include <linux/platform_device.h>
  36. #include <linux/of.h>
  37. #include <linux/of_device.h>
  38. #include <linux/dma-mapping.h>
  39. #include <linux/atmel_pdc.h>
  40. #include <linux/atmel_serial.h>
  41. #include <linux/uaccess.h>
  42. #include <linux/pinctrl/consumer.h>
  43. #include <linux/platform_data/atmel.h>
  44. #include <asm/io.h>
  45. #include <asm/ioctls.h>
  46. #ifdef CONFIG_ARM
  47. #include <mach/cpu.h>
  48. #include <asm/gpio.h>
  49. #endif
  50. #define PDC_BUFFER_SIZE 512
  51. /* Revisit: We should calculate this based on the actual port settings */
  52. #define PDC_RX_TIMEOUT (3 * 10) /* 3 bytes */
  53. #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  54. #define SUPPORT_SYSRQ
  55. #endif
  56. #include <linux/serial_core.h>
  57. static void atmel_start_rx(struct uart_port *port);
  58. static void atmel_stop_rx(struct uart_port *port);
  59. #ifdef CONFIG_SERIAL_ATMEL_TTYAT
  60. /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
  61. * should coexist with the 8250 driver, such as if we have an external 16C550
  62. * UART. */
  63. #define SERIAL_ATMEL_MAJOR 204
  64. #define MINOR_START 154
  65. #define ATMEL_DEVICENAME "ttyAT"
  66. #else
  67. /* Use device name ttyS, major 4, minor 64-68. This is the usual serial port
  68. * name, but it is legally reserved for the 8250 driver. */
  69. #define SERIAL_ATMEL_MAJOR TTY_MAJOR
  70. #define MINOR_START 64
  71. #define ATMEL_DEVICENAME "ttyS"
  72. #endif
  73. #define ATMEL_ISR_PASS_LIMIT 256
  74. /* UART registers. CR is write-only, hence no GET macro */
  75. #define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR)
  76. #define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR)
  77. #define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR)
  78. #define UART_PUT_IER(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IER)
  79. #define UART_PUT_IDR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IDR)
  80. #define UART_GET_IMR(port) __raw_readl((port)->membase + ATMEL_US_IMR)
  81. #define UART_GET_CSR(port) __raw_readl((port)->membase + ATMEL_US_CSR)
  82. #define UART_GET_CHAR(port) __raw_readl((port)->membase + ATMEL_US_RHR)
  83. #define UART_PUT_CHAR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_THR)
  84. #define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR)
  85. #define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR)
  86. #define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR)
  87. #define UART_PUT_TTGR(port, v) __raw_writel(v, (port)->membase + ATMEL_US_TTGR)
  88. /* PDC registers */
  89. #define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
  90. #define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR)
  91. #define UART_PUT_RPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RPR)
  92. #define UART_GET_RPR(port) __raw_readl((port)->membase + ATMEL_PDC_RPR)
  93. #define UART_PUT_RCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RCR)
  94. #define UART_PUT_RNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNPR)
  95. #define UART_PUT_RNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNCR)
  96. #define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR)
  97. #define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR)
  98. #define UART_GET_TCR(port) __raw_readl((port)->membase + ATMEL_PDC_TCR)
  99. static int (*atmel_open_hook)(struct uart_port *);
  100. static void (*atmel_close_hook)(struct uart_port *);
  101. struct atmel_dma_buffer {
  102. unsigned char *buf;
  103. dma_addr_t dma_addr;
  104. unsigned int dma_size;
  105. unsigned int ofs;
  106. };
  107. struct atmel_uart_char {
  108. u16 status;
  109. u16 ch;
  110. };
  111. #define ATMEL_SERIAL_RINGSIZE 1024
  112. /*
  113. * We wrap our port structure around the generic uart_port.
  114. */
  115. struct atmel_uart_port {
  116. struct uart_port uart; /* uart */
  117. struct clk *clk; /* uart clock */
  118. int may_wakeup; /* cached value of device_may_wakeup for times we need to disable it */
  119. u32 backup_imr; /* IMR saved during suspend */
  120. int break_active; /* break being received */
  121. short use_dma_rx; /* enable PDC receiver */
  122. short pdc_rx_idx; /* current PDC RX buffer */
  123. struct atmel_dma_buffer pdc_rx[2]; /* PDC receier */
  124. short use_dma_tx; /* enable PDC transmitter */
  125. struct atmel_dma_buffer pdc_tx; /* PDC transmitter */
  126. struct tasklet_struct tasklet;
  127. unsigned int irq_status;
  128. unsigned int irq_status_prev;
  129. struct circ_buf rx_ring;
  130. struct serial_rs485 rs485; /* rs485 settings */
  131. unsigned int tx_done_mask;
  132. };
  133. static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
  134. static unsigned long atmel_ports_in_use;
  135. #ifdef SUPPORT_SYSRQ
  136. static struct console atmel_console;
  137. #endif
  138. #if defined(CONFIG_OF)
  139. static const struct of_device_id atmel_serial_dt_ids[] = {
  140. { .compatible = "atmel,at91rm9200-usart" },
  141. { .compatible = "atmel,at91sam9260-usart" },
  142. { /* sentinel */ }
  143. };
  144. MODULE_DEVICE_TABLE(of, atmel_serial_dt_ids);
  145. #endif
  146. static inline struct atmel_uart_port *
  147. to_atmel_uart_port(struct uart_port *uart)
  148. {
  149. return container_of(uart, struct atmel_uart_port, uart);
  150. }
  151. #ifdef CONFIG_SERIAL_ATMEL_PDC
  152. static bool atmel_use_dma_rx(struct uart_port *port)
  153. {
  154. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  155. return atmel_port->use_dma_rx;
  156. }
  157. static bool atmel_use_dma_tx(struct uart_port *port)
  158. {
  159. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  160. return atmel_port->use_dma_tx;
  161. }
  162. #else
  163. static bool atmel_use_dma_rx(struct uart_port *port)
  164. {
  165. return false;
  166. }
  167. static bool atmel_use_dma_tx(struct uart_port *port)
  168. {
  169. return false;
  170. }
  171. #endif
  172. /* Enable or disable the rs485 support */
  173. void atmel_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf)
  174. {
  175. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  176. unsigned int mode;
  177. unsigned long flags;
  178. spin_lock_irqsave(&port->lock, flags);
  179. /* Disable interrupts */
  180. UART_PUT_IDR(port, atmel_port->tx_done_mask);
  181. mode = UART_GET_MR(port);
  182. /* Resetting serial mode to RS232 (0x0) */
  183. mode &= ~ATMEL_US_USMODE;
  184. atmel_port->rs485 = *rs485conf;
  185. if (rs485conf->flags & SER_RS485_ENABLED) {
  186. dev_dbg(port->dev, "Setting UART to RS485\n");
  187. atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
  188. if ((rs485conf->delay_rts_after_send) > 0)
  189. UART_PUT_TTGR(port, rs485conf->delay_rts_after_send);
  190. mode |= ATMEL_US_USMODE_RS485;
  191. } else {
  192. dev_dbg(port->dev, "Setting UART to RS232\n");
  193. if (atmel_use_dma_tx(port))
  194. atmel_port->tx_done_mask = ATMEL_US_ENDTX |
  195. ATMEL_US_TXBUFE;
  196. else
  197. atmel_port->tx_done_mask = ATMEL_US_TXRDY;
  198. }
  199. UART_PUT_MR(port, mode);
  200. /* Enable interrupts */
  201. UART_PUT_IER(port, atmel_port->tx_done_mask);
  202. spin_unlock_irqrestore(&port->lock, flags);
  203. }
  204. /*
  205. * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
  206. */
  207. static u_int atmel_tx_empty(struct uart_port *port)
  208. {
  209. return (UART_GET_CSR(port) & ATMEL_US_TXEMPTY) ? TIOCSER_TEMT : 0;
  210. }
  211. /*
  212. * Set state of the modem control output lines
  213. */
  214. static void atmel_set_mctrl(struct uart_port *port, u_int mctrl)
  215. {
  216. unsigned int control = 0;
  217. unsigned int mode;
  218. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  219. #ifdef CONFIG_ARCH_AT91RM9200
  220. if (cpu_is_at91rm9200()) {
  221. /*
  222. * AT91RM9200 Errata #39: RTS0 is not internally connected
  223. * to PA21. We need to drive the pin manually.
  224. */
  225. if (port->mapbase == AT91RM9200_BASE_US0) {
  226. if (mctrl & TIOCM_RTS)
  227. at91_set_gpio_value(AT91_PIN_PA21, 0);
  228. else
  229. at91_set_gpio_value(AT91_PIN_PA21, 1);
  230. }
  231. }
  232. #endif
  233. if (mctrl & TIOCM_RTS)
  234. control |= ATMEL_US_RTSEN;
  235. else
  236. control |= ATMEL_US_RTSDIS;
  237. if (mctrl & TIOCM_DTR)
  238. control |= ATMEL_US_DTREN;
  239. else
  240. control |= ATMEL_US_DTRDIS;
  241. UART_PUT_CR(port, control);
  242. /* Local loopback mode? */
  243. mode = UART_GET_MR(port) & ~ATMEL_US_CHMODE;
  244. if (mctrl & TIOCM_LOOP)
  245. mode |= ATMEL_US_CHMODE_LOC_LOOP;
  246. else
  247. mode |= ATMEL_US_CHMODE_NORMAL;
  248. /* Resetting serial mode to RS232 (0x0) */
  249. mode &= ~ATMEL_US_USMODE;
  250. if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
  251. dev_dbg(port->dev, "Setting UART to RS485\n");
  252. if ((atmel_port->rs485.delay_rts_after_send) > 0)
  253. UART_PUT_TTGR(port,
  254. atmel_port->rs485.delay_rts_after_send);
  255. mode |= ATMEL_US_USMODE_RS485;
  256. } else {
  257. dev_dbg(port->dev, "Setting UART to RS232\n");
  258. }
  259. UART_PUT_MR(port, mode);
  260. }
  261. /*
  262. * Get state of the modem control input lines
  263. */
  264. static u_int atmel_get_mctrl(struct uart_port *port)
  265. {
  266. unsigned int status, ret = 0;
  267. status = UART_GET_CSR(port);
  268. /*
  269. * The control signals are active low.
  270. */
  271. if (!(status & ATMEL_US_DCD))
  272. ret |= TIOCM_CD;
  273. if (!(status & ATMEL_US_CTS))
  274. ret |= TIOCM_CTS;
  275. if (!(status & ATMEL_US_DSR))
  276. ret |= TIOCM_DSR;
  277. if (!(status & ATMEL_US_RI))
  278. ret |= TIOCM_RI;
  279. return ret;
  280. }
  281. /*
  282. * Stop transmitting.
  283. */
  284. static void atmel_stop_tx(struct uart_port *port)
  285. {
  286. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  287. if (atmel_use_dma_tx(port)) {
  288. /* disable PDC transmit */
  289. UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
  290. }
  291. /* Disable interrupts */
  292. UART_PUT_IDR(port, atmel_port->tx_done_mask);
  293. if ((atmel_port->rs485.flags & SER_RS485_ENABLED) &&
  294. !(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX))
  295. atmel_start_rx(port);
  296. }
  297. /*
  298. * Start transmitting.
  299. */
  300. static void atmel_start_tx(struct uart_port *port)
  301. {
  302. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  303. if (atmel_use_dma_tx(port)) {
  304. if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN)
  305. /* The transmitter is already running. Yes, we
  306. really need this.*/
  307. return;
  308. if ((atmel_port->rs485.flags & SER_RS485_ENABLED) &&
  309. !(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX))
  310. atmel_stop_rx(port);
  311. /* re-enable PDC transmit */
  312. UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
  313. }
  314. /* Enable interrupts */
  315. UART_PUT_IER(port, atmel_port->tx_done_mask);
  316. }
  317. /*
  318. * start receiving - port is in process of being opened.
  319. */
  320. static void atmel_start_rx(struct uart_port *port)
  321. {
  322. UART_PUT_CR(port, ATMEL_US_RSTSTA); /* reset status and receiver */
  323. UART_PUT_CR(port, ATMEL_US_RXEN);
  324. if (atmel_use_dma_rx(port)) {
  325. /* enable PDC controller */
  326. UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
  327. port->read_status_mask);
  328. UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
  329. } else {
  330. UART_PUT_IER(port, ATMEL_US_RXRDY);
  331. }
  332. }
  333. /*
  334. * Stop receiving - port is in process of being closed.
  335. */
  336. static void atmel_stop_rx(struct uart_port *port)
  337. {
  338. UART_PUT_CR(port, ATMEL_US_RXDIS);
  339. if (atmel_use_dma_rx(port)) {
  340. /* disable PDC receive */
  341. UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS);
  342. UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
  343. port->read_status_mask);
  344. } else {
  345. UART_PUT_IDR(port, ATMEL_US_RXRDY);
  346. }
  347. }
  348. /*
  349. * Enable modem status interrupts
  350. */
  351. static void atmel_enable_ms(struct uart_port *port)
  352. {
  353. UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC
  354. | ATMEL_US_DCDIC | ATMEL_US_CTSIC);
  355. }
  356. /*
  357. * Control the transmission of a break signal
  358. */
  359. static void atmel_break_ctl(struct uart_port *port, int break_state)
  360. {
  361. if (break_state != 0)
  362. UART_PUT_CR(port, ATMEL_US_STTBRK); /* start break */
  363. else
  364. UART_PUT_CR(port, ATMEL_US_STPBRK); /* stop break */
  365. }
  366. /*
  367. * Stores the incoming character in the ring buffer
  368. */
  369. static void
  370. atmel_buffer_rx_char(struct uart_port *port, unsigned int status,
  371. unsigned int ch)
  372. {
  373. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  374. struct circ_buf *ring = &atmel_port->rx_ring;
  375. struct atmel_uart_char *c;
  376. if (!CIRC_SPACE(ring->head, ring->tail, ATMEL_SERIAL_RINGSIZE))
  377. /* Buffer overflow, ignore char */
  378. return;
  379. c = &((struct atmel_uart_char *)ring->buf)[ring->head];
  380. c->status = status;
  381. c->ch = ch;
  382. /* Make sure the character is stored before we update head. */
  383. smp_wmb();
  384. ring->head = (ring->head + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
  385. }
  386. /*
  387. * Deal with parity, framing and overrun errors.
  388. */
  389. static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status)
  390. {
  391. /* clear error */
  392. UART_PUT_CR(port, ATMEL_US_RSTSTA);
  393. if (status & ATMEL_US_RXBRK) {
  394. /* ignore side-effect */
  395. status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
  396. port->icount.brk++;
  397. }
  398. if (status & ATMEL_US_PARE)
  399. port->icount.parity++;
  400. if (status & ATMEL_US_FRAME)
  401. port->icount.frame++;
  402. if (status & ATMEL_US_OVRE)
  403. port->icount.overrun++;
  404. }
  405. /*
  406. * Characters received (called from interrupt handler)
  407. */
  408. static void atmel_rx_chars(struct uart_port *port)
  409. {
  410. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  411. unsigned int status, ch;
  412. status = UART_GET_CSR(port);
  413. while (status & ATMEL_US_RXRDY) {
  414. ch = UART_GET_CHAR(port);
  415. /*
  416. * note that the error handling code is
  417. * out of the main execution path
  418. */
  419. if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
  420. | ATMEL_US_OVRE | ATMEL_US_RXBRK)
  421. || atmel_port->break_active)) {
  422. /* clear error */
  423. UART_PUT_CR(port, ATMEL_US_RSTSTA);
  424. if (status & ATMEL_US_RXBRK
  425. && !atmel_port->break_active) {
  426. atmel_port->break_active = 1;
  427. UART_PUT_IER(port, ATMEL_US_RXBRK);
  428. } else {
  429. /*
  430. * This is either the end-of-break
  431. * condition or we've received at
  432. * least one character without RXBRK
  433. * being set. In both cases, the next
  434. * RXBRK will indicate start-of-break.
  435. */
  436. UART_PUT_IDR(port, ATMEL_US_RXBRK);
  437. status &= ~ATMEL_US_RXBRK;
  438. atmel_port->break_active = 0;
  439. }
  440. }
  441. atmel_buffer_rx_char(port, status, ch);
  442. status = UART_GET_CSR(port);
  443. }
  444. tasklet_schedule(&atmel_port->tasklet);
  445. }
  446. /*
  447. * Transmit characters (called from tasklet with TXRDY interrupt
  448. * disabled)
  449. */
  450. static void atmel_tx_chars(struct uart_port *port)
  451. {
  452. struct circ_buf *xmit = &port->state->xmit;
  453. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  454. if (port->x_char && UART_GET_CSR(port) & atmel_port->tx_done_mask) {
  455. UART_PUT_CHAR(port, port->x_char);
  456. port->icount.tx++;
  457. port->x_char = 0;
  458. }
  459. if (uart_circ_empty(xmit) || uart_tx_stopped(port))
  460. return;
  461. while (UART_GET_CSR(port) & atmel_port->tx_done_mask) {
  462. UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
  463. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  464. port->icount.tx++;
  465. if (uart_circ_empty(xmit))
  466. break;
  467. }
  468. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  469. uart_write_wakeup(port);
  470. if (!uart_circ_empty(xmit))
  471. /* Enable interrupts */
  472. UART_PUT_IER(port, atmel_port->tx_done_mask);
  473. }
  474. /*
  475. * receive interrupt handler.
  476. */
  477. static void
  478. atmel_handle_receive(struct uart_port *port, unsigned int pending)
  479. {
  480. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  481. if (atmel_use_dma_rx(port)) {
  482. /*
  483. * PDC receive. Just schedule the tasklet and let it
  484. * figure out the details.
  485. *
  486. * TODO: We're not handling error flags correctly at
  487. * the moment.
  488. */
  489. if (pending & (ATMEL_US_ENDRX | ATMEL_US_TIMEOUT)) {
  490. UART_PUT_IDR(port, (ATMEL_US_ENDRX
  491. | ATMEL_US_TIMEOUT));
  492. tasklet_schedule(&atmel_port->tasklet);
  493. }
  494. if (pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE |
  495. ATMEL_US_FRAME | ATMEL_US_PARE))
  496. atmel_pdc_rxerr(port, pending);
  497. }
  498. /* Interrupt receive */
  499. if (pending & ATMEL_US_RXRDY)
  500. atmel_rx_chars(port);
  501. else if (pending & ATMEL_US_RXBRK) {
  502. /*
  503. * End of break detected. If it came along with a
  504. * character, atmel_rx_chars will handle it.
  505. */
  506. UART_PUT_CR(port, ATMEL_US_RSTSTA);
  507. UART_PUT_IDR(port, ATMEL_US_RXBRK);
  508. atmel_port->break_active = 0;
  509. }
  510. }
  511. /*
  512. * transmit interrupt handler. (Transmit is IRQF_NODELAY safe)
  513. */
  514. static void
  515. atmel_handle_transmit(struct uart_port *port, unsigned int pending)
  516. {
  517. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  518. if (pending & atmel_port->tx_done_mask) {
  519. /* Either PDC or interrupt transmission */
  520. UART_PUT_IDR(port, atmel_port->tx_done_mask);
  521. tasklet_schedule(&atmel_port->tasklet);
  522. }
  523. }
  524. /*
  525. * status flags interrupt handler.
  526. */
  527. static void
  528. atmel_handle_status(struct uart_port *port, unsigned int pending,
  529. unsigned int status)
  530. {
  531. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  532. if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC
  533. | ATMEL_US_CTSIC)) {
  534. atmel_port->irq_status = status;
  535. tasklet_schedule(&atmel_port->tasklet);
  536. }
  537. }
  538. /*
  539. * Interrupt handler
  540. */
  541. static irqreturn_t atmel_interrupt(int irq, void *dev_id)
  542. {
  543. struct uart_port *port = dev_id;
  544. unsigned int status, pending, pass_counter = 0;
  545. do {
  546. status = UART_GET_CSR(port);
  547. pending = status & UART_GET_IMR(port);
  548. if (!pending)
  549. break;
  550. atmel_handle_receive(port, pending);
  551. atmel_handle_status(port, pending, status);
  552. atmel_handle_transmit(port, pending);
  553. } while (pass_counter++ < ATMEL_ISR_PASS_LIMIT);
  554. return pass_counter ? IRQ_HANDLED : IRQ_NONE;
  555. }
  556. /*
  557. * Called from tasklet with ENDTX and TXBUFE interrupts disabled.
  558. */
  559. static void atmel_tx_dma(struct uart_port *port)
  560. {
  561. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  562. struct circ_buf *xmit = &port->state->xmit;
  563. struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
  564. int count;
  565. /* nothing left to transmit? */
  566. if (UART_GET_TCR(port))
  567. return;
  568. xmit->tail += pdc->ofs;
  569. xmit->tail &= UART_XMIT_SIZE - 1;
  570. port->icount.tx += pdc->ofs;
  571. pdc->ofs = 0;
  572. /* more to transmit - setup next transfer */
  573. /* disable PDC transmit */
  574. UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
  575. if (!uart_circ_empty(xmit) && !uart_tx_stopped(port)) {
  576. dma_sync_single_for_device(port->dev,
  577. pdc->dma_addr,
  578. pdc->dma_size,
  579. DMA_TO_DEVICE);
  580. count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
  581. pdc->ofs = count;
  582. UART_PUT_TPR(port, pdc->dma_addr + xmit->tail);
  583. UART_PUT_TCR(port, count);
  584. /* re-enable PDC transmit */
  585. UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
  586. /* Enable interrupts */
  587. UART_PUT_IER(port, atmel_port->tx_done_mask);
  588. } else {
  589. if ((atmel_port->rs485.flags & SER_RS485_ENABLED) &&
  590. !(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX)) {
  591. /* DMA done, stop TX, start RX for RS485 */
  592. atmel_start_rx(port);
  593. }
  594. }
  595. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  596. uart_write_wakeup(port);
  597. }
  598. static void atmel_rx_from_ring(struct uart_port *port)
  599. {
  600. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  601. struct circ_buf *ring = &atmel_port->rx_ring;
  602. unsigned int flg;
  603. unsigned int status;
  604. while (ring->head != ring->tail) {
  605. struct atmel_uart_char c;
  606. /* Make sure c is loaded after head. */
  607. smp_rmb();
  608. c = ((struct atmel_uart_char *)ring->buf)[ring->tail];
  609. ring->tail = (ring->tail + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
  610. port->icount.rx++;
  611. status = c.status;
  612. flg = TTY_NORMAL;
  613. /*
  614. * note that the error handling code is
  615. * out of the main execution path
  616. */
  617. if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
  618. | ATMEL_US_OVRE | ATMEL_US_RXBRK))) {
  619. if (status & ATMEL_US_RXBRK) {
  620. /* ignore side-effect */
  621. status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
  622. port->icount.brk++;
  623. if (uart_handle_break(port))
  624. continue;
  625. }
  626. if (status & ATMEL_US_PARE)
  627. port->icount.parity++;
  628. if (status & ATMEL_US_FRAME)
  629. port->icount.frame++;
  630. if (status & ATMEL_US_OVRE)
  631. port->icount.overrun++;
  632. status &= port->read_status_mask;
  633. if (status & ATMEL_US_RXBRK)
  634. flg = TTY_BREAK;
  635. else if (status & ATMEL_US_PARE)
  636. flg = TTY_PARITY;
  637. else if (status & ATMEL_US_FRAME)
  638. flg = TTY_FRAME;
  639. }
  640. if (uart_handle_sysrq_char(port, c.ch))
  641. continue;
  642. uart_insert_char(port, status, ATMEL_US_OVRE, c.ch, flg);
  643. }
  644. /*
  645. * Drop the lock here since it might end up calling
  646. * uart_start(), which takes the lock.
  647. */
  648. spin_unlock(&port->lock);
  649. tty_flip_buffer_push(&port->state->port);
  650. spin_lock(&port->lock);
  651. }
  652. static void atmel_rx_from_dma(struct uart_port *port)
  653. {
  654. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  655. struct tty_port *tport = &port->state->port;
  656. struct atmel_dma_buffer *pdc;
  657. int rx_idx = atmel_port->pdc_rx_idx;
  658. unsigned int head;
  659. unsigned int tail;
  660. unsigned int count;
  661. do {
  662. /* Reset the UART timeout early so that we don't miss one */
  663. UART_PUT_CR(port, ATMEL_US_STTTO);
  664. pdc = &atmel_port->pdc_rx[rx_idx];
  665. head = UART_GET_RPR(port) - pdc->dma_addr;
  666. tail = pdc->ofs;
  667. /* If the PDC has switched buffers, RPR won't contain
  668. * any address within the current buffer. Since head
  669. * is unsigned, we just need a one-way comparison to
  670. * find out.
  671. *
  672. * In this case, we just need to consume the entire
  673. * buffer and resubmit it for DMA. This will clear the
  674. * ENDRX bit as well, so that we can safely re-enable
  675. * all interrupts below.
  676. */
  677. head = min(head, pdc->dma_size);
  678. if (likely(head != tail)) {
  679. dma_sync_single_for_cpu(port->dev, pdc->dma_addr,
  680. pdc->dma_size, DMA_FROM_DEVICE);
  681. /*
  682. * head will only wrap around when we recycle
  683. * the DMA buffer, and when that happens, we
  684. * explicitly set tail to 0. So head will
  685. * always be greater than tail.
  686. */
  687. count = head - tail;
  688. tty_insert_flip_string(tport, pdc->buf + pdc->ofs,
  689. count);
  690. dma_sync_single_for_device(port->dev, pdc->dma_addr,
  691. pdc->dma_size, DMA_FROM_DEVICE);
  692. port->icount.rx += count;
  693. pdc->ofs = head;
  694. }
  695. /*
  696. * If the current buffer is full, we need to check if
  697. * the next one contains any additional data.
  698. */
  699. if (head >= pdc->dma_size) {
  700. pdc->ofs = 0;
  701. UART_PUT_RNPR(port, pdc->dma_addr);
  702. UART_PUT_RNCR(port, pdc->dma_size);
  703. rx_idx = !rx_idx;
  704. atmel_port->pdc_rx_idx = rx_idx;
  705. }
  706. } while (head >= pdc->dma_size);
  707. /*
  708. * Drop the lock here since it might end up calling
  709. * uart_start(), which takes the lock.
  710. */
  711. spin_unlock(&port->lock);
  712. tty_flip_buffer_push(tport);
  713. spin_lock(&port->lock);
  714. UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
  715. }
  716. /*
  717. * tasklet handling tty stuff outside the interrupt handler.
  718. */
  719. static void atmel_tasklet_func(unsigned long data)
  720. {
  721. struct uart_port *port = (struct uart_port *)data;
  722. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  723. unsigned int status;
  724. unsigned int status_change;
  725. /* The interrupt handler does not take the lock */
  726. spin_lock(&port->lock);
  727. if (atmel_use_dma_tx(port))
  728. atmel_tx_dma(port);
  729. else
  730. atmel_tx_chars(port);
  731. status = atmel_port->irq_status;
  732. status_change = status ^ atmel_port->irq_status_prev;
  733. if (status_change & (ATMEL_US_RI | ATMEL_US_DSR
  734. | ATMEL_US_DCD | ATMEL_US_CTS)) {
  735. /* TODO: All reads to CSR will clear these interrupts! */
  736. if (status_change & ATMEL_US_RI)
  737. port->icount.rng++;
  738. if (status_change & ATMEL_US_DSR)
  739. port->icount.dsr++;
  740. if (status_change & ATMEL_US_DCD)
  741. uart_handle_dcd_change(port, !(status & ATMEL_US_DCD));
  742. if (status_change & ATMEL_US_CTS)
  743. uart_handle_cts_change(port, !(status & ATMEL_US_CTS));
  744. wake_up_interruptible(&port->state->port.delta_msr_wait);
  745. atmel_port->irq_status_prev = status;
  746. }
  747. if (atmel_use_dma_rx(port))
  748. atmel_rx_from_dma(port);
  749. else
  750. atmel_rx_from_ring(port);
  751. spin_unlock(&port->lock);
  752. }
  753. /*
  754. * Perform initialization and enable port for reception
  755. */
  756. static int atmel_startup(struct uart_port *port)
  757. {
  758. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  759. struct tty_struct *tty = port->state->port.tty;
  760. int retval;
  761. /*
  762. * Ensure that no interrupts are enabled otherwise when
  763. * request_irq() is called we could get stuck trying to
  764. * handle an unexpected interrupt
  765. */
  766. UART_PUT_IDR(port, -1);
  767. /*
  768. * Allocate the IRQ
  769. */
  770. retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED,
  771. tty ? tty->name : "atmel_serial", port);
  772. if (retval) {
  773. printk("atmel_serial: atmel_startup - Can't get irq\n");
  774. return retval;
  775. }
  776. /*
  777. * Initialize DMA (if necessary)
  778. */
  779. if (atmel_use_dma_rx(port)) {
  780. int i;
  781. for (i = 0; i < 2; i++) {
  782. struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
  783. pdc->buf = kmalloc(PDC_BUFFER_SIZE, GFP_KERNEL);
  784. if (pdc->buf == NULL) {
  785. if (i != 0) {
  786. dma_unmap_single(port->dev,
  787. atmel_port->pdc_rx[0].dma_addr,
  788. PDC_BUFFER_SIZE,
  789. DMA_FROM_DEVICE);
  790. kfree(atmel_port->pdc_rx[0].buf);
  791. }
  792. free_irq(port->irq, port);
  793. return -ENOMEM;
  794. }
  795. pdc->dma_addr = dma_map_single(port->dev,
  796. pdc->buf,
  797. PDC_BUFFER_SIZE,
  798. DMA_FROM_DEVICE);
  799. pdc->dma_size = PDC_BUFFER_SIZE;
  800. pdc->ofs = 0;
  801. }
  802. atmel_port->pdc_rx_idx = 0;
  803. UART_PUT_RPR(port, atmel_port->pdc_rx[0].dma_addr);
  804. UART_PUT_RCR(port, PDC_BUFFER_SIZE);
  805. UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr);
  806. UART_PUT_RNCR(port, PDC_BUFFER_SIZE);
  807. }
  808. if (atmel_use_dma_tx(port)) {
  809. struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
  810. struct circ_buf *xmit = &port->state->xmit;
  811. pdc->buf = xmit->buf;
  812. pdc->dma_addr = dma_map_single(port->dev,
  813. pdc->buf,
  814. UART_XMIT_SIZE,
  815. DMA_TO_DEVICE);
  816. pdc->dma_size = UART_XMIT_SIZE;
  817. pdc->ofs = 0;
  818. }
  819. /*
  820. * If there is a specific "open" function (to register
  821. * control line interrupts)
  822. */
  823. if (atmel_open_hook) {
  824. retval = atmel_open_hook(port);
  825. if (retval) {
  826. free_irq(port->irq, port);
  827. return retval;
  828. }
  829. }
  830. /* Save current CSR for comparison in atmel_tasklet_func() */
  831. atmel_port->irq_status_prev = UART_GET_CSR(port);
  832. atmel_port->irq_status = atmel_port->irq_status_prev;
  833. /*
  834. * Finally, enable the serial port
  835. */
  836. UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
  837. /* enable xmit & rcvr */
  838. UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
  839. if (atmel_use_dma_rx(port)) {
  840. /* set UART timeout */
  841. UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
  842. UART_PUT_CR(port, ATMEL_US_STTTO);
  843. UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
  844. /* enable PDC controller */
  845. UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
  846. } else {
  847. /* enable receive only */
  848. UART_PUT_IER(port, ATMEL_US_RXRDY);
  849. }
  850. return 0;
  851. }
  852. /*
  853. * Disable the port
  854. */
  855. static void atmel_shutdown(struct uart_port *port)
  856. {
  857. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  858. /*
  859. * Ensure everything is stopped.
  860. */
  861. atmel_stop_rx(port);
  862. atmel_stop_tx(port);
  863. /*
  864. * Shut-down the DMA.
  865. */
  866. if (atmel_use_dma_rx(port)) {
  867. int i;
  868. for (i = 0; i < 2; i++) {
  869. struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
  870. dma_unmap_single(port->dev,
  871. pdc->dma_addr,
  872. pdc->dma_size,
  873. DMA_FROM_DEVICE);
  874. kfree(pdc->buf);
  875. }
  876. }
  877. if (atmel_use_dma_tx(port)) {
  878. struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
  879. dma_unmap_single(port->dev,
  880. pdc->dma_addr,
  881. pdc->dma_size,
  882. DMA_TO_DEVICE);
  883. }
  884. /*
  885. * Disable all interrupts, port and break condition.
  886. */
  887. UART_PUT_CR(port, ATMEL_US_RSTSTA);
  888. UART_PUT_IDR(port, -1);
  889. /*
  890. * Free the interrupt
  891. */
  892. free_irq(port->irq, port);
  893. /*
  894. * If there is a specific "close" function (to unregister
  895. * control line interrupts)
  896. */
  897. if (atmel_close_hook)
  898. atmel_close_hook(port);
  899. }
  900. /*
  901. * Flush any TX data submitted for DMA. Called when the TX circular
  902. * buffer is reset.
  903. */
  904. static void atmel_flush_buffer(struct uart_port *port)
  905. {
  906. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  907. if (atmel_use_dma_tx(port)) {
  908. UART_PUT_TCR(port, 0);
  909. atmel_port->pdc_tx.ofs = 0;
  910. }
  911. }
  912. /*
  913. * Power / Clock management.
  914. */
  915. static void atmel_serial_pm(struct uart_port *port, unsigned int state,
  916. unsigned int oldstate)
  917. {
  918. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  919. switch (state) {
  920. case 0:
  921. /*
  922. * Enable the peripheral clock for this serial port.
  923. * This is called on uart_open() or a resume event.
  924. */
  925. clk_enable(atmel_port->clk);
  926. /* re-enable interrupts if we disabled some on suspend */
  927. UART_PUT_IER(port, atmel_port->backup_imr);
  928. break;
  929. case 3:
  930. /* Back up the interrupt mask and disable all interrupts */
  931. atmel_port->backup_imr = UART_GET_IMR(port);
  932. UART_PUT_IDR(port, -1);
  933. /*
  934. * Disable the peripheral clock for this serial port.
  935. * This is called on uart_close() or a suspend event.
  936. */
  937. clk_disable(atmel_port->clk);
  938. break;
  939. default:
  940. printk(KERN_ERR "atmel_serial: unknown pm %d\n", state);
  941. }
  942. }
  943. /*
  944. * Change the port parameters
  945. */
  946. static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
  947. struct ktermios *old)
  948. {
  949. unsigned long flags;
  950. unsigned int mode, imr, quot, baud;
  951. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  952. /* Get current mode register */
  953. mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL
  954. | ATMEL_US_NBSTOP | ATMEL_US_PAR
  955. | ATMEL_US_USMODE);
  956. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
  957. quot = uart_get_divisor(port, baud);
  958. if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */
  959. quot /= 8;
  960. mode |= ATMEL_US_USCLKS_MCK_DIV8;
  961. }
  962. /* byte size */
  963. switch (termios->c_cflag & CSIZE) {
  964. case CS5:
  965. mode |= ATMEL_US_CHRL_5;
  966. break;
  967. case CS6:
  968. mode |= ATMEL_US_CHRL_6;
  969. break;
  970. case CS7:
  971. mode |= ATMEL_US_CHRL_7;
  972. break;
  973. default:
  974. mode |= ATMEL_US_CHRL_8;
  975. break;
  976. }
  977. /* stop bits */
  978. if (termios->c_cflag & CSTOPB)
  979. mode |= ATMEL_US_NBSTOP_2;
  980. /* parity */
  981. if (termios->c_cflag & PARENB) {
  982. /* Mark or Space parity */
  983. if (termios->c_cflag & CMSPAR) {
  984. if (termios->c_cflag & PARODD)
  985. mode |= ATMEL_US_PAR_MARK;
  986. else
  987. mode |= ATMEL_US_PAR_SPACE;
  988. } else if (termios->c_cflag & PARODD)
  989. mode |= ATMEL_US_PAR_ODD;
  990. else
  991. mode |= ATMEL_US_PAR_EVEN;
  992. } else
  993. mode |= ATMEL_US_PAR_NONE;
  994. /* hardware handshake (RTS/CTS) */
  995. if (termios->c_cflag & CRTSCTS)
  996. mode |= ATMEL_US_USMODE_HWHS;
  997. else
  998. mode |= ATMEL_US_USMODE_NORMAL;
  999. spin_lock_irqsave(&port->lock, flags);
  1000. port->read_status_mask = ATMEL_US_OVRE;
  1001. if (termios->c_iflag & INPCK)
  1002. port->read_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
  1003. if (termios->c_iflag & (BRKINT | PARMRK))
  1004. port->read_status_mask |= ATMEL_US_RXBRK;
  1005. if (atmel_use_dma_rx(port))
  1006. /* need to enable error interrupts */
  1007. UART_PUT_IER(port, port->read_status_mask);
  1008. /*
  1009. * Characters to ignore
  1010. */
  1011. port->ignore_status_mask = 0;
  1012. if (termios->c_iflag & IGNPAR)
  1013. port->ignore_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
  1014. if (termios->c_iflag & IGNBRK) {
  1015. port->ignore_status_mask |= ATMEL_US_RXBRK;
  1016. /*
  1017. * If we're ignoring parity and break indicators,
  1018. * ignore overruns too (for real raw support).
  1019. */
  1020. if (termios->c_iflag & IGNPAR)
  1021. port->ignore_status_mask |= ATMEL_US_OVRE;
  1022. }
  1023. /* TODO: Ignore all characters if CREAD is set.*/
  1024. /* update the per-port timeout */
  1025. uart_update_timeout(port, termios->c_cflag, baud);
  1026. /*
  1027. * save/disable interrupts. The tty layer will ensure that the
  1028. * transmitter is empty if requested by the caller, so there's
  1029. * no need to wait for it here.
  1030. */
  1031. imr = UART_GET_IMR(port);
  1032. UART_PUT_IDR(port, -1);
  1033. /* disable receiver and transmitter */
  1034. UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS);
  1035. /* Resetting serial mode to RS232 (0x0) */
  1036. mode &= ~ATMEL_US_USMODE;
  1037. if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
  1038. dev_dbg(port->dev, "Setting UART to RS485\n");
  1039. if ((atmel_port->rs485.delay_rts_after_send) > 0)
  1040. UART_PUT_TTGR(port,
  1041. atmel_port->rs485.delay_rts_after_send);
  1042. mode |= ATMEL_US_USMODE_RS485;
  1043. } else {
  1044. dev_dbg(port->dev, "Setting UART to RS232\n");
  1045. }
  1046. /* set the parity, stop bits and data size */
  1047. UART_PUT_MR(port, mode);
  1048. /* set the baud rate */
  1049. UART_PUT_BRGR(port, quot);
  1050. UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
  1051. UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
  1052. /* restore interrupts */
  1053. UART_PUT_IER(port, imr);
  1054. /* CTS flow-control and modem-status interrupts */
  1055. if (UART_ENABLE_MS(port, termios->c_cflag))
  1056. port->ops->enable_ms(port);
  1057. spin_unlock_irqrestore(&port->lock, flags);
  1058. }
  1059. static void atmel_set_ldisc(struct uart_port *port, int new)
  1060. {
  1061. if (new == N_PPS) {
  1062. port->flags |= UPF_HARDPPS_CD;
  1063. atmel_enable_ms(port);
  1064. } else {
  1065. port->flags &= ~UPF_HARDPPS_CD;
  1066. }
  1067. }
  1068. /*
  1069. * Return string describing the specified port
  1070. */
  1071. static const char *atmel_type(struct uart_port *port)
  1072. {
  1073. return (port->type == PORT_ATMEL) ? "ATMEL_SERIAL" : NULL;
  1074. }
  1075. /*
  1076. * Release the memory region(s) being used by 'port'.
  1077. */
  1078. static void atmel_release_port(struct uart_port *port)
  1079. {
  1080. struct platform_device *pdev = to_platform_device(port->dev);
  1081. int size = pdev->resource[0].end - pdev->resource[0].start + 1;
  1082. release_mem_region(port->mapbase, size);
  1083. if (port->flags & UPF_IOREMAP) {
  1084. iounmap(port->membase);
  1085. port->membase = NULL;
  1086. }
  1087. }
  1088. /*
  1089. * Request the memory region(s) being used by 'port'.
  1090. */
  1091. static int atmel_request_port(struct uart_port *port)
  1092. {
  1093. struct platform_device *pdev = to_platform_device(port->dev);
  1094. int size = pdev->resource[0].end - pdev->resource[0].start + 1;
  1095. if (!request_mem_region(port->mapbase, size, "atmel_serial"))
  1096. return -EBUSY;
  1097. if (port->flags & UPF_IOREMAP) {
  1098. port->membase = ioremap(port->mapbase, size);
  1099. if (port->membase == NULL) {
  1100. release_mem_region(port->mapbase, size);
  1101. return -ENOMEM;
  1102. }
  1103. }
  1104. return 0;
  1105. }
  1106. /*
  1107. * Configure/autoconfigure the port.
  1108. */
  1109. static void atmel_config_port(struct uart_port *port, int flags)
  1110. {
  1111. if (flags & UART_CONFIG_TYPE) {
  1112. port->type = PORT_ATMEL;
  1113. atmel_request_port(port);
  1114. }
  1115. }
  1116. /*
  1117. * Verify the new serial_struct (for TIOCSSERIAL).
  1118. */
  1119. static int atmel_verify_port(struct uart_port *port, struct serial_struct *ser)
  1120. {
  1121. int ret = 0;
  1122. if (ser->type != PORT_UNKNOWN && ser->type != PORT_ATMEL)
  1123. ret = -EINVAL;
  1124. if (port->irq != ser->irq)
  1125. ret = -EINVAL;
  1126. if (ser->io_type != SERIAL_IO_MEM)
  1127. ret = -EINVAL;
  1128. if (port->uartclk / 16 != ser->baud_base)
  1129. ret = -EINVAL;
  1130. if ((void *)port->mapbase != ser->iomem_base)
  1131. ret = -EINVAL;
  1132. if (port->iobase != ser->port)
  1133. ret = -EINVAL;
  1134. if (ser->hub6 != 0)
  1135. ret = -EINVAL;
  1136. return ret;
  1137. }
  1138. #ifdef CONFIG_CONSOLE_POLL
  1139. static int atmel_poll_get_char(struct uart_port *port)
  1140. {
  1141. while (!(UART_GET_CSR(port) & ATMEL_US_RXRDY))
  1142. cpu_relax();
  1143. return UART_GET_CHAR(port);
  1144. }
  1145. static void atmel_poll_put_char(struct uart_port *port, unsigned char ch)
  1146. {
  1147. while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
  1148. cpu_relax();
  1149. UART_PUT_CHAR(port, ch);
  1150. }
  1151. #endif
  1152. static int
  1153. atmel_ioctl(struct uart_port *port, unsigned int cmd, unsigned long arg)
  1154. {
  1155. struct serial_rs485 rs485conf;
  1156. switch (cmd) {
  1157. case TIOCSRS485:
  1158. if (copy_from_user(&rs485conf, (struct serial_rs485 *) arg,
  1159. sizeof(rs485conf)))
  1160. return -EFAULT;
  1161. atmel_config_rs485(port, &rs485conf);
  1162. break;
  1163. case TIOCGRS485:
  1164. if (copy_to_user((struct serial_rs485 *) arg,
  1165. &(to_atmel_uart_port(port)->rs485),
  1166. sizeof(rs485conf)))
  1167. return -EFAULT;
  1168. break;
  1169. default:
  1170. return -ENOIOCTLCMD;
  1171. }
  1172. return 0;
  1173. }
  1174. static struct uart_ops atmel_pops = {
  1175. .tx_empty = atmel_tx_empty,
  1176. .set_mctrl = atmel_set_mctrl,
  1177. .get_mctrl = atmel_get_mctrl,
  1178. .stop_tx = atmel_stop_tx,
  1179. .start_tx = atmel_start_tx,
  1180. .stop_rx = atmel_stop_rx,
  1181. .enable_ms = atmel_enable_ms,
  1182. .break_ctl = atmel_break_ctl,
  1183. .startup = atmel_startup,
  1184. .shutdown = atmel_shutdown,
  1185. .flush_buffer = atmel_flush_buffer,
  1186. .set_termios = atmel_set_termios,
  1187. .set_ldisc = atmel_set_ldisc,
  1188. .type = atmel_type,
  1189. .release_port = atmel_release_port,
  1190. .request_port = atmel_request_port,
  1191. .config_port = atmel_config_port,
  1192. .verify_port = atmel_verify_port,
  1193. .pm = atmel_serial_pm,
  1194. .ioctl = atmel_ioctl,
  1195. #ifdef CONFIG_CONSOLE_POLL
  1196. .poll_get_char = atmel_poll_get_char,
  1197. .poll_put_char = atmel_poll_put_char,
  1198. #endif
  1199. };
  1200. static void atmel_of_init_port(struct atmel_uart_port *atmel_port,
  1201. struct device_node *np)
  1202. {
  1203. u32 rs485_delay[2];
  1204. /* DMA/PDC usage specification */
  1205. if (of_get_property(np, "atmel,use-dma-rx", NULL))
  1206. atmel_port->use_dma_rx = 1;
  1207. else
  1208. atmel_port->use_dma_rx = 0;
  1209. if (of_get_property(np, "atmel,use-dma-tx", NULL))
  1210. atmel_port->use_dma_tx = 1;
  1211. else
  1212. atmel_port->use_dma_tx = 0;
  1213. /* rs485 properties */
  1214. if (of_property_read_u32_array(np, "rs485-rts-delay",
  1215. rs485_delay, 2) == 0) {
  1216. struct serial_rs485 *rs485conf = &atmel_port->rs485;
  1217. rs485conf->delay_rts_before_send = rs485_delay[0];
  1218. rs485conf->delay_rts_after_send = rs485_delay[1];
  1219. rs485conf->flags = 0;
  1220. if (of_get_property(np, "rs485-rx-during-tx", NULL))
  1221. rs485conf->flags |= SER_RS485_RX_DURING_TX;
  1222. if (of_get_property(np, "linux,rs485-enabled-at-boot-time", NULL))
  1223. rs485conf->flags |= SER_RS485_ENABLED;
  1224. }
  1225. }
  1226. /*
  1227. * Configure the port from the platform device resource info.
  1228. */
  1229. static void atmel_init_port(struct atmel_uart_port *atmel_port,
  1230. struct platform_device *pdev)
  1231. {
  1232. struct uart_port *port = &atmel_port->uart;
  1233. struct atmel_uart_data *pdata = pdev->dev.platform_data;
  1234. if (pdev->dev.of_node) {
  1235. atmel_of_init_port(atmel_port, pdev->dev.of_node);
  1236. } else {
  1237. atmel_port->use_dma_rx = pdata->use_dma_rx;
  1238. atmel_port->use_dma_tx = pdata->use_dma_tx;
  1239. atmel_port->rs485 = pdata->rs485;
  1240. }
  1241. port->iotype = UPIO_MEM;
  1242. port->flags = UPF_BOOT_AUTOCONF;
  1243. port->ops = &atmel_pops;
  1244. port->fifosize = 1;
  1245. port->dev = &pdev->dev;
  1246. port->mapbase = pdev->resource[0].start;
  1247. port->irq = pdev->resource[1].start;
  1248. tasklet_init(&atmel_port->tasklet, atmel_tasklet_func,
  1249. (unsigned long)port);
  1250. memset(&atmel_port->rx_ring, 0, sizeof(atmel_port->rx_ring));
  1251. if (pdata && pdata->regs) {
  1252. /* Already mapped by setup code */
  1253. port->membase = pdata->regs;
  1254. } else {
  1255. port->flags |= UPF_IOREMAP;
  1256. port->membase = NULL;
  1257. }
  1258. /* for console, the clock could already be configured */
  1259. if (!atmel_port->clk) {
  1260. atmel_port->clk = clk_get(&pdev->dev, "usart");
  1261. clk_enable(atmel_port->clk);
  1262. port->uartclk = clk_get_rate(atmel_port->clk);
  1263. clk_disable(atmel_port->clk);
  1264. /* only enable clock when USART is in use */
  1265. }
  1266. /* Use TXEMPTY for interrupt when rs485 else TXRDY or ENDTX|TXBUFE */
  1267. if (atmel_port->rs485.flags & SER_RS485_ENABLED)
  1268. atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
  1269. else if (atmel_use_dma_tx(port)) {
  1270. port->fifosize = PDC_BUFFER_SIZE;
  1271. atmel_port->tx_done_mask = ATMEL_US_ENDTX | ATMEL_US_TXBUFE;
  1272. } else {
  1273. atmel_port->tx_done_mask = ATMEL_US_TXRDY;
  1274. }
  1275. }
  1276. struct platform_device *atmel_default_console_device; /* the serial console device */
  1277. #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
  1278. static void atmel_console_putchar(struct uart_port *port, int ch)
  1279. {
  1280. while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
  1281. cpu_relax();
  1282. UART_PUT_CHAR(port, ch);
  1283. }
  1284. /*
  1285. * Interrupts are disabled on entering
  1286. */
  1287. static void atmel_console_write(struct console *co, const char *s, u_int count)
  1288. {
  1289. struct uart_port *port = &atmel_ports[co->index].uart;
  1290. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  1291. unsigned int status, imr;
  1292. unsigned int pdc_tx;
  1293. /*
  1294. * First, save IMR and then disable interrupts
  1295. */
  1296. imr = UART_GET_IMR(port);
  1297. UART_PUT_IDR(port, ATMEL_US_RXRDY | atmel_port->tx_done_mask);
  1298. /* Store PDC transmit status and disable it */
  1299. pdc_tx = UART_GET_PTSR(port) & ATMEL_PDC_TXTEN;
  1300. UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
  1301. uart_console_write(port, s, count, atmel_console_putchar);
  1302. /*
  1303. * Finally, wait for transmitter to become empty
  1304. * and restore IMR
  1305. */
  1306. do {
  1307. status = UART_GET_CSR(port);
  1308. } while (!(status & ATMEL_US_TXRDY));
  1309. /* Restore PDC transmit status */
  1310. if (pdc_tx)
  1311. UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
  1312. /* set interrupts back the way they were */
  1313. UART_PUT_IER(port, imr);
  1314. }
  1315. /*
  1316. * If the port was already initialised (eg, by a boot loader),
  1317. * try to determine the current setup.
  1318. */
  1319. static void __init atmel_console_get_options(struct uart_port *port, int *baud,
  1320. int *parity, int *bits)
  1321. {
  1322. unsigned int mr, quot;
  1323. /*
  1324. * If the baud rate generator isn't running, the port wasn't
  1325. * initialized by the boot loader.
  1326. */
  1327. quot = UART_GET_BRGR(port) & ATMEL_US_CD;
  1328. if (!quot)
  1329. return;
  1330. mr = UART_GET_MR(port) & ATMEL_US_CHRL;
  1331. if (mr == ATMEL_US_CHRL_8)
  1332. *bits = 8;
  1333. else
  1334. *bits = 7;
  1335. mr = UART_GET_MR(port) & ATMEL_US_PAR;
  1336. if (mr == ATMEL_US_PAR_EVEN)
  1337. *parity = 'e';
  1338. else if (mr == ATMEL_US_PAR_ODD)
  1339. *parity = 'o';
  1340. /*
  1341. * The serial core only rounds down when matching this to a
  1342. * supported baud rate. Make sure we don't end up slightly
  1343. * lower than one of those, as it would make us fall through
  1344. * to a much lower baud rate than we really want.
  1345. */
  1346. *baud = port->uartclk / (16 * (quot - 1));
  1347. }
  1348. static int __init atmel_console_setup(struct console *co, char *options)
  1349. {
  1350. struct uart_port *port = &atmel_ports[co->index].uart;
  1351. int baud = 115200;
  1352. int bits = 8;
  1353. int parity = 'n';
  1354. int flow = 'n';
  1355. if (port->membase == NULL) {
  1356. /* Port not initialized yet - delay setup */
  1357. return -ENODEV;
  1358. }
  1359. clk_enable(atmel_ports[co->index].clk);
  1360. UART_PUT_IDR(port, -1);
  1361. UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
  1362. UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
  1363. if (options)
  1364. uart_parse_options(options, &baud, &parity, &bits, &flow);
  1365. else
  1366. atmel_console_get_options(port, &baud, &parity, &bits);
  1367. return uart_set_options(port, co, baud, parity, bits, flow);
  1368. }
  1369. static struct uart_driver atmel_uart;
  1370. static struct console atmel_console = {
  1371. .name = ATMEL_DEVICENAME,
  1372. .write = atmel_console_write,
  1373. .device = uart_console_device,
  1374. .setup = atmel_console_setup,
  1375. .flags = CON_PRINTBUFFER,
  1376. .index = -1,
  1377. .data = &atmel_uart,
  1378. };
  1379. #define ATMEL_CONSOLE_DEVICE (&atmel_console)
  1380. /*
  1381. * Early console initialization (before VM subsystem initialized).
  1382. */
  1383. static int __init atmel_console_init(void)
  1384. {
  1385. if (atmel_default_console_device) {
  1386. struct atmel_uart_data *pdata =
  1387. atmel_default_console_device->dev.platform_data;
  1388. int id = pdata->num;
  1389. struct atmel_uart_port *port = &atmel_ports[id];
  1390. port->backup_imr = 0;
  1391. port->uart.line = id;
  1392. add_preferred_console(ATMEL_DEVICENAME, id, NULL);
  1393. atmel_init_port(port, atmel_default_console_device);
  1394. register_console(&atmel_console);
  1395. }
  1396. return 0;
  1397. }
  1398. console_initcall(atmel_console_init);
  1399. /*
  1400. * Late console initialization.
  1401. */
  1402. static int __init atmel_late_console_init(void)
  1403. {
  1404. if (atmel_default_console_device
  1405. && !(atmel_console.flags & CON_ENABLED))
  1406. register_console(&atmel_console);
  1407. return 0;
  1408. }
  1409. core_initcall(atmel_late_console_init);
  1410. static inline bool atmel_is_console_port(struct uart_port *port)
  1411. {
  1412. return port->cons && port->cons->index == port->line;
  1413. }
  1414. #else
  1415. #define ATMEL_CONSOLE_DEVICE NULL
  1416. static inline bool atmel_is_console_port(struct uart_port *port)
  1417. {
  1418. return false;
  1419. }
  1420. #endif
  1421. static struct uart_driver atmel_uart = {
  1422. .owner = THIS_MODULE,
  1423. .driver_name = "atmel_serial",
  1424. .dev_name = ATMEL_DEVICENAME,
  1425. .major = SERIAL_ATMEL_MAJOR,
  1426. .minor = MINOR_START,
  1427. .nr = ATMEL_MAX_UART,
  1428. .cons = ATMEL_CONSOLE_DEVICE,
  1429. };
  1430. #ifdef CONFIG_PM
  1431. static bool atmel_serial_clk_will_stop(void)
  1432. {
  1433. #ifdef CONFIG_ARCH_AT91
  1434. return at91_suspend_entering_slow_clock();
  1435. #else
  1436. return false;
  1437. #endif
  1438. }
  1439. static int atmel_serial_suspend(struct platform_device *pdev,
  1440. pm_message_t state)
  1441. {
  1442. struct uart_port *port = platform_get_drvdata(pdev);
  1443. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  1444. if (atmel_is_console_port(port) && console_suspend_enabled) {
  1445. /* Drain the TX shifter */
  1446. while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY))
  1447. cpu_relax();
  1448. }
  1449. /* we can not wake up if we're running on slow clock */
  1450. atmel_port->may_wakeup = device_may_wakeup(&pdev->dev);
  1451. if (atmel_serial_clk_will_stop())
  1452. device_set_wakeup_enable(&pdev->dev, 0);
  1453. uart_suspend_port(&atmel_uart, port);
  1454. return 0;
  1455. }
  1456. static int atmel_serial_resume(struct platform_device *pdev)
  1457. {
  1458. struct uart_port *port = platform_get_drvdata(pdev);
  1459. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  1460. uart_resume_port(&atmel_uart, port);
  1461. device_set_wakeup_enable(&pdev->dev, atmel_port->may_wakeup);
  1462. return 0;
  1463. }
  1464. #else
  1465. #define atmel_serial_suspend NULL
  1466. #define atmel_serial_resume NULL
  1467. #endif
  1468. static int atmel_serial_probe(struct platform_device *pdev)
  1469. {
  1470. struct atmel_uart_port *port;
  1471. struct device_node *np = pdev->dev.of_node;
  1472. struct atmel_uart_data *pdata = pdev->dev.platform_data;
  1473. void *data;
  1474. int ret = -ENODEV;
  1475. struct pinctrl *pinctrl;
  1476. BUILD_BUG_ON(ATMEL_SERIAL_RINGSIZE & (ATMEL_SERIAL_RINGSIZE - 1));
  1477. if (np)
  1478. ret = of_alias_get_id(np, "serial");
  1479. else
  1480. if (pdata)
  1481. ret = pdata->num;
  1482. if (ret < 0)
  1483. /* port id not found in platform data nor device-tree aliases:
  1484. * auto-enumerate it */
  1485. ret = find_first_zero_bit(&atmel_ports_in_use,
  1486. sizeof(atmel_ports_in_use));
  1487. if (ret > ATMEL_MAX_UART) {
  1488. ret = -ENODEV;
  1489. goto err;
  1490. }
  1491. if (test_and_set_bit(ret, &atmel_ports_in_use)) {
  1492. /* port already in use */
  1493. ret = -EBUSY;
  1494. goto err;
  1495. }
  1496. port = &atmel_ports[ret];
  1497. port->backup_imr = 0;
  1498. port->uart.line = ret;
  1499. atmel_init_port(port, pdev);
  1500. pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
  1501. if (IS_ERR(pinctrl)) {
  1502. ret = PTR_ERR(pinctrl);
  1503. goto err;
  1504. }
  1505. if (!atmel_use_dma_rx(&port->uart)) {
  1506. ret = -ENOMEM;
  1507. data = kmalloc(sizeof(struct atmel_uart_char)
  1508. * ATMEL_SERIAL_RINGSIZE, GFP_KERNEL);
  1509. if (!data)
  1510. goto err_alloc_ring;
  1511. port->rx_ring.buf = data;
  1512. }
  1513. ret = uart_add_one_port(&atmel_uart, &port->uart);
  1514. if (ret)
  1515. goto err_add_port;
  1516. #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
  1517. if (atmel_is_console_port(&port->uart)
  1518. && ATMEL_CONSOLE_DEVICE->flags & CON_ENABLED) {
  1519. /*
  1520. * The serial core enabled the clock for us, so undo
  1521. * the clk_enable() in atmel_console_setup()
  1522. */
  1523. clk_disable(port->clk);
  1524. }
  1525. #endif
  1526. device_init_wakeup(&pdev->dev, 1);
  1527. platform_set_drvdata(pdev, port);
  1528. if (port->rs485.flags & SER_RS485_ENABLED) {
  1529. UART_PUT_MR(&port->uart, ATMEL_US_USMODE_NORMAL);
  1530. UART_PUT_CR(&port->uart, ATMEL_US_RTSEN);
  1531. }
  1532. return 0;
  1533. err_add_port:
  1534. kfree(port->rx_ring.buf);
  1535. port->rx_ring.buf = NULL;
  1536. err_alloc_ring:
  1537. if (!atmel_is_console_port(&port->uart)) {
  1538. clk_put(port->clk);
  1539. port->clk = NULL;
  1540. }
  1541. err:
  1542. return ret;
  1543. }
  1544. static int atmel_serial_remove(struct platform_device *pdev)
  1545. {
  1546. struct uart_port *port = platform_get_drvdata(pdev);
  1547. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  1548. int ret = 0;
  1549. device_init_wakeup(&pdev->dev, 0);
  1550. platform_set_drvdata(pdev, NULL);
  1551. ret = uart_remove_one_port(&atmel_uart, port);
  1552. tasklet_kill(&atmel_port->tasklet);
  1553. kfree(atmel_port->rx_ring.buf);
  1554. /* "port" is allocated statically, so we shouldn't free it */
  1555. clear_bit(port->line, &atmel_ports_in_use);
  1556. clk_put(atmel_port->clk);
  1557. return ret;
  1558. }
  1559. static struct platform_driver atmel_serial_driver = {
  1560. .probe = atmel_serial_probe,
  1561. .remove = atmel_serial_remove,
  1562. .suspend = atmel_serial_suspend,
  1563. .resume = atmel_serial_resume,
  1564. .driver = {
  1565. .name = "atmel_usart",
  1566. .owner = THIS_MODULE,
  1567. .of_match_table = of_match_ptr(atmel_serial_dt_ids),
  1568. },
  1569. };
  1570. static int __init atmel_serial_init(void)
  1571. {
  1572. int ret;
  1573. ret = uart_register_driver(&atmel_uart);
  1574. if (ret)
  1575. return ret;
  1576. ret = platform_driver_register(&atmel_serial_driver);
  1577. if (ret)
  1578. uart_unregister_driver(&atmel_uart);
  1579. return ret;
  1580. }
  1581. static void __exit atmel_serial_exit(void)
  1582. {
  1583. platform_driver_unregister(&atmel_serial_driver);
  1584. uart_unregister_driver(&atmel_uart);
  1585. }
  1586. module_init(atmel_serial_init);
  1587. module_exit(atmel_serial_exit);
  1588. MODULE_AUTHOR("Rick Bronson");
  1589. MODULE_DESCRIPTION("Atmel AT91 / AT32 serial port driver");
  1590. MODULE_LICENSE("GPL");
  1591. MODULE_ALIAS("platform:atmel_usart");