8250_dma.c 5.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216
  1. /*
  2. * 8250_dma.c - DMA Engine API support for 8250.c
  3. *
  4. * Copyright (C) 2013 Intel Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/tty.h>
  12. #include <linux/tty_flip.h>
  13. #include <linux/serial_reg.h>
  14. #include <linux/dma-mapping.h>
  15. #include "8250.h"
  16. static void __dma_tx_complete(void *param)
  17. {
  18. struct uart_8250_port *p = param;
  19. struct uart_8250_dma *dma = p->dma;
  20. struct circ_buf *xmit = &p->port.state->xmit;
  21. dma->tx_running = 0;
  22. dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr,
  23. UART_XMIT_SIZE, DMA_TO_DEVICE);
  24. xmit->tail += dma->tx_size;
  25. xmit->tail &= UART_XMIT_SIZE - 1;
  26. p->port.icount.tx += dma->tx_size;
  27. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  28. uart_write_wakeup(&p->port);
  29. if (!uart_circ_empty(xmit) && !uart_tx_stopped(&p->port)) {
  30. serial8250_tx_dma(p);
  31. uart_write_wakeup(&p->port);
  32. }
  33. }
  34. static void __dma_rx_complete(void *param)
  35. {
  36. struct uart_8250_port *p = param;
  37. struct uart_8250_dma *dma = p->dma;
  38. struct tty_port *tty_port = &p->port.state->port;
  39. struct dma_tx_state state;
  40. int count;
  41. dma_sync_single_for_cpu(dma->rxchan->device->dev, dma->rx_addr,
  42. dma->rx_size, DMA_FROM_DEVICE);
  43. dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state);
  44. dmaengine_terminate_all(dma->rxchan);
  45. count = dma->rx_size - state.residue;
  46. tty_insert_flip_string(tty_port, dma->rx_buf, count);
  47. p->port.icount.rx += count;
  48. tty_flip_buffer_push(tty_port);
  49. }
  50. int serial8250_tx_dma(struct uart_8250_port *p)
  51. {
  52. struct uart_8250_dma *dma = p->dma;
  53. struct circ_buf *xmit = &p->port.state->xmit;
  54. struct dma_async_tx_descriptor *desc;
  55. if (dma->tx_running)
  56. return -EBUSY;
  57. dma->tx_size = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
  58. if (!dma->tx_size)
  59. return -EINVAL;
  60. desc = dmaengine_prep_slave_single(dma->txchan,
  61. dma->tx_addr + xmit->tail,
  62. dma->tx_size, DMA_MEM_TO_DEV,
  63. DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
  64. if (!desc)
  65. return -EBUSY;
  66. dma->tx_running = 1;
  67. desc->callback = __dma_tx_complete;
  68. desc->callback_param = p;
  69. dma->tx_cookie = dmaengine_submit(desc);
  70. dma_sync_single_for_device(dma->txchan->device->dev, dma->tx_addr,
  71. UART_XMIT_SIZE, DMA_TO_DEVICE);
  72. dma_async_issue_pending(dma->txchan);
  73. return 0;
  74. }
  75. EXPORT_SYMBOL_GPL(serial8250_tx_dma);
  76. int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir)
  77. {
  78. struct uart_8250_dma *dma = p->dma;
  79. struct dma_async_tx_descriptor *desc;
  80. struct dma_tx_state state;
  81. int dma_status;
  82. /*
  83. * If RCVR FIFO trigger level was not reached, complete the transfer and
  84. * let 8250.c copy the remaining data.
  85. */
  86. if ((iir & 0x3f) == UART_IIR_RX_TIMEOUT) {
  87. dma_status = dmaengine_tx_status(dma->rxchan, dma->rx_cookie,
  88. &state);
  89. if (dma_status == DMA_IN_PROGRESS) {
  90. dmaengine_pause(dma->rxchan);
  91. __dma_rx_complete(p);
  92. }
  93. return -ETIMEDOUT;
  94. }
  95. desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr,
  96. dma->rx_size, DMA_DEV_TO_MEM,
  97. DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
  98. if (!desc)
  99. return -EBUSY;
  100. desc->callback = __dma_rx_complete;
  101. desc->callback_param = p;
  102. dma->rx_cookie = dmaengine_submit(desc);
  103. dma_sync_single_for_device(dma->rxchan->device->dev, dma->rx_addr,
  104. dma->rx_size, DMA_FROM_DEVICE);
  105. dma_async_issue_pending(dma->rxchan);
  106. return 0;
  107. }
  108. EXPORT_SYMBOL_GPL(serial8250_rx_dma);
  109. int serial8250_request_dma(struct uart_8250_port *p)
  110. {
  111. struct uart_8250_dma *dma = p->dma;
  112. dma_cap_mask_t mask;
  113. dma->rxconf.src_addr = p->port.mapbase + UART_RX;
  114. dma->txconf.dst_addr = p->port.mapbase + UART_TX;
  115. dma_cap_zero(mask);
  116. dma_cap_set(DMA_SLAVE, mask);
  117. /* Get a channel for RX */
  118. dma->rxchan = dma_request_channel(mask, dma->fn, dma->rx_param);
  119. if (!dma->rxchan)
  120. return -ENODEV;
  121. dmaengine_slave_config(dma->rxchan, &dma->rxconf);
  122. /* Get a channel for TX */
  123. dma->txchan = dma_request_channel(mask, dma->fn, dma->tx_param);
  124. if (!dma->txchan) {
  125. dma_release_channel(dma->rxchan);
  126. return -ENODEV;
  127. }
  128. dmaengine_slave_config(dma->txchan, &dma->txconf);
  129. /* RX buffer */
  130. if (!dma->rx_size)
  131. dma->rx_size = PAGE_SIZE;
  132. dma->rx_buf = dma_alloc_coherent(dma->rxchan->device->dev, dma->rx_size,
  133. &dma->rx_addr, GFP_KERNEL);
  134. if (!dma->rx_buf) {
  135. dma_release_channel(dma->rxchan);
  136. dma_release_channel(dma->txchan);
  137. return -ENOMEM;
  138. }
  139. /* TX buffer */
  140. dma->tx_addr = dma_map_single(dma->txchan->device->dev,
  141. p->port.state->xmit.buf,
  142. UART_XMIT_SIZE,
  143. DMA_TO_DEVICE);
  144. dev_dbg_ratelimited(p->port.dev, "got both dma channels\n");
  145. return 0;
  146. }
  147. EXPORT_SYMBOL_GPL(serial8250_request_dma);
  148. void serial8250_release_dma(struct uart_8250_port *p)
  149. {
  150. struct uart_8250_dma *dma = p->dma;
  151. if (!dma)
  152. return;
  153. /* Release RX resources */
  154. dmaengine_terminate_all(dma->rxchan);
  155. dma_free_coherent(dma->rxchan->device->dev, dma->rx_size, dma->rx_buf,
  156. dma->rx_addr);
  157. dma_release_channel(dma->rxchan);
  158. dma->rxchan = NULL;
  159. /* Release TX resources */
  160. dmaengine_terminate_all(dma->txchan);
  161. dma_unmap_single(dma->txchan->device->dev, dma->tx_addr,
  162. UART_XMIT_SIZE, DMA_TO_DEVICE);
  163. dma_release_channel(dma->txchan);
  164. dma->txchan = NULL;
  165. dma->tx_running = 0;
  166. dev_dbg_ratelimited(p->port.dev, "dma channels released\n");
  167. }
  168. EXPORT_SYMBOL_GPL(serial8250_release_dma);