s5m8767.c 25 KB

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  1. /*
  2. * s5m8767.c
  3. *
  4. * Copyright (c) 2011 Samsung Electronics Co., Ltd
  5. * http://www.samsung.com
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License as published by the
  9. * Free Software Foundation; either version 2 of the License, or (at your
  10. * option) any later version.
  11. *
  12. */
  13. #include <linux/bug.h>
  14. #include <linux/err.h>
  15. #include <linux/gpio.h>
  16. #include <linux/of_gpio.h>
  17. #include <linux/slab.h>
  18. #include <linux/module.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/regulator/driver.h>
  21. #include <linux/regulator/machine.h>
  22. #include <linux/mfd/samsung/core.h>
  23. #include <linux/mfd/samsung/s5m8767.h>
  24. #include <linux/regulator/of_regulator.h>
  25. #define S5M8767_OPMODE_NORMAL_MODE 0x1
  26. struct s5m8767_info {
  27. struct device *dev;
  28. struct sec_pmic_dev *iodev;
  29. int num_regulators;
  30. struct regulator_dev **rdev;
  31. struct sec_opmode_data *opmode;
  32. int ramp_delay;
  33. bool buck2_ramp;
  34. bool buck3_ramp;
  35. bool buck4_ramp;
  36. bool buck2_gpiodvs;
  37. bool buck3_gpiodvs;
  38. bool buck4_gpiodvs;
  39. u8 buck2_vol[8];
  40. u8 buck3_vol[8];
  41. u8 buck4_vol[8];
  42. int buck_gpios[3];
  43. int buck_ds[3];
  44. int buck_gpioindex;
  45. };
  46. struct sec_voltage_desc {
  47. int max;
  48. int min;
  49. int step;
  50. };
  51. static const struct sec_voltage_desc buck_voltage_val1 = {
  52. .max = 2225000,
  53. .min = 650000,
  54. .step = 6250,
  55. };
  56. static const struct sec_voltage_desc buck_voltage_val2 = {
  57. .max = 1600000,
  58. .min = 600000,
  59. .step = 6250,
  60. };
  61. static const struct sec_voltage_desc buck_voltage_val3 = {
  62. .max = 3000000,
  63. .min = 750000,
  64. .step = 12500,
  65. };
  66. static const struct sec_voltage_desc ldo_voltage_val1 = {
  67. .max = 3950000,
  68. .min = 800000,
  69. .step = 50000,
  70. };
  71. static const struct sec_voltage_desc ldo_voltage_val2 = {
  72. .max = 2375000,
  73. .min = 800000,
  74. .step = 25000,
  75. };
  76. static const struct sec_voltage_desc *reg_voltage_map[] = {
  77. [S5M8767_LDO1] = &ldo_voltage_val2,
  78. [S5M8767_LDO2] = &ldo_voltage_val2,
  79. [S5M8767_LDO3] = &ldo_voltage_val1,
  80. [S5M8767_LDO4] = &ldo_voltage_val1,
  81. [S5M8767_LDO5] = &ldo_voltage_val1,
  82. [S5M8767_LDO6] = &ldo_voltage_val2,
  83. [S5M8767_LDO7] = &ldo_voltage_val2,
  84. [S5M8767_LDO8] = &ldo_voltage_val2,
  85. [S5M8767_LDO9] = &ldo_voltage_val1,
  86. [S5M8767_LDO10] = &ldo_voltage_val1,
  87. [S5M8767_LDO11] = &ldo_voltage_val1,
  88. [S5M8767_LDO12] = &ldo_voltage_val1,
  89. [S5M8767_LDO13] = &ldo_voltage_val1,
  90. [S5M8767_LDO14] = &ldo_voltage_val1,
  91. [S5M8767_LDO15] = &ldo_voltage_val2,
  92. [S5M8767_LDO16] = &ldo_voltage_val1,
  93. [S5M8767_LDO17] = &ldo_voltage_val1,
  94. [S5M8767_LDO18] = &ldo_voltage_val1,
  95. [S5M8767_LDO19] = &ldo_voltage_val1,
  96. [S5M8767_LDO20] = &ldo_voltage_val1,
  97. [S5M8767_LDO21] = &ldo_voltage_val1,
  98. [S5M8767_LDO22] = &ldo_voltage_val1,
  99. [S5M8767_LDO23] = &ldo_voltage_val1,
  100. [S5M8767_LDO24] = &ldo_voltage_val1,
  101. [S5M8767_LDO25] = &ldo_voltage_val1,
  102. [S5M8767_LDO26] = &ldo_voltage_val1,
  103. [S5M8767_LDO27] = &ldo_voltage_val1,
  104. [S5M8767_LDO28] = &ldo_voltage_val1,
  105. [S5M8767_BUCK1] = &buck_voltage_val1,
  106. [S5M8767_BUCK2] = &buck_voltage_val2,
  107. [S5M8767_BUCK3] = &buck_voltage_val2,
  108. [S5M8767_BUCK4] = &buck_voltage_val2,
  109. [S5M8767_BUCK5] = &buck_voltage_val1,
  110. [S5M8767_BUCK6] = &buck_voltage_val1,
  111. [S5M8767_BUCK7] = NULL,
  112. [S5M8767_BUCK8] = NULL,
  113. [S5M8767_BUCK9] = &buck_voltage_val3,
  114. };
  115. static unsigned int s5m8767_opmode_reg[][4] = {
  116. /* {OFF, ON, LOWPOWER, SUSPEND} */
  117. /* LDO1 ... LDO28 */
  118. {0x0, 0x3, 0x2, 0x1}, /* LDO1 */
  119. {0x0, 0x3, 0x2, 0x1},
  120. {0x0, 0x3, 0x2, 0x1},
  121. {0x0, 0x0, 0x0, 0x0},
  122. {0x0, 0x3, 0x2, 0x1}, /* LDO5 */
  123. {0x0, 0x3, 0x2, 0x1},
  124. {0x0, 0x3, 0x2, 0x1},
  125. {0x0, 0x3, 0x2, 0x1},
  126. {0x0, 0x3, 0x2, 0x1},
  127. {0x0, 0x3, 0x2, 0x1}, /* LDO10 */
  128. {0x0, 0x3, 0x2, 0x1},
  129. {0x0, 0x3, 0x2, 0x1},
  130. {0x0, 0x3, 0x2, 0x1},
  131. {0x0, 0x3, 0x2, 0x1},
  132. {0x0, 0x3, 0x2, 0x1}, /* LDO15 */
  133. {0x0, 0x3, 0x2, 0x1},
  134. {0x0, 0x3, 0x2, 0x1},
  135. {0x0, 0x0, 0x0, 0x0},
  136. {0x0, 0x3, 0x2, 0x1},
  137. {0x0, 0x3, 0x2, 0x1}, /* LDO20 */
  138. {0x0, 0x3, 0x2, 0x1},
  139. {0x0, 0x3, 0x2, 0x1},
  140. {0x0, 0x0, 0x0, 0x0},
  141. {0x0, 0x3, 0x2, 0x1},
  142. {0x0, 0x3, 0x2, 0x1}, /* LDO25 */
  143. {0x0, 0x3, 0x2, 0x1},
  144. {0x0, 0x3, 0x2, 0x1},
  145. {0x0, 0x3, 0x2, 0x1}, /* LDO28 */
  146. /* BUCK1 ... BUCK9 */
  147. {0x0, 0x3, 0x1, 0x1}, /* BUCK1 */
  148. {0x0, 0x3, 0x1, 0x1},
  149. {0x0, 0x3, 0x1, 0x1},
  150. {0x0, 0x3, 0x1, 0x1},
  151. {0x0, 0x3, 0x2, 0x1}, /* BUCK5 */
  152. {0x0, 0x3, 0x1, 0x1},
  153. {0x0, 0x3, 0x1, 0x1},
  154. {0x0, 0x3, 0x1, 0x1},
  155. {0x0, 0x3, 0x1, 0x1}, /* BUCK9 */
  156. };
  157. static int s5m8767_get_register(struct regulator_dev *rdev, int *reg,
  158. int *enable_ctrl)
  159. {
  160. int i, reg_id = rdev_get_id(rdev);
  161. unsigned int mode;
  162. struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
  163. switch (reg_id) {
  164. case S5M8767_LDO1 ... S5M8767_LDO2:
  165. *reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1);
  166. break;
  167. case S5M8767_LDO3 ... S5M8767_LDO28:
  168. *reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3);
  169. break;
  170. case S5M8767_BUCK1:
  171. *reg = S5M8767_REG_BUCK1CTRL1;
  172. break;
  173. case S5M8767_BUCK2 ... S5M8767_BUCK4:
  174. *reg = S5M8767_REG_BUCK2CTRL + (reg_id - S5M8767_BUCK2) * 9;
  175. break;
  176. case S5M8767_BUCK5:
  177. *reg = S5M8767_REG_BUCK5CTRL1;
  178. break;
  179. case S5M8767_BUCK6 ... S5M8767_BUCK9:
  180. *reg = S5M8767_REG_BUCK6CTRL1 + (reg_id - S5M8767_BUCK6) * 2;
  181. break;
  182. default:
  183. return -EINVAL;
  184. }
  185. for (i = 0; i < s5m8767->num_regulators; i++) {
  186. if (s5m8767->opmode[i].id == reg_id) {
  187. mode = s5m8767->opmode[i].mode;
  188. break;
  189. }
  190. }
  191. if (i < s5m8767->num_regulators)
  192. *enable_ctrl =
  193. s5m8767_opmode_reg[reg_id][mode] << S5M8767_ENCTRL_SHIFT;
  194. return 0;
  195. }
  196. static int s5m8767_reg_is_enabled(struct regulator_dev *rdev)
  197. {
  198. struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
  199. int ret, reg;
  200. int mask = 0xc0, enable_ctrl;
  201. unsigned int val;
  202. ret = s5m8767_get_register(rdev, &reg, &enable_ctrl);
  203. if (ret == -EINVAL)
  204. return 1;
  205. else if (ret)
  206. return ret;
  207. ret = sec_reg_read(s5m8767->iodev, reg, &val);
  208. if (ret)
  209. return ret;
  210. return (val & mask) == enable_ctrl;
  211. }
  212. static int s5m8767_reg_enable(struct regulator_dev *rdev)
  213. {
  214. struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
  215. int ret, reg;
  216. int mask = 0xc0, enable_ctrl;
  217. ret = s5m8767_get_register(rdev, &reg, &enable_ctrl);
  218. if (ret)
  219. return ret;
  220. return sec_reg_update(s5m8767->iodev, reg, enable_ctrl, mask);
  221. }
  222. static int s5m8767_reg_disable(struct regulator_dev *rdev)
  223. {
  224. struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
  225. int ret, reg;
  226. int mask = 0xc0, enable_ctrl;
  227. ret = s5m8767_get_register(rdev, &reg, &enable_ctrl);
  228. if (ret)
  229. return ret;
  230. return sec_reg_update(s5m8767->iodev, reg, ~mask, mask);
  231. }
  232. static int s5m8767_get_vsel_reg(int reg_id, struct s5m8767_info *s5m8767)
  233. {
  234. int reg;
  235. switch (reg_id) {
  236. case S5M8767_LDO1 ... S5M8767_LDO2:
  237. reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1);
  238. break;
  239. case S5M8767_LDO3 ... S5M8767_LDO28:
  240. reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3);
  241. break;
  242. case S5M8767_BUCK1:
  243. reg = S5M8767_REG_BUCK1CTRL2;
  244. break;
  245. case S5M8767_BUCK2:
  246. reg = S5M8767_REG_BUCK2DVS1;
  247. if (s5m8767->buck2_gpiodvs)
  248. reg += s5m8767->buck_gpioindex;
  249. break;
  250. case S5M8767_BUCK3:
  251. reg = S5M8767_REG_BUCK3DVS1;
  252. if (s5m8767->buck3_gpiodvs)
  253. reg += s5m8767->buck_gpioindex;
  254. break;
  255. case S5M8767_BUCK4:
  256. reg = S5M8767_REG_BUCK4DVS1;
  257. if (s5m8767->buck4_gpiodvs)
  258. reg += s5m8767->buck_gpioindex;
  259. break;
  260. case S5M8767_BUCK5:
  261. reg = S5M8767_REG_BUCK5CTRL2;
  262. break;
  263. case S5M8767_BUCK6 ... S5M8767_BUCK9:
  264. reg = S5M8767_REG_BUCK6CTRL2 + (reg_id - S5M8767_BUCK6) * 2;
  265. break;
  266. default:
  267. return -EINVAL;
  268. }
  269. return reg;
  270. }
  271. static int s5m8767_convert_voltage_to_sel(const struct sec_voltage_desc *desc,
  272. int min_vol)
  273. {
  274. int selector = 0;
  275. if (desc == NULL)
  276. return -EINVAL;
  277. if (min_vol > desc->max)
  278. return -EINVAL;
  279. if (min_vol < desc->min)
  280. min_vol = desc->min;
  281. selector = DIV_ROUND_UP(min_vol - desc->min, desc->step);
  282. if (desc->min + desc->step * selector > desc->max)
  283. return -EINVAL;
  284. return selector;
  285. }
  286. static inline int s5m8767_set_high(struct s5m8767_info *s5m8767)
  287. {
  288. int temp_index = s5m8767->buck_gpioindex;
  289. gpio_set_value(s5m8767->buck_gpios[0], (temp_index >> 2) & 0x1);
  290. gpio_set_value(s5m8767->buck_gpios[1], (temp_index >> 1) & 0x1);
  291. gpio_set_value(s5m8767->buck_gpios[2], temp_index & 0x1);
  292. return 0;
  293. }
  294. static inline int s5m8767_set_low(struct s5m8767_info *s5m8767)
  295. {
  296. int temp_index = s5m8767->buck_gpioindex;
  297. gpio_set_value(s5m8767->buck_gpios[2], temp_index & 0x1);
  298. gpio_set_value(s5m8767->buck_gpios[1], (temp_index >> 1) & 0x1);
  299. gpio_set_value(s5m8767->buck_gpios[0], (temp_index >> 2) & 0x1);
  300. return 0;
  301. }
  302. static int s5m8767_set_voltage_sel(struct regulator_dev *rdev,
  303. unsigned selector)
  304. {
  305. struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
  306. int reg_id = rdev_get_id(rdev);
  307. int old_index, index = 0;
  308. u8 *buck234_vol = NULL;
  309. switch (reg_id) {
  310. case S5M8767_LDO1 ... S5M8767_LDO28:
  311. break;
  312. case S5M8767_BUCK1 ... S5M8767_BUCK6:
  313. if (reg_id == S5M8767_BUCK2 && s5m8767->buck2_gpiodvs)
  314. buck234_vol = &s5m8767->buck2_vol[0];
  315. else if (reg_id == S5M8767_BUCK3 && s5m8767->buck3_gpiodvs)
  316. buck234_vol = &s5m8767->buck3_vol[0];
  317. else if (reg_id == S5M8767_BUCK4 && s5m8767->buck4_gpiodvs)
  318. buck234_vol = &s5m8767->buck4_vol[0];
  319. break;
  320. case S5M8767_BUCK7 ... S5M8767_BUCK8:
  321. return -EINVAL;
  322. case S5M8767_BUCK9:
  323. break;
  324. default:
  325. return -EINVAL;
  326. }
  327. /* buck234_vol != NULL means to control buck234 voltage via DVS GPIO */
  328. if (buck234_vol) {
  329. while (*buck234_vol != selector) {
  330. buck234_vol++;
  331. index++;
  332. }
  333. old_index = s5m8767->buck_gpioindex;
  334. s5m8767->buck_gpioindex = index;
  335. if (index > old_index)
  336. return s5m8767_set_high(s5m8767);
  337. else
  338. return s5m8767_set_low(s5m8767);
  339. } else {
  340. return regulator_set_voltage_sel_regmap(rdev, selector);
  341. }
  342. }
  343. static int s5m8767_set_voltage_time_sel(struct regulator_dev *rdev,
  344. unsigned int old_sel,
  345. unsigned int new_sel)
  346. {
  347. struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
  348. const struct sec_voltage_desc *desc;
  349. int reg_id = rdev_get_id(rdev);
  350. desc = reg_voltage_map[reg_id];
  351. if ((old_sel < new_sel) && s5m8767->ramp_delay)
  352. return DIV_ROUND_UP(desc->step * (new_sel - old_sel),
  353. s5m8767->ramp_delay * 1000);
  354. return 0;
  355. }
  356. static struct regulator_ops s5m8767_ops = {
  357. .list_voltage = regulator_list_voltage_linear,
  358. .is_enabled = s5m8767_reg_is_enabled,
  359. .enable = s5m8767_reg_enable,
  360. .disable = s5m8767_reg_disable,
  361. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  362. .set_voltage_sel = s5m8767_set_voltage_sel,
  363. .set_voltage_time_sel = s5m8767_set_voltage_time_sel,
  364. };
  365. static struct regulator_ops s5m8767_buck78_ops = {
  366. .is_enabled = s5m8767_reg_is_enabled,
  367. .enable = s5m8767_reg_enable,
  368. .disable = s5m8767_reg_disable,
  369. };
  370. #define s5m8767_regulator_desc(_name) { \
  371. .name = #_name, \
  372. .id = S5M8767_##_name, \
  373. .ops = &s5m8767_ops, \
  374. .type = REGULATOR_VOLTAGE, \
  375. .owner = THIS_MODULE, \
  376. }
  377. #define s5m8767_regulator_buck78_desc(_name) { \
  378. .name = #_name, \
  379. .id = S5M8767_##_name, \
  380. .ops = &s5m8767_buck78_ops, \
  381. .type = REGULATOR_VOLTAGE, \
  382. .owner = THIS_MODULE, \
  383. }
  384. static struct regulator_desc regulators[] = {
  385. s5m8767_regulator_desc(LDO1),
  386. s5m8767_regulator_desc(LDO2),
  387. s5m8767_regulator_desc(LDO3),
  388. s5m8767_regulator_desc(LDO4),
  389. s5m8767_regulator_desc(LDO5),
  390. s5m8767_regulator_desc(LDO6),
  391. s5m8767_regulator_desc(LDO7),
  392. s5m8767_regulator_desc(LDO8),
  393. s5m8767_regulator_desc(LDO9),
  394. s5m8767_regulator_desc(LDO10),
  395. s5m8767_regulator_desc(LDO11),
  396. s5m8767_regulator_desc(LDO12),
  397. s5m8767_regulator_desc(LDO13),
  398. s5m8767_regulator_desc(LDO14),
  399. s5m8767_regulator_desc(LDO15),
  400. s5m8767_regulator_desc(LDO16),
  401. s5m8767_regulator_desc(LDO17),
  402. s5m8767_regulator_desc(LDO18),
  403. s5m8767_regulator_desc(LDO19),
  404. s5m8767_regulator_desc(LDO20),
  405. s5m8767_regulator_desc(LDO21),
  406. s5m8767_regulator_desc(LDO22),
  407. s5m8767_regulator_desc(LDO23),
  408. s5m8767_regulator_desc(LDO24),
  409. s5m8767_regulator_desc(LDO25),
  410. s5m8767_regulator_desc(LDO26),
  411. s5m8767_regulator_desc(LDO27),
  412. s5m8767_regulator_desc(LDO28),
  413. s5m8767_regulator_desc(BUCK1),
  414. s5m8767_regulator_desc(BUCK2),
  415. s5m8767_regulator_desc(BUCK3),
  416. s5m8767_regulator_desc(BUCK4),
  417. s5m8767_regulator_desc(BUCK5),
  418. s5m8767_regulator_desc(BUCK6),
  419. s5m8767_regulator_buck78_desc(BUCK7),
  420. s5m8767_regulator_buck78_desc(BUCK8),
  421. s5m8767_regulator_desc(BUCK9),
  422. };
  423. #ifdef CONFIG_OF
  424. static int s5m8767_pmic_dt_parse_dvs_gpio(struct sec_pmic_dev *iodev,
  425. struct sec_platform_data *pdata,
  426. struct device_node *pmic_np)
  427. {
  428. int i, gpio;
  429. for (i = 0; i < 3; i++) {
  430. gpio = of_get_named_gpio(pmic_np,
  431. "s5m8767,pmic-buck-dvs-gpios", i);
  432. if (!gpio_is_valid(gpio)) {
  433. dev_err(iodev->dev, "invalid gpio[%d]: %d\n", i, gpio);
  434. return -EINVAL;
  435. }
  436. pdata->buck_gpios[i] = gpio;
  437. }
  438. return 0;
  439. }
  440. static int s5m8767_pmic_dt_parse_ds_gpio(struct sec_pmic_dev *iodev,
  441. struct sec_platform_data *pdata,
  442. struct device_node *pmic_np)
  443. {
  444. int i, gpio;
  445. for (i = 0; i < 3; i++) {
  446. gpio = of_get_named_gpio(pmic_np,
  447. "s5m8767,pmic-buck-ds-gpios", i);
  448. if (!gpio_is_valid(gpio)) {
  449. dev_err(iodev->dev, "invalid gpio[%d]: %d\n", i, gpio);
  450. return -EINVAL;
  451. }
  452. pdata->buck_ds[i] = gpio;
  453. }
  454. return 0;
  455. }
  456. static int s5m8767_pmic_dt_parse_pdata(struct platform_device *pdev,
  457. struct sec_platform_data *pdata)
  458. {
  459. struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
  460. struct device_node *pmic_np, *regulators_np, *reg_np;
  461. struct sec_regulator_data *rdata;
  462. struct sec_opmode_data *rmode;
  463. unsigned int i, dvs_voltage_nr = 1, ret;
  464. pmic_np = iodev->dev->of_node;
  465. if (!pmic_np) {
  466. dev_err(iodev->dev, "could not find pmic sub-node\n");
  467. return -ENODEV;
  468. }
  469. regulators_np = of_find_node_by_name(pmic_np, "regulators");
  470. if (!regulators_np) {
  471. dev_err(iodev->dev, "could not find regulators sub-node\n");
  472. return -EINVAL;
  473. }
  474. /* count the number of regulators to be supported in pmic */
  475. pdata->num_regulators = of_get_child_count(regulators_np);
  476. rdata = devm_kzalloc(&pdev->dev, sizeof(*rdata) *
  477. pdata->num_regulators, GFP_KERNEL);
  478. if (!rdata) {
  479. dev_err(iodev->dev,
  480. "could not allocate memory for regulator data\n");
  481. return -ENOMEM;
  482. }
  483. rmode = devm_kzalloc(&pdev->dev, sizeof(*rmode) *
  484. pdata->num_regulators, GFP_KERNEL);
  485. if (!rdata) {
  486. dev_err(iodev->dev,
  487. "could not allocate memory for regulator mode\n");
  488. return -ENOMEM;
  489. }
  490. pdata->regulators = rdata;
  491. pdata->opmode = rmode;
  492. for_each_child_of_node(regulators_np, reg_np) {
  493. for (i = 0; i < ARRAY_SIZE(regulators); i++)
  494. if (!of_node_cmp(reg_np->name, regulators[i].name))
  495. break;
  496. if (i == ARRAY_SIZE(regulators)) {
  497. dev_warn(iodev->dev,
  498. "don't know how to configure regulator %s\n",
  499. reg_np->name);
  500. continue;
  501. }
  502. rdata->id = i;
  503. rdata->initdata = of_get_regulator_init_data(
  504. &pdev->dev, reg_np);
  505. rdata->reg_node = reg_np;
  506. rdata++;
  507. rmode->id = i;
  508. if (of_property_read_u32(reg_np, "op_mode",
  509. &rmode->mode)) {
  510. dev_warn(iodev->dev,
  511. "no op_mode property property at %s\n",
  512. reg_np->full_name);
  513. rmode->mode = S5M8767_OPMODE_NORMAL_MODE;
  514. }
  515. rmode++;
  516. }
  517. if (of_get_property(pmic_np, "s5m8767,pmic-buck2-uses-gpio-dvs", NULL))
  518. pdata->buck2_gpiodvs = true;
  519. if (of_get_property(pmic_np, "s5m8767,pmic-buck3-uses-gpio-dvs", NULL))
  520. pdata->buck3_gpiodvs = true;
  521. if (of_get_property(pmic_np, "s5m8767,pmic-buck4-uses-gpio-dvs", NULL))
  522. pdata->buck4_gpiodvs = true;
  523. if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs ||
  524. pdata->buck4_gpiodvs) {
  525. ret = s5m8767_pmic_dt_parse_dvs_gpio(iodev, pdata, pmic_np);
  526. if (ret)
  527. return -EINVAL;
  528. if (of_property_read_u32(pmic_np,
  529. "s5m8767,pmic-buck-default-dvs-idx",
  530. &pdata->buck_default_idx)) {
  531. pdata->buck_default_idx = 0;
  532. } else {
  533. if (pdata->buck_default_idx >= 8) {
  534. pdata->buck_default_idx = 0;
  535. dev_info(iodev->dev,
  536. "invalid value for default dvs index, use 0\n");
  537. }
  538. }
  539. dvs_voltage_nr = 8;
  540. }
  541. ret = s5m8767_pmic_dt_parse_ds_gpio(iodev, pdata, pmic_np);
  542. if (ret)
  543. return -EINVAL;
  544. if (of_property_read_u32_array(pmic_np,
  545. "s5m8767,pmic-buck2-dvs-voltage",
  546. pdata->buck2_voltage, dvs_voltage_nr)) {
  547. dev_err(iodev->dev, "buck2 voltages not specified\n");
  548. return -EINVAL;
  549. }
  550. if (of_property_read_u32_array(pmic_np,
  551. "s5m8767,pmic-buck3-dvs-voltage",
  552. pdata->buck3_voltage, dvs_voltage_nr)) {
  553. dev_err(iodev->dev, "buck3 voltages not specified\n");
  554. return -EINVAL;
  555. }
  556. if (of_property_read_u32_array(pmic_np,
  557. "s5m8767,pmic-buck4-dvs-voltage",
  558. pdata->buck4_voltage, dvs_voltage_nr)) {
  559. dev_err(iodev->dev, "buck4 voltages not specified\n");
  560. return -EINVAL;
  561. }
  562. return 0;
  563. }
  564. #else
  565. static int s5m8767_pmic_dt_parse_pdata(struct platform_device *pdev,
  566. struct sec_platform_data *pdata)
  567. {
  568. return 0;
  569. }
  570. #endif /* CONFIG_OF */
  571. static int s5m8767_pmic_probe(struct platform_device *pdev)
  572. {
  573. struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
  574. struct sec_platform_data *pdata = iodev->pdata;
  575. struct regulator_config config = { };
  576. struct regulator_dev **rdev;
  577. struct s5m8767_info *s5m8767;
  578. int i, ret, size, buck_init;
  579. if (!pdata) {
  580. dev_err(pdev->dev.parent, "Platform data not supplied\n");
  581. return -ENODEV;
  582. }
  583. if (iodev->dev->of_node) {
  584. ret = s5m8767_pmic_dt_parse_pdata(pdev, pdata);
  585. if (ret)
  586. return ret;
  587. }
  588. if (pdata->buck2_gpiodvs) {
  589. if (pdata->buck3_gpiodvs || pdata->buck4_gpiodvs) {
  590. dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
  591. return -EINVAL;
  592. }
  593. }
  594. if (pdata->buck3_gpiodvs) {
  595. if (pdata->buck2_gpiodvs || pdata->buck4_gpiodvs) {
  596. dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
  597. return -EINVAL;
  598. }
  599. }
  600. if (pdata->buck4_gpiodvs) {
  601. if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs) {
  602. dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
  603. return -EINVAL;
  604. }
  605. }
  606. s5m8767 = devm_kzalloc(&pdev->dev, sizeof(struct s5m8767_info),
  607. GFP_KERNEL);
  608. if (!s5m8767)
  609. return -ENOMEM;
  610. size = sizeof(struct regulator_dev *) * (S5M8767_REG_MAX - 2);
  611. s5m8767->rdev = devm_kzalloc(&pdev->dev, size, GFP_KERNEL);
  612. if (!s5m8767->rdev)
  613. return -ENOMEM;
  614. rdev = s5m8767->rdev;
  615. s5m8767->dev = &pdev->dev;
  616. s5m8767->iodev = iodev;
  617. s5m8767->num_regulators = pdata->num_regulators;
  618. platform_set_drvdata(pdev, s5m8767);
  619. s5m8767->buck_gpioindex = pdata->buck_default_idx;
  620. s5m8767->buck2_gpiodvs = pdata->buck2_gpiodvs;
  621. s5m8767->buck3_gpiodvs = pdata->buck3_gpiodvs;
  622. s5m8767->buck4_gpiodvs = pdata->buck4_gpiodvs;
  623. s5m8767->buck_gpios[0] = pdata->buck_gpios[0];
  624. s5m8767->buck_gpios[1] = pdata->buck_gpios[1];
  625. s5m8767->buck_gpios[2] = pdata->buck_gpios[2];
  626. s5m8767->buck_ds[0] = pdata->buck_ds[0];
  627. s5m8767->buck_ds[1] = pdata->buck_ds[1];
  628. s5m8767->buck_ds[2] = pdata->buck_ds[2];
  629. s5m8767->ramp_delay = pdata->buck_ramp_delay;
  630. s5m8767->buck2_ramp = pdata->buck2_ramp_enable;
  631. s5m8767->buck3_ramp = pdata->buck3_ramp_enable;
  632. s5m8767->buck4_ramp = pdata->buck4_ramp_enable;
  633. s5m8767->opmode = pdata->opmode;
  634. buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
  635. pdata->buck2_init);
  636. sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK2DVS2, buck_init);
  637. buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
  638. pdata->buck3_init);
  639. sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK3DVS2, buck_init);
  640. buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
  641. pdata->buck4_init);
  642. sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK4DVS2, buck_init);
  643. for (i = 0; i < 8; i++) {
  644. if (s5m8767->buck2_gpiodvs) {
  645. s5m8767->buck2_vol[i] =
  646. s5m8767_convert_voltage_to_sel(
  647. &buck_voltage_val2,
  648. pdata->buck2_voltage[i]);
  649. }
  650. if (s5m8767->buck3_gpiodvs) {
  651. s5m8767->buck3_vol[i] =
  652. s5m8767_convert_voltage_to_sel(
  653. &buck_voltage_val2,
  654. pdata->buck3_voltage[i]);
  655. }
  656. if (s5m8767->buck4_gpiodvs) {
  657. s5m8767->buck4_vol[i] =
  658. s5m8767_convert_voltage_to_sel(
  659. &buck_voltage_val2,
  660. pdata->buck4_voltage[i]);
  661. }
  662. }
  663. if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs ||
  664. pdata->buck4_gpiodvs) {
  665. if (!gpio_is_valid(pdata->buck_gpios[0]) ||
  666. !gpio_is_valid(pdata->buck_gpios[1]) ||
  667. !gpio_is_valid(pdata->buck_gpios[2])) {
  668. dev_err(&pdev->dev, "GPIO NOT VALID\n");
  669. return -EINVAL;
  670. }
  671. ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[0],
  672. "S5M8767 SET1");
  673. if (ret)
  674. return ret;
  675. ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[1],
  676. "S5M8767 SET2");
  677. if (ret)
  678. return ret;
  679. ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[2],
  680. "S5M8767 SET3");
  681. if (ret)
  682. return ret;
  683. /* SET1 GPIO */
  684. gpio_direction_output(pdata->buck_gpios[0],
  685. (s5m8767->buck_gpioindex >> 2) & 0x1);
  686. /* SET2 GPIO */
  687. gpio_direction_output(pdata->buck_gpios[1],
  688. (s5m8767->buck_gpioindex >> 1) & 0x1);
  689. /* SET3 GPIO */
  690. gpio_direction_output(pdata->buck_gpios[2],
  691. (s5m8767->buck_gpioindex >> 0) & 0x1);
  692. }
  693. ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[0], "S5M8767 DS2");
  694. if (ret)
  695. return ret;
  696. ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[1], "S5M8767 DS3");
  697. if (ret)
  698. return ret;
  699. ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[2], "S5M8767 DS4");
  700. if (ret)
  701. return ret;
  702. /* DS2 GPIO */
  703. gpio_direction_output(pdata->buck_ds[0], 0x0);
  704. /* DS3 GPIO */
  705. gpio_direction_output(pdata->buck_ds[1], 0x0);
  706. /* DS4 GPIO */
  707. gpio_direction_output(pdata->buck_ds[2], 0x0);
  708. if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs ||
  709. pdata->buck4_gpiodvs) {
  710. sec_reg_update(s5m8767->iodev, S5M8767_REG_BUCK2CTRL,
  711. (pdata->buck2_gpiodvs) ? (1 << 1) : (0 << 1),
  712. 1 << 1);
  713. sec_reg_update(s5m8767->iodev, S5M8767_REG_BUCK3CTRL,
  714. (pdata->buck3_gpiodvs) ? (1 << 1) : (0 << 1),
  715. 1 << 1);
  716. sec_reg_update(s5m8767->iodev, S5M8767_REG_BUCK4CTRL,
  717. (pdata->buck4_gpiodvs) ? (1 << 1) : (0 << 1),
  718. 1 << 1);
  719. }
  720. /* Initialize GPIO DVS registers */
  721. for (i = 0; i < 8; i++) {
  722. if (s5m8767->buck2_gpiodvs) {
  723. sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK2DVS1 + i,
  724. s5m8767->buck2_vol[i]);
  725. }
  726. if (s5m8767->buck3_gpiodvs) {
  727. sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK3DVS1 + i,
  728. s5m8767->buck3_vol[i]);
  729. }
  730. if (s5m8767->buck4_gpiodvs) {
  731. sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK4DVS1 + i,
  732. s5m8767->buck4_vol[i]);
  733. }
  734. }
  735. if (s5m8767->buck2_ramp)
  736. sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x08, 0x08);
  737. if (s5m8767->buck3_ramp)
  738. sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x04, 0x04);
  739. if (s5m8767->buck4_ramp)
  740. sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x02, 0x02);
  741. if (s5m8767->buck2_ramp || s5m8767->buck3_ramp
  742. || s5m8767->buck4_ramp) {
  743. switch (s5m8767->ramp_delay) {
  744. case 5:
  745. sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
  746. 0x40, 0xf0);
  747. break;
  748. case 10:
  749. sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
  750. 0x90, 0xf0);
  751. break;
  752. case 25:
  753. sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
  754. 0xd0, 0xf0);
  755. break;
  756. case 50:
  757. sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
  758. 0xe0, 0xf0);
  759. break;
  760. case 100:
  761. sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
  762. 0xf0, 0xf0);
  763. break;
  764. default:
  765. sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
  766. 0x90, 0xf0);
  767. }
  768. }
  769. for (i = 0; i < pdata->num_regulators; i++) {
  770. const struct sec_voltage_desc *desc;
  771. int id = pdata->regulators[i].id;
  772. desc = reg_voltage_map[id];
  773. if (desc) {
  774. regulators[id].n_voltages =
  775. (desc->max - desc->min) / desc->step + 1;
  776. regulators[id].min_uV = desc->min;
  777. regulators[id].uV_step = desc->step;
  778. regulators[id].vsel_reg =
  779. s5m8767_get_vsel_reg(id, s5m8767);
  780. if (id < S5M8767_BUCK1)
  781. regulators[id].vsel_mask = 0x3f;
  782. else
  783. regulators[id].vsel_mask = 0xff;
  784. }
  785. config.dev = s5m8767->dev;
  786. config.init_data = pdata->regulators[i].initdata;
  787. config.driver_data = s5m8767;
  788. config.regmap = iodev->regmap;
  789. config.of_node = pdata->regulators[i].reg_node;
  790. rdev[i] = regulator_register(&regulators[id], &config);
  791. if (IS_ERR(rdev[i])) {
  792. ret = PTR_ERR(rdev[i]);
  793. dev_err(s5m8767->dev, "regulator init failed for %d\n",
  794. id);
  795. rdev[i] = NULL;
  796. goto err;
  797. }
  798. }
  799. return 0;
  800. err:
  801. for (i = 0; i < s5m8767->num_regulators; i++)
  802. if (rdev[i])
  803. regulator_unregister(rdev[i]);
  804. return ret;
  805. }
  806. static int s5m8767_pmic_remove(struct platform_device *pdev)
  807. {
  808. struct s5m8767_info *s5m8767 = platform_get_drvdata(pdev);
  809. struct regulator_dev **rdev = s5m8767->rdev;
  810. int i;
  811. for (i = 0; i < s5m8767->num_regulators; i++)
  812. if (rdev[i])
  813. regulator_unregister(rdev[i]);
  814. return 0;
  815. }
  816. static const struct platform_device_id s5m8767_pmic_id[] = {
  817. { "s5m8767-pmic", 0},
  818. { },
  819. };
  820. MODULE_DEVICE_TABLE(platform, s5m8767_pmic_id);
  821. static struct platform_driver s5m8767_pmic_driver = {
  822. .driver = {
  823. .name = "s5m8767-pmic",
  824. .owner = THIS_MODULE,
  825. },
  826. .probe = s5m8767_pmic_probe,
  827. .remove = s5m8767_pmic_remove,
  828. .id_table = s5m8767_pmic_id,
  829. };
  830. static int __init s5m8767_pmic_init(void)
  831. {
  832. return platform_driver_register(&s5m8767_pmic_driver);
  833. }
  834. subsys_initcall(s5m8767_pmic_init);
  835. static void __exit s5m8767_pmic_exit(void)
  836. {
  837. platform_driver_unregister(&s5m8767_pmic_driver);
  838. }
  839. module_exit(s5m8767_pmic_exit);
  840. /* Module information */
  841. MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>");
  842. MODULE_DESCRIPTION("SAMSUNG S5M8767 Regulator Driver");
  843. MODULE_LICENSE("GPL");