pinctrl-pxa3xx.c 6.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227
  1. /*
  2. * linux/drivers/pinctrl/pinctrl-pxa3xx.c
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * publishhed by the Free Software Foundation.
  7. *
  8. * Copyright (C) 2011, Marvell Technology Group Ltd.
  9. *
  10. * Author: Haojian Zhuang <haojian.zhuang@marvell.com>
  11. *
  12. */
  13. #include <linux/err.h>
  14. #include <linux/module.h>
  15. #include <linux/device.h>
  16. #include <linux/io.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/slab.h>
  19. #include "pinctrl-pxa3xx.h"
  20. static struct pinctrl_gpio_range pxa3xx_pinctrl_gpio_range = {
  21. .name = "PXA3xx GPIO",
  22. .id = 0,
  23. .base = 0,
  24. .pin_base = 0,
  25. };
  26. static int pxa3xx_get_groups_count(struct pinctrl_dev *pctrldev)
  27. {
  28. struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
  29. return info->num_grps;
  30. }
  31. static const char *pxa3xx_get_group_name(struct pinctrl_dev *pctrldev,
  32. unsigned selector)
  33. {
  34. struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
  35. return info->grps[selector].name;
  36. }
  37. static int pxa3xx_get_group_pins(struct pinctrl_dev *pctrldev,
  38. unsigned selector,
  39. const unsigned **pins,
  40. unsigned *num_pins)
  41. {
  42. struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
  43. *pins = info->grps[selector].pins;
  44. *num_pins = info->grps[selector].npins;
  45. return 0;
  46. }
  47. static struct pinctrl_ops pxa3xx_pctrl_ops = {
  48. .get_groups_count = pxa3xx_get_groups_count,
  49. .get_group_name = pxa3xx_get_group_name,
  50. .get_group_pins = pxa3xx_get_group_pins,
  51. };
  52. static int pxa3xx_pmx_get_funcs_count(struct pinctrl_dev *pctrldev)
  53. {
  54. struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
  55. return info->num_funcs;
  56. }
  57. static const char *pxa3xx_pmx_get_func_name(struct pinctrl_dev *pctrldev,
  58. unsigned func)
  59. {
  60. struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
  61. return info->funcs[func].name;
  62. }
  63. static int pxa3xx_pmx_get_groups(struct pinctrl_dev *pctrldev, unsigned func,
  64. const char * const **groups,
  65. unsigned * const num_groups)
  66. {
  67. struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
  68. *groups = info->funcs[func].groups;
  69. *num_groups = info->funcs[func].num_groups;
  70. return 0;
  71. }
  72. /* Return function number. If failure, return negative value. */
  73. static int match_mux(struct pxa3xx_mfp_pin *mfp, unsigned mux)
  74. {
  75. int i;
  76. for (i = 0; i < PXA3xx_MAX_MUX; i++) {
  77. if (mfp->func[i] == mux)
  78. break;
  79. }
  80. if (i >= PXA3xx_MAX_MUX)
  81. return -EINVAL;
  82. return i;
  83. }
  84. /* check whether current pin configuration is valid. Negative for failure */
  85. static int match_group_mux(struct pxa3xx_pin_group *grp,
  86. struct pxa3xx_pinmux_info *info,
  87. unsigned mux)
  88. {
  89. int i, pin, ret = 0;
  90. for (i = 0; i < grp->npins; i++) {
  91. pin = grp->pins[i];
  92. ret = match_mux(&info->mfp[pin], mux);
  93. if (ret < 0) {
  94. dev_err(info->dev, "Can't find mux %d on pin%d\n",
  95. mux, pin);
  96. break;
  97. }
  98. }
  99. return ret;
  100. }
  101. static int pxa3xx_pmx_enable(struct pinctrl_dev *pctrldev, unsigned func,
  102. unsigned group)
  103. {
  104. struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
  105. struct pxa3xx_pin_group *pin_grp = &info->grps[group];
  106. unsigned int data;
  107. int i, mfpr, pin, pin_func;
  108. if (!pin_grp->npins ||
  109. (match_group_mux(pin_grp, info, pin_grp->mux) < 0)) {
  110. dev_err(info->dev, "Failed to set the pin group: %d\n", group);
  111. return -EINVAL;
  112. }
  113. for (i = 0; i < pin_grp->npins; i++) {
  114. pin = pin_grp->pins[i];
  115. pin_func = match_mux(&info->mfp[pin], pin_grp->mux);
  116. mfpr = info->mfp[pin].mfpr;
  117. data = readl_relaxed(info->virt_base + mfpr);
  118. data &= ~MFPR_FUNC_MASK;
  119. data |= pin_func;
  120. writel_relaxed(data, info->virt_base + mfpr);
  121. }
  122. return 0;
  123. }
  124. static int pxa3xx_pmx_request_gpio(struct pinctrl_dev *pctrldev,
  125. struct pinctrl_gpio_range *range,
  126. unsigned pin)
  127. {
  128. struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
  129. unsigned int data;
  130. int pin_func, mfpr;
  131. pin_func = match_mux(&info->mfp[pin], PXA3xx_MUX_GPIO);
  132. if (pin_func < 0) {
  133. dev_err(info->dev, "No GPIO function on pin%d (%s)\n",
  134. pin, info->pads[pin].name);
  135. return -EINVAL;
  136. }
  137. mfpr = info->mfp[pin].mfpr;
  138. /* write gpio function into mfpr register */
  139. data = readl_relaxed(info->virt_base + mfpr) & ~MFPR_FUNC_MASK;
  140. data |= pin_func;
  141. writel_relaxed(data, info->virt_base + mfpr);
  142. return 0;
  143. }
  144. static struct pinmux_ops pxa3xx_pmx_ops = {
  145. .get_functions_count = pxa3xx_pmx_get_funcs_count,
  146. .get_function_name = pxa3xx_pmx_get_func_name,
  147. .get_function_groups = pxa3xx_pmx_get_groups,
  148. .enable = pxa3xx_pmx_enable,
  149. .gpio_request_enable = pxa3xx_pmx_request_gpio,
  150. };
  151. int pxa3xx_pinctrl_register(struct platform_device *pdev,
  152. struct pxa3xx_pinmux_info *info)
  153. {
  154. struct pinctrl_desc *desc;
  155. struct resource *res;
  156. if (!info || !info->cputype)
  157. return -EINVAL;
  158. desc = info->desc;
  159. desc->pins = info->pads;
  160. desc->npins = info->num_pads;
  161. desc->pctlops = &pxa3xx_pctrl_ops;
  162. desc->pmxops = &pxa3xx_pmx_ops;
  163. info->dev = &pdev->dev;
  164. pxa3xx_pinctrl_gpio_range.npins = info->num_gpio;
  165. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  166. if (!res)
  167. return -ENOENT;
  168. info->virt_base = devm_ioremap_resource(&pdev->dev, res);
  169. if (IS_ERR(info->virt_base))
  170. return PTR_ERR(info->virt_base);
  171. info->pctrl = pinctrl_register(desc, &pdev->dev, info);
  172. if (!info->pctrl) {
  173. dev_err(&pdev->dev, "failed to register PXA pinmux driver\n");
  174. return -EINVAL;
  175. }
  176. pinctrl_add_gpio_range(info->pctrl, &pxa3xx_pinctrl_gpio_range);
  177. platform_set_drvdata(pdev, info);
  178. return 0;
  179. }
  180. int pxa3xx_pinctrl_unregister(struct platform_device *pdev)
  181. {
  182. struct pxa3xx_pinmux_info *info = platform_get_drvdata(pdev);
  183. pinctrl_unregister(info->pctrl);
  184. platform_set_drvdata(pdev, NULL);
  185. return 0;
  186. }
  187. static int __init pxa3xx_pinctrl_init(void)
  188. {
  189. pr_info("pxa3xx-pinctrl: PXA3xx pinctrl driver initializing\n");
  190. return 0;
  191. }
  192. core_initcall_sync(pxa3xx_pinctrl_init);
  193. static void __exit pxa3xx_pinctrl_exit(void)
  194. {
  195. }
  196. module_exit(pxa3xx_pinctrl_exit);
  197. MODULE_AUTHOR("Haojian Zhuang <haojian.zhuang@marvell.com>");
  198. MODULE_DESCRIPTION("PXA3xx pin control driver");
  199. MODULE_LICENSE("GPL v2");