pinctrl-mvebu.h 6.1 KB

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  1. /*
  2. * Marvell MVEBU pinctrl driver
  3. *
  4. * Authors: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
  5. * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. */
  12. #ifndef __PINCTRL_MVEBU_H__
  13. #define __PINCTRL_MVEBU_H__
  14. /**
  15. * struct mvebu_mpp_ctrl - describe a mpp control
  16. * @name: name of the control group
  17. * @pid: first pin id handled by this control
  18. * @npins: number of pins controlled by this control
  19. * @mpp_get: (optional) special function to get mpp setting
  20. * @mpp_set: (optional) special function to set mpp setting
  21. * @mpp_gpio_req: (optional) special function to request gpio
  22. * @mpp_gpio_dir: (optional) special function to set gpio direction
  23. *
  24. * A mpp_ctrl describes a muxable unit, e.g. pin, group of pins, or
  25. * internal function, inside the SoC. Each muxable unit can be switched
  26. * between two or more different settings, e.g. assign mpp pin 13 to
  27. * uart1 or sata.
  28. *
  29. * If optional mpp_get/_set functions are set these are used to get/set
  30. * a specific mode. Otherwise it is assumed that the mpp control is based
  31. * on 4-bit groups in subsequent registers. The optional mpp_gpio_req/_dir
  32. * functions can be used to allow pin settings with varying gpio pins.
  33. */
  34. struct mvebu_mpp_ctrl {
  35. const char *name;
  36. u8 pid;
  37. u8 npins;
  38. unsigned *pins;
  39. int (*mpp_get)(struct mvebu_mpp_ctrl *ctrl, unsigned long *config);
  40. int (*mpp_set)(struct mvebu_mpp_ctrl *ctrl, unsigned long config);
  41. int (*mpp_gpio_req)(struct mvebu_mpp_ctrl *ctrl, u8 pid);
  42. int (*mpp_gpio_dir)(struct mvebu_mpp_ctrl *ctrl, u8 pid, bool input);
  43. };
  44. /**
  45. * struct mvebu_mpp_ctrl_setting - describe a mpp ctrl setting
  46. * @val: ctrl setting value
  47. * @name: ctrl setting name, e.g. uart2, spi0 - unique per mpp_mode
  48. * @subname: (optional) additional ctrl setting name, e.g. rts, cts
  49. * @variant: (optional) variant identifier mask
  50. * @flags: (private) flags to store gpi/gpo/gpio capabilities
  51. *
  52. * A ctrl_setting describes a specific internal mux function that a mpp pin
  53. * can be switched to. The value (val) will be written in the corresponding
  54. * register for common mpp pin configuration registers on MVEBU. SoC specific
  55. * mpp_get/_set function may use val to distinguish between different settings.
  56. *
  57. * The name will be used to switch to this setting in DT description, e.g.
  58. * marvell,function = "uart2". subname is only for debugging purposes.
  59. *
  60. * If name is one of "gpi", "gpo", "gpio" gpio capabilities are
  61. * parsed during initialization and stored in flags.
  62. *
  63. * The variant can be used to combine different revisions of one SoC to a
  64. * common pinctrl driver. It is matched (AND) with variant of soc_info to
  65. * determine if a setting is available on the current SoC revision.
  66. */
  67. struct mvebu_mpp_ctrl_setting {
  68. u8 val;
  69. const char *name;
  70. const char *subname;
  71. u8 variant;
  72. u8 flags;
  73. #define MVEBU_SETTING_GPO (1 << 0)
  74. #define MVEBU_SETTING_GPI (1 << 1)
  75. };
  76. /**
  77. * struct mvebu_mpp_mode - link ctrl and settings
  78. * @pid: first pin id handled by this mode
  79. * @settings: list of settings available for this mode
  80. *
  81. * A mode connects all available settings with the corresponding mpp_ctrl
  82. * given by pid.
  83. */
  84. struct mvebu_mpp_mode {
  85. u8 pid;
  86. struct mvebu_mpp_ctrl_setting *settings;
  87. };
  88. /**
  89. * struct mvebu_pinctrl_soc_info - SoC specific info passed to pinctrl-mvebu
  90. * @variant: variant mask of soc_info
  91. * @controls: list of available mvebu_mpp_ctrls
  92. * @ncontrols: number of available mvebu_mpp_ctrls
  93. * @modes: list of available mvebu_mpp_modes
  94. * @nmodes: number of available mvebu_mpp_modes
  95. * @gpioranges: list of pinctrl_gpio_ranges
  96. * @ngpioranges: number of available pinctrl_gpio_ranges
  97. *
  98. * This struct describes all pinctrl related information for a specific SoC.
  99. * If variant is unequal 0 it will be matched (AND) with variant of each
  100. * setting and allows to distinguish between different revisions of one SoC.
  101. */
  102. struct mvebu_pinctrl_soc_info {
  103. u8 variant;
  104. struct mvebu_mpp_ctrl *controls;
  105. int ncontrols;
  106. struct mvebu_mpp_mode *modes;
  107. int nmodes;
  108. struct pinctrl_gpio_range *gpioranges;
  109. int ngpioranges;
  110. };
  111. #define MPP_REG_CTRL(_idl, _idh) \
  112. { \
  113. .name = NULL, \
  114. .pid = _idl, \
  115. .npins = _idh - _idl + 1, \
  116. .pins = (unsigned[_idh - _idl + 1]) { }, \
  117. .mpp_get = NULL, \
  118. .mpp_set = NULL, \
  119. .mpp_gpio_req = NULL, \
  120. .mpp_gpio_dir = NULL, \
  121. }
  122. #define MPP_FUNC_CTRL(_idl, _idh, _name, _func) \
  123. { \
  124. .name = _name, \
  125. .pid = _idl, \
  126. .npins = _idh - _idl + 1, \
  127. .pins = (unsigned[_idh - _idl + 1]) { }, \
  128. .mpp_get = _func ## _get, \
  129. .mpp_set = _func ## _set, \
  130. .mpp_gpio_req = NULL, \
  131. .mpp_gpio_dir = NULL, \
  132. }
  133. #define MPP_FUNC_GPIO_CTRL(_idl, _idh, _name, _func) \
  134. { \
  135. .name = _name, \
  136. .pid = _idl, \
  137. .npins = _idh - _idl + 1, \
  138. .pins = (unsigned[_idh - _idl + 1]) { }, \
  139. .mpp_get = _func ## _get, \
  140. .mpp_set = _func ## _set, \
  141. .mpp_gpio_req = _func ## _gpio_req, \
  142. .mpp_gpio_dir = _func ## _gpio_dir, \
  143. }
  144. #define _MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \
  145. { \
  146. .val = _val, \
  147. .name = _name, \
  148. .subname = _subname, \
  149. .variant = _mask, \
  150. .flags = 0, \
  151. }
  152. #if defined(CONFIG_DEBUG_FS)
  153. #define MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \
  154. _MPP_VAR_FUNCTION(_val, _name, _subname, _mask)
  155. #else
  156. #define MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \
  157. _MPP_VAR_FUNCTION(_val, _name, NULL, _mask)
  158. #endif
  159. #define MPP_FUNCTION(_val, _name, _subname) \
  160. MPP_VAR_FUNCTION(_val, _name, _subname, (u8)-1)
  161. #define MPP_MODE(_id, ...) \
  162. { \
  163. .pid = _id, \
  164. .settings = (struct mvebu_mpp_ctrl_setting[]){ \
  165. __VA_ARGS__, { } }, \
  166. }
  167. #define MPP_GPIO_RANGE(_id, _pinbase, _gpiobase, _npins) \
  168. { \
  169. .name = "mvebu-gpio", \
  170. .id = _id, \
  171. .pin_base = _pinbase, \
  172. .base = _gpiobase, \
  173. .npins = _npins, \
  174. }
  175. int mvebu_pinctrl_probe(struct platform_device *pdev);
  176. int mvebu_pinctrl_remove(struct platform_device *pdev);
  177. #endif