txrx.c 45 KB

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  1. /*
  2. * Copyright (c) 2004-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  18. #include "core.h"
  19. #include "debug.h"
  20. #include "htc-ops.h"
  21. #include "trace.h"
  22. /*
  23. * tid - tid_mux0..tid_mux3
  24. * aid - tid_mux4..tid_mux7
  25. */
  26. #define ATH6KL_TID_MASK 0xf
  27. #define ATH6KL_AID_SHIFT 4
  28. static inline u8 ath6kl_get_tid(u8 tid_mux)
  29. {
  30. return tid_mux & ATH6KL_TID_MASK;
  31. }
  32. static inline u8 ath6kl_get_aid(u8 tid_mux)
  33. {
  34. return tid_mux >> ATH6KL_AID_SHIFT;
  35. }
  36. static u8 ath6kl_ibss_map_epid(struct sk_buff *skb, struct net_device *dev,
  37. u32 *map_no)
  38. {
  39. struct ath6kl *ar = ath6kl_priv(dev);
  40. struct ethhdr *eth_hdr;
  41. u32 i, ep_map = -1;
  42. u8 *datap;
  43. *map_no = 0;
  44. datap = skb->data;
  45. eth_hdr = (struct ethhdr *) (datap + sizeof(struct wmi_data_hdr));
  46. if (is_multicast_ether_addr(eth_hdr->h_dest))
  47. return ENDPOINT_2;
  48. for (i = 0; i < ar->node_num; i++) {
  49. if (memcmp(eth_hdr->h_dest, ar->node_map[i].mac_addr,
  50. ETH_ALEN) == 0) {
  51. *map_no = i + 1;
  52. ar->node_map[i].tx_pend++;
  53. return ar->node_map[i].ep_id;
  54. }
  55. if ((ep_map == -1) && !ar->node_map[i].tx_pend)
  56. ep_map = i;
  57. }
  58. if (ep_map == -1) {
  59. ep_map = ar->node_num;
  60. ar->node_num++;
  61. if (ar->node_num > MAX_NODE_NUM)
  62. return ENDPOINT_UNUSED;
  63. }
  64. memcpy(ar->node_map[ep_map].mac_addr, eth_hdr->h_dest, ETH_ALEN);
  65. for (i = ENDPOINT_2; i <= ENDPOINT_5; i++) {
  66. if (!ar->tx_pending[i]) {
  67. ar->node_map[ep_map].ep_id = i;
  68. break;
  69. }
  70. /*
  71. * No free endpoint is available, start redistribution on
  72. * the inuse endpoints.
  73. */
  74. if (i == ENDPOINT_5) {
  75. ar->node_map[ep_map].ep_id = ar->next_ep_id;
  76. ar->next_ep_id++;
  77. if (ar->next_ep_id > ENDPOINT_5)
  78. ar->next_ep_id = ENDPOINT_2;
  79. }
  80. }
  81. *map_no = ep_map + 1;
  82. ar->node_map[ep_map].tx_pend++;
  83. return ar->node_map[ep_map].ep_id;
  84. }
  85. static bool ath6kl_process_uapsdq(struct ath6kl_sta *conn,
  86. struct ath6kl_vif *vif,
  87. struct sk_buff *skb,
  88. u32 *flags)
  89. {
  90. struct ath6kl *ar = vif->ar;
  91. bool is_apsdq_empty = false;
  92. struct ethhdr *datap = (struct ethhdr *) skb->data;
  93. u8 up = 0, traffic_class, *ip_hdr;
  94. u16 ether_type;
  95. struct ath6kl_llc_snap_hdr *llc_hdr;
  96. if (conn->sta_flags & STA_PS_APSD_TRIGGER) {
  97. /*
  98. * This tx is because of a uAPSD trigger, determine
  99. * more and EOSP bit. Set EOSP if queue is empty
  100. * or sufficient frames are delivered for this trigger.
  101. */
  102. spin_lock_bh(&conn->psq_lock);
  103. if (!skb_queue_empty(&conn->apsdq))
  104. *flags |= WMI_DATA_HDR_FLAGS_MORE;
  105. else if (conn->sta_flags & STA_PS_APSD_EOSP)
  106. *flags |= WMI_DATA_HDR_FLAGS_EOSP;
  107. *flags |= WMI_DATA_HDR_FLAGS_UAPSD;
  108. spin_unlock_bh(&conn->psq_lock);
  109. return false;
  110. } else if (!conn->apsd_info)
  111. return false;
  112. if (test_bit(WMM_ENABLED, &vif->flags)) {
  113. ether_type = be16_to_cpu(datap->h_proto);
  114. if (is_ethertype(ether_type)) {
  115. /* packet is in DIX format */
  116. ip_hdr = (u8 *)(datap + 1);
  117. } else {
  118. /* packet is in 802.3 format */
  119. llc_hdr = (struct ath6kl_llc_snap_hdr *)
  120. (datap + 1);
  121. ether_type = be16_to_cpu(llc_hdr->eth_type);
  122. ip_hdr = (u8 *)(llc_hdr + 1);
  123. }
  124. if (ether_type == IP_ETHERTYPE)
  125. up = ath6kl_wmi_determine_user_priority(
  126. ip_hdr, 0);
  127. }
  128. traffic_class = ath6kl_wmi_get_traffic_class(up);
  129. if ((conn->apsd_info & (1 << traffic_class)) == 0)
  130. return false;
  131. /* Queue the frames if the STA is sleeping */
  132. spin_lock_bh(&conn->psq_lock);
  133. is_apsdq_empty = skb_queue_empty(&conn->apsdq);
  134. skb_queue_tail(&conn->apsdq, skb);
  135. spin_unlock_bh(&conn->psq_lock);
  136. /*
  137. * If this is the first pkt getting queued
  138. * for this STA, update the PVB for this STA
  139. */
  140. if (is_apsdq_empty) {
  141. ath6kl_wmi_set_apsd_bfrd_traf(ar->wmi,
  142. vif->fw_vif_idx,
  143. conn->aid, 1, 0);
  144. }
  145. *flags |= WMI_DATA_HDR_FLAGS_UAPSD;
  146. return true;
  147. }
  148. static bool ath6kl_process_psq(struct ath6kl_sta *conn,
  149. struct ath6kl_vif *vif,
  150. struct sk_buff *skb,
  151. u32 *flags)
  152. {
  153. bool is_psq_empty = false;
  154. struct ath6kl *ar = vif->ar;
  155. if (conn->sta_flags & STA_PS_POLLED) {
  156. spin_lock_bh(&conn->psq_lock);
  157. if (!skb_queue_empty(&conn->psq))
  158. *flags |= WMI_DATA_HDR_FLAGS_MORE;
  159. spin_unlock_bh(&conn->psq_lock);
  160. return false;
  161. }
  162. /* Queue the frames if the STA is sleeping */
  163. spin_lock_bh(&conn->psq_lock);
  164. is_psq_empty = skb_queue_empty(&conn->psq);
  165. skb_queue_tail(&conn->psq, skb);
  166. spin_unlock_bh(&conn->psq_lock);
  167. /*
  168. * If this is the first pkt getting queued
  169. * for this STA, update the PVB for this
  170. * STA.
  171. */
  172. if (is_psq_empty)
  173. ath6kl_wmi_set_pvb_cmd(ar->wmi,
  174. vif->fw_vif_idx,
  175. conn->aid, 1);
  176. return true;
  177. }
  178. static bool ath6kl_powersave_ap(struct ath6kl_vif *vif, struct sk_buff *skb,
  179. u32 *flags)
  180. {
  181. struct ethhdr *datap = (struct ethhdr *) skb->data;
  182. struct ath6kl_sta *conn = NULL;
  183. bool ps_queued = false;
  184. struct ath6kl *ar = vif->ar;
  185. if (is_multicast_ether_addr(datap->h_dest)) {
  186. u8 ctr = 0;
  187. bool q_mcast = false;
  188. for (ctr = 0; ctr < AP_MAX_NUM_STA; ctr++) {
  189. if (ar->sta_list[ctr].sta_flags & STA_PS_SLEEP) {
  190. q_mcast = true;
  191. break;
  192. }
  193. }
  194. if (q_mcast) {
  195. /*
  196. * If this transmit is not because of a Dtim Expiry
  197. * q it.
  198. */
  199. if (!test_bit(DTIM_EXPIRED, &vif->flags)) {
  200. bool is_mcastq_empty = false;
  201. spin_lock_bh(&ar->mcastpsq_lock);
  202. is_mcastq_empty =
  203. skb_queue_empty(&ar->mcastpsq);
  204. skb_queue_tail(&ar->mcastpsq, skb);
  205. spin_unlock_bh(&ar->mcastpsq_lock);
  206. /*
  207. * If this is the first Mcast pkt getting
  208. * queued indicate to the target to set the
  209. * BitmapControl LSB of the TIM IE.
  210. */
  211. if (is_mcastq_empty)
  212. ath6kl_wmi_set_pvb_cmd(ar->wmi,
  213. vif->fw_vif_idx,
  214. MCAST_AID, 1);
  215. ps_queued = true;
  216. } else {
  217. /*
  218. * This transmit is because of Dtim expiry.
  219. * Determine if MoreData bit has to be set.
  220. */
  221. spin_lock_bh(&ar->mcastpsq_lock);
  222. if (!skb_queue_empty(&ar->mcastpsq))
  223. *flags |= WMI_DATA_HDR_FLAGS_MORE;
  224. spin_unlock_bh(&ar->mcastpsq_lock);
  225. }
  226. }
  227. } else {
  228. conn = ath6kl_find_sta(vif, datap->h_dest);
  229. if (!conn) {
  230. dev_kfree_skb(skb);
  231. /* Inform the caller that the skb is consumed */
  232. return true;
  233. }
  234. if (conn->sta_flags & STA_PS_SLEEP) {
  235. ps_queued = ath6kl_process_uapsdq(conn,
  236. vif, skb, flags);
  237. if (!(*flags & WMI_DATA_HDR_FLAGS_UAPSD))
  238. ps_queued = ath6kl_process_psq(conn,
  239. vif, skb, flags);
  240. }
  241. }
  242. return ps_queued;
  243. }
  244. /* Tx functions */
  245. int ath6kl_control_tx(void *devt, struct sk_buff *skb,
  246. enum htc_endpoint_id eid)
  247. {
  248. struct ath6kl *ar = devt;
  249. int status = 0;
  250. struct ath6kl_cookie *cookie = NULL;
  251. trace_ath6kl_wmi_cmd(skb->data, skb->len);
  252. if (WARN_ON_ONCE(ar->state == ATH6KL_STATE_WOW)) {
  253. dev_kfree_skb(skb);
  254. return -EACCES;
  255. }
  256. if (WARN_ON_ONCE(eid == ENDPOINT_UNUSED ||
  257. eid >= ENDPOINT_MAX)) {
  258. status = -EINVAL;
  259. goto fail_ctrl_tx;
  260. }
  261. spin_lock_bh(&ar->lock);
  262. ath6kl_dbg(ATH6KL_DBG_WLAN_TX,
  263. "%s: skb=0x%p, len=0x%x eid =%d\n", __func__,
  264. skb, skb->len, eid);
  265. if (test_bit(WMI_CTRL_EP_FULL, &ar->flag) && (eid == ar->ctrl_ep)) {
  266. /*
  267. * Control endpoint is full, don't allocate resources, we
  268. * are just going to drop this packet.
  269. */
  270. cookie = NULL;
  271. ath6kl_err("wmi ctrl ep full, dropping pkt : 0x%p, len:%d\n",
  272. skb, skb->len);
  273. } else
  274. cookie = ath6kl_alloc_cookie(ar);
  275. if (cookie == NULL) {
  276. spin_unlock_bh(&ar->lock);
  277. status = -ENOMEM;
  278. goto fail_ctrl_tx;
  279. }
  280. ar->tx_pending[eid]++;
  281. if (eid != ar->ctrl_ep)
  282. ar->total_tx_data_pend++;
  283. spin_unlock_bh(&ar->lock);
  284. cookie->skb = skb;
  285. cookie->map_no = 0;
  286. set_htc_pkt_info(&cookie->htc_pkt, cookie, skb->data, skb->len,
  287. eid, ATH6KL_CONTROL_PKT_TAG);
  288. cookie->htc_pkt.skb = skb;
  289. /*
  290. * This interface is asynchronous, if there is an error, cleanup
  291. * will happen in the TX completion callback.
  292. */
  293. ath6kl_htc_tx(ar->htc_target, &cookie->htc_pkt);
  294. return 0;
  295. fail_ctrl_tx:
  296. dev_kfree_skb(skb);
  297. return status;
  298. }
  299. int ath6kl_data_tx(struct sk_buff *skb, struct net_device *dev)
  300. {
  301. struct ath6kl *ar = ath6kl_priv(dev);
  302. struct ath6kl_cookie *cookie = NULL;
  303. enum htc_endpoint_id eid = ENDPOINT_UNUSED;
  304. struct ath6kl_vif *vif = netdev_priv(dev);
  305. u32 map_no = 0;
  306. u16 htc_tag = ATH6KL_DATA_PKT_TAG;
  307. u8 ac = 99 ; /* initialize to unmapped ac */
  308. bool chk_adhoc_ps_mapping = false;
  309. int ret;
  310. struct wmi_tx_meta_v2 meta_v2;
  311. void *meta;
  312. u8 csum_start = 0, csum_dest = 0, csum = skb->ip_summed;
  313. u8 meta_ver = 0;
  314. u32 flags = 0;
  315. ath6kl_dbg(ATH6KL_DBG_WLAN_TX,
  316. "%s: skb=0x%p, data=0x%p, len=0x%x\n", __func__,
  317. skb, skb->data, skb->len);
  318. /* If target is not associated */
  319. if (!test_bit(CONNECTED, &vif->flags))
  320. goto fail_tx;
  321. if (WARN_ON_ONCE(ar->state != ATH6KL_STATE_ON))
  322. goto fail_tx;
  323. if (!test_bit(WMI_READY, &ar->flag))
  324. goto fail_tx;
  325. /* AP mode Power saving processing */
  326. if (vif->nw_type == AP_NETWORK) {
  327. if (ath6kl_powersave_ap(vif, skb, &flags))
  328. return 0;
  329. }
  330. if (test_bit(WMI_ENABLED, &ar->flag)) {
  331. if ((dev->features & NETIF_F_IP_CSUM) &&
  332. (csum == CHECKSUM_PARTIAL)) {
  333. csum_start = skb->csum_start -
  334. (skb_network_header(skb) - skb->head) +
  335. sizeof(struct ath6kl_llc_snap_hdr);
  336. csum_dest = skb->csum_offset + csum_start;
  337. }
  338. if (skb_headroom(skb) < dev->needed_headroom) {
  339. struct sk_buff *tmp_skb = skb;
  340. skb = skb_realloc_headroom(skb, dev->needed_headroom);
  341. kfree_skb(tmp_skb);
  342. if (skb == NULL) {
  343. vif->net_stats.tx_dropped++;
  344. return 0;
  345. }
  346. }
  347. if (ath6kl_wmi_dix_2_dot3(ar->wmi, skb)) {
  348. ath6kl_err("ath6kl_wmi_dix_2_dot3 failed\n");
  349. goto fail_tx;
  350. }
  351. if ((dev->features & NETIF_F_IP_CSUM) &&
  352. (csum == CHECKSUM_PARTIAL)) {
  353. meta_v2.csum_start = csum_start;
  354. meta_v2.csum_dest = csum_dest;
  355. /* instruct target to calculate checksum */
  356. meta_v2.csum_flags = WMI_META_V2_FLAG_CSUM_OFFLOAD;
  357. meta_ver = WMI_META_VERSION_2;
  358. meta = &meta_v2;
  359. } else {
  360. meta_ver = 0;
  361. meta = NULL;
  362. }
  363. ret = ath6kl_wmi_data_hdr_add(ar->wmi, skb,
  364. DATA_MSGTYPE, flags, 0,
  365. meta_ver,
  366. meta, vif->fw_vif_idx);
  367. if (ret) {
  368. ath6kl_warn("failed to add wmi data header:%d\n"
  369. , ret);
  370. goto fail_tx;
  371. }
  372. if ((vif->nw_type == ADHOC_NETWORK) &&
  373. ar->ibss_ps_enable && test_bit(CONNECTED, &vif->flags))
  374. chk_adhoc_ps_mapping = true;
  375. else {
  376. /* get the stream mapping */
  377. ret = ath6kl_wmi_implicit_create_pstream(ar->wmi,
  378. vif->fw_vif_idx, skb,
  379. 0, test_bit(WMM_ENABLED, &vif->flags), &ac);
  380. if (ret)
  381. goto fail_tx;
  382. }
  383. } else
  384. goto fail_tx;
  385. spin_lock_bh(&ar->lock);
  386. if (chk_adhoc_ps_mapping)
  387. eid = ath6kl_ibss_map_epid(skb, dev, &map_no);
  388. else
  389. eid = ar->ac2ep_map[ac];
  390. if (eid == 0 || eid == ENDPOINT_UNUSED) {
  391. ath6kl_err("eid %d is not mapped!\n", eid);
  392. spin_unlock_bh(&ar->lock);
  393. goto fail_tx;
  394. }
  395. /* allocate resource for this packet */
  396. cookie = ath6kl_alloc_cookie(ar);
  397. if (!cookie) {
  398. spin_unlock_bh(&ar->lock);
  399. goto fail_tx;
  400. }
  401. /* update counts while the lock is held */
  402. ar->tx_pending[eid]++;
  403. ar->total_tx_data_pend++;
  404. spin_unlock_bh(&ar->lock);
  405. if (!IS_ALIGNED((unsigned long) skb->data - HTC_HDR_LENGTH, 4) &&
  406. skb_cloned(skb)) {
  407. /*
  408. * We will touch (move the buffer data to align it. Since the
  409. * skb buffer is cloned and not only the header is changed, we
  410. * have to copy it to allow the changes. Since we are copying
  411. * the data here, we may as well align it by reserving suitable
  412. * headroom to avoid the memmove in ath6kl_htc_tx_buf_align().
  413. */
  414. struct sk_buff *nskb;
  415. nskb = skb_copy_expand(skb, HTC_HDR_LENGTH, 0, GFP_ATOMIC);
  416. if (nskb == NULL)
  417. goto fail_tx;
  418. kfree_skb(skb);
  419. skb = nskb;
  420. }
  421. cookie->skb = skb;
  422. cookie->map_no = map_no;
  423. set_htc_pkt_info(&cookie->htc_pkt, cookie, skb->data, skb->len,
  424. eid, htc_tag);
  425. cookie->htc_pkt.skb = skb;
  426. ath6kl_dbg_dump(ATH6KL_DBG_RAW_BYTES, __func__, "tx ",
  427. skb->data, skb->len);
  428. /*
  429. * HTC interface is asynchronous, if this fails, cleanup will
  430. * happen in the ath6kl_tx_complete callback.
  431. */
  432. ath6kl_htc_tx(ar->htc_target, &cookie->htc_pkt);
  433. return 0;
  434. fail_tx:
  435. dev_kfree_skb(skb);
  436. vif->net_stats.tx_dropped++;
  437. vif->net_stats.tx_aborted_errors++;
  438. return 0;
  439. }
  440. /* indicate tx activity or inactivity on a WMI stream */
  441. void ath6kl_indicate_tx_activity(void *devt, u8 traffic_class, bool active)
  442. {
  443. struct ath6kl *ar = devt;
  444. enum htc_endpoint_id eid;
  445. int i;
  446. eid = ar->ac2ep_map[traffic_class];
  447. if (!test_bit(WMI_ENABLED, &ar->flag))
  448. goto notify_htc;
  449. spin_lock_bh(&ar->lock);
  450. ar->ac_stream_active[traffic_class] = active;
  451. if (active) {
  452. /*
  453. * Keep track of the active stream with the highest
  454. * priority.
  455. */
  456. if (ar->ac_stream_pri_map[traffic_class] >
  457. ar->hiac_stream_active_pri)
  458. /* set the new highest active priority */
  459. ar->hiac_stream_active_pri =
  460. ar->ac_stream_pri_map[traffic_class];
  461. } else {
  462. /*
  463. * We may have to search for the next active stream
  464. * that is the highest priority.
  465. */
  466. if (ar->hiac_stream_active_pri ==
  467. ar->ac_stream_pri_map[traffic_class]) {
  468. /*
  469. * The highest priority stream just went inactive
  470. * reset and search for the "next" highest "active"
  471. * priority stream.
  472. */
  473. ar->hiac_stream_active_pri = 0;
  474. for (i = 0; i < WMM_NUM_AC; i++) {
  475. if (ar->ac_stream_active[i] &&
  476. (ar->ac_stream_pri_map[i] >
  477. ar->hiac_stream_active_pri))
  478. /*
  479. * Set the new highest active
  480. * priority.
  481. */
  482. ar->hiac_stream_active_pri =
  483. ar->ac_stream_pri_map[i];
  484. }
  485. }
  486. }
  487. spin_unlock_bh(&ar->lock);
  488. notify_htc:
  489. /* notify HTC, this may cause credit distribution changes */
  490. ath6kl_htc_activity_changed(ar->htc_target, eid, active);
  491. }
  492. enum htc_send_full_action ath6kl_tx_queue_full(struct htc_target *target,
  493. struct htc_packet *packet)
  494. {
  495. struct ath6kl *ar = target->dev->ar;
  496. struct ath6kl_vif *vif;
  497. enum htc_endpoint_id endpoint = packet->endpoint;
  498. enum htc_send_full_action action = HTC_SEND_FULL_KEEP;
  499. if (endpoint == ar->ctrl_ep) {
  500. /*
  501. * Under normal WMI if this is getting full, then something
  502. * is running rampant the host should not be exhausting the
  503. * WMI queue with too many commands the only exception to
  504. * this is during testing using endpointping.
  505. */
  506. set_bit(WMI_CTRL_EP_FULL, &ar->flag);
  507. ath6kl_err("wmi ctrl ep is full\n");
  508. ath6kl_recovery_err_notify(ar, ATH6KL_FW_EP_FULL);
  509. return action;
  510. }
  511. if (packet->info.tx.tag == ATH6KL_CONTROL_PKT_TAG)
  512. return action;
  513. /*
  514. * The last MAX_HI_COOKIE_NUM "batch" of cookies are reserved for
  515. * the highest active stream.
  516. */
  517. if (ar->ac_stream_pri_map[ar->ep2ac_map[endpoint]] <
  518. ar->hiac_stream_active_pri &&
  519. ar->cookie_count <=
  520. target->endpoint[endpoint].tx_drop_packet_threshold)
  521. /*
  522. * Give preference to the highest priority stream by
  523. * dropping the packets which overflowed.
  524. */
  525. action = HTC_SEND_FULL_DROP;
  526. /* FIXME: Locking */
  527. spin_lock_bh(&ar->list_lock);
  528. list_for_each_entry(vif, &ar->vif_list, list) {
  529. if (vif->nw_type == ADHOC_NETWORK ||
  530. action != HTC_SEND_FULL_DROP) {
  531. spin_unlock_bh(&ar->list_lock);
  532. set_bit(NETQ_STOPPED, &vif->flags);
  533. netif_stop_queue(vif->ndev);
  534. return action;
  535. }
  536. }
  537. spin_unlock_bh(&ar->list_lock);
  538. return action;
  539. }
  540. /* TODO this needs to be looked at */
  541. static void ath6kl_tx_clear_node_map(struct ath6kl_vif *vif,
  542. enum htc_endpoint_id eid, u32 map_no)
  543. {
  544. struct ath6kl *ar = vif->ar;
  545. u32 i;
  546. if (vif->nw_type != ADHOC_NETWORK)
  547. return;
  548. if (!ar->ibss_ps_enable)
  549. return;
  550. if (eid == ar->ctrl_ep)
  551. return;
  552. if (map_no == 0)
  553. return;
  554. map_no--;
  555. ar->node_map[map_no].tx_pend--;
  556. if (ar->node_map[map_no].tx_pend)
  557. return;
  558. if (map_no != (ar->node_num - 1))
  559. return;
  560. for (i = ar->node_num; i > 0; i--) {
  561. if (ar->node_map[i - 1].tx_pend)
  562. break;
  563. memset(&ar->node_map[i - 1], 0,
  564. sizeof(struct ath6kl_node_mapping));
  565. ar->node_num--;
  566. }
  567. }
  568. void ath6kl_tx_complete(struct htc_target *target,
  569. struct list_head *packet_queue)
  570. {
  571. struct ath6kl *ar = target->dev->ar;
  572. struct sk_buff_head skb_queue;
  573. struct htc_packet *packet;
  574. struct sk_buff *skb;
  575. struct ath6kl_cookie *ath6kl_cookie;
  576. u32 map_no = 0;
  577. int status;
  578. enum htc_endpoint_id eid;
  579. bool wake_event = false;
  580. bool flushing[ATH6KL_VIF_MAX] = {false};
  581. u8 if_idx;
  582. struct ath6kl_vif *vif;
  583. skb_queue_head_init(&skb_queue);
  584. /* lock the driver as we update internal state */
  585. spin_lock_bh(&ar->lock);
  586. /* reap completed packets */
  587. while (!list_empty(packet_queue)) {
  588. packet = list_first_entry(packet_queue, struct htc_packet,
  589. list);
  590. list_del(&packet->list);
  591. if (WARN_ON_ONCE(packet->endpoint == ENDPOINT_UNUSED ||
  592. packet->endpoint >= ENDPOINT_MAX))
  593. continue;
  594. ath6kl_cookie = (struct ath6kl_cookie *)packet->pkt_cntxt;
  595. if (WARN_ON_ONCE(!ath6kl_cookie))
  596. continue;
  597. status = packet->status;
  598. skb = ath6kl_cookie->skb;
  599. eid = packet->endpoint;
  600. map_no = ath6kl_cookie->map_no;
  601. if (WARN_ON_ONCE(!skb || !skb->data)) {
  602. dev_kfree_skb(skb);
  603. ath6kl_free_cookie(ar, ath6kl_cookie);
  604. continue;
  605. }
  606. __skb_queue_tail(&skb_queue, skb);
  607. if (WARN_ON_ONCE(!status && (packet->act_len != skb->len))) {
  608. ath6kl_free_cookie(ar, ath6kl_cookie);
  609. continue;
  610. }
  611. ar->tx_pending[eid]--;
  612. if (eid != ar->ctrl_ep)
  613. ar->total_tx_data_pend--;
  614. if (eid == ar->ctrl_ep) {
  615. if (test_bit(WMI_CTRL_EP_FULL, &ar->flag))
  616. clear_bit(WMI_CTRL_EP_FULL, &ar->flag);
  617. if (ar->tx_pending[eid] == 0)
  618. wake_event = true;
  619. }
  620. if (eid == ar->ctrl_ep) {
  621. if_idx = wmi_cmd_hdr_get_if_idx(
  622. (struct wmi_cmd_hdr *) packet->buf);
  623. } else {
  624. if_idx = wmi_data_hdr_get_if_idx(
  625. (struct wmi_data_hdr *) packet->buf);
  626. }
  627. vif = ath6kl_get_vif_by_index(ar, if_idx);
  628. if (!vif) {
  629. ath6kl_free_cookie(ar, ath6kl_cookie);
  630. continue;
  631. }
  632. if (status) {
  633. if (status == -ECANCELED)
  634. /* a packet was flushed */
  635. flushing[if_idx] = true;
  636. vif->net_stats.tx_errors++;
  637. if (status != -ENOSPC && status != -ECANCELED)
  638. ath6kl_warn("tx complete error: %d\n", status);
  639. ath6kl_dbg(ATH6KL_DBG_WLAN_TX,
  640. "%s: skb=0x%p data=0x%p len=0x%x eid=%d %s\n",
  641. __func__, skb, packet->buf, packet->act_len,
  642. eid, "error!");
  643. } else {
  644. ath6kl_dbg(ATH6KL_DBG_WLAN_TX,
  645. "%s: skb=0x%p data=0x%p len=0x%x eid=%d %s\n",
  646. __func__, skb, packet->buf, packet->act_len,
  647. eid, "OK");
  648. flushing[if_idx] = false;
  649. vif->net_stats.tx_packets++;
  650. vif->net_stats.tx_bytes += skb->len;
  651. }
  652. ath6kl_tx_clear_node_map(vif, eid, map_no);
  653. ath6kl_free_cookie(ar, ath6kl_cookie);
  654. if (test_bit(NETQ_STOPPED, &vif->flags))
  655. clear_bit(NETQ_STOPPED, &vif->flags);
  656. }
  657. spin_unlock_bh(&ar->lock);
  658. __skb_queue_purge(&skb_queue);
  659. /* FIXME: Locking */
  660. spin_lock_bh(&ar->list_lock);
  661. list_for_each_entry(vif, &ar->vif_list, list) {
  662. if (test_bit(CONNECTED, &vif->flags) &&
  663. !flushing[vif->fw_vif_idx]) {
  664. spin_unlock_bh(&ar->list_lock);
  665. netif_wake_queue(vif->ndev);
  666. spin_lock_bh(&ar->list_lock);
  667. }
  668. }
  669. spin_unlock_bh(&ar->list_lock);
  670. if (wake_event)
  671. wake_up(&ar->event_wq);
  672. return;
  673. }
  674. void ath6kl_tx_data_cleanup(struct ath6kl *ar)
  675. {
  676. int i;
  677. /* flush all the data (non-control) streams */
  678. for (i = 0; i < WMM_NUM_AC; i++)
  679. ath6kl_htc_flush_txep(ar->htc_target, ar->ac2ep_map[i],
  680. ATH6KL_DATA_PKT_TAG);
  681. }
  682. /* Rx functions */
  683. static void ath6kl_deliver_frames_to_nw_stack(struct net_device *dev,
  684. struct sk_buff *skb)
  685. {
  686. if (!skb)
  687. return;
  688. skb->dev = dev;
  689. if (!(skb->dev->flags & IFF_UP)) {
  690. dev_kfree_skb(skb);
  691. return;
  692. }
  693. skb->protocol = eth_type_trans(skb, skb->dev);
  694. netif_rx_ni(skb);
  695. }
  696. static void ath6kl_alloc_netbufs(struct sk_buff_head *q, u16 num)
  697. {
  698. struct sk_buff *skb;
  699. while (num) {
  700. skb = ath6kl_buf_alloc(ATH6KL_BUFFER_SIZE);
  701. if (!skb) {
  702. ath6kl_err("netbuf allocation failed\n");
  703. return;
  704. }
  705. skb_queue_tail(q, skb);
  706. num--;
  707. }
  708. }
  709. static struct sk_buff *aggr_get_free_skb(struct aggr_info *p_aggr)
  710. {
  711. struct sk_buff *skb = NULL;
  712. if (skb_queue_len(&p_aggr->rx_amsdu_freeq) <
  713. (AGGR_NUM_OF_FREE_NETBUFS >> 2))
  714. ath6kl_alloc_netbufs(&p_aggr->rx_amsdu_freeq,
  715. AGGR_NUM_OF_FREE_NETBUFS);
  716. skb = skb_dequeue(&p_aggr->rx_amsdu_freeq);
  717. return skb;
  718. }
  719. void ath6kl_rx_refill(struct htc_target *target, enum htc_endpoint_id endpoint)
  720. {
  721. struct ath6kl *ar = target->dev->ar;
  722. struct sk_buff *skb;
  723. int rx_buf;
  724. int n_buf_refill;
  725. struct htc_packet *packet;
  726. struct list_head queue;
  727. n_buf_refill = ATH6KL_MAX_RX_BUFFERS -
  728. ath6kl_htc_get_rxbuf_num(ar->htc_target, endpoint);
  729. if (n_buf_refill <= 0)
  730. return;
  731. INIT_LIST_HEAD(&queue);
  732. ath6kl_dbg(ATH6KL_DBG_WLAN_RX,
  733. "%s: providing htc with %d buffers at eid=%d\n",
  734. __func__, n_buf_refill, endpoint);
  735. for (rx_buf = 0; rx_buf < n_buf_refill; rx_buf++) {
  736. skb = ath6kl_buf_alloc(ATH6KL_BUFFER_SIZE);
  737. if (!skb)
  738. break;
  739. packet = (struct htc_packet *) skb->head;
  740. if (!IS_ALIGNED((unsigned long) skb->data, 4)) {
  741. size_t len = skb_headlen(skb);
  742. skb->data = PTR_ALIGN(skb->data - 4, 4);
  743. skb_set_tail_pointer(skb, len);
  744. }
  745. set_htc_rxpkt_info(packet, skb, skb->data,
  746. ATH6KL_BUFFER_SIZE, endpoint);
  747. packet->skb = skb;
  748. list_add_tail(&packet->list, &queue);
  749. }
  750. if (!list_empty(&queue))
  751. ath6kl_htc_add_rxbuf_multiple(ar->htc_target, &queue);
  752. }
  753. void ath6kl_refill_amsdu_rxbufs(struct ath6kl *ar, int count)
  754. {
  755. struct htc_packet *packet;
  756. struct sk_buff *skb;
  757. while (count) {
  758. skb = ath6kl_buf_alloc(ATH6KL_AMSDU_BUFFER_SIZE);
  759. if (!skb)
  760. return;
  761. packet = (struct htc_packet *) skb->head;
  762. if (!IS_ALIGNED((unsigned long) skb->data, 4)) {
  763. size_t len = skb_headlen(skb);
  764. skb->data = PTR_ALIGN(skb->data - 4, 4);
  765. skb_set_tail_pointer(skb, len);
  766. }
  767. set_htc_rxpkt_info(packet, skb, skb->data,
  768. ATH6KL_AMSDU_BUFFER_SIZE, 0);
  769. packet->skb = skb;
  770. spin_lock_bh(&ar->lock);
  771. list_add_tail(&packet->list, &ar->amsdu_rx_buffer_queue);
  772. spin_unlock_bh(&ar->lock);
  773. count--;
  774. }
  775. }
  776. /*
  777. * Callback to allocate a receive buffer for a pending packet. We use a
  778. * pre-allocated list of buffers of maximum AMSDU size (4K).
  779. */
  780. struct htc_packet *ath6kl_alloc_amsdu_rxbuf(struct htc_target *target,
  781. enum htc_endpoint_id endpoint,
  782. int len)
  783. {
  784. struct ath6kl *ar = target->dev->ar;
  785. struct htc_packet *packet = NULL;
  786. struct list_head *pkt_pos;
  787. int refill_cnt = 0, depth = 0;
  788. ath6kl_dbg(ATH6KL_DBG_WLAN_RX, "%s: eid=%d, len:%d\n",
  789. __func__, endpoint, len);
  790. if ((len <= ATH6KL_BUFFER_SIZE) ||
  791. (len > ATH6KL_AMSDU_BUFFER_SIZE))
  792. return NULL;
  793. spin_lock_bh(&ar->lock);
  794. if (list_empty(&ar->amsdu_rx_buffer_queue)) {
  795. spin_unlock_bh(&ar->lock);
  796. refill_cnt = ATH6KL_MAX_AMSDU_RX_BUFFERS;
  797. goto refill_buf;
  798. }
  799. packet = list_first_entry(&ar->amsdu_rx_buffer_queue,
  800. struct htc_packet, list);
  801. list_del(&packet->list);
  802. list_for_each(pkt_pos, &ar->amsdu_rx_buffer_queue)
  803. depth++;
  804. refill_cnt = ATH6KL_MAX_AMSDU_RX_BUFFERS - depth;
  805. spin_unlock_bh(&ar->lock);
  806. /* set actual endpoint ID */
  807. packet->endpoint = endpoint;
  808. refill_buf:
  809. if (refill_cnt >= ATH6KL_AMSDU_REFILL_THRESHOLD)
  810. ath6kl_refill_amsdu_rxbufs(ar, refill_cnt);
  811. return packet;
  812. }
  813. static void aggr_slice_amsdu(struct aggr_info *p_aggr,
  814. struct rxtid *rxtid, struct sk_buff *skb)
  815. {
  816. struct sk_buff *new_skb;
  817. struct ethhdr *hdr;
  818. u16 frame_8023_len, payload_8023_len, mac_hdr_len, amsdu_len;
  819. u8 *framep;
  820. mac_hdr_len = sizeof(struct ethhdr);
  821. framep = skb->data + mac_hdr_len;
  822. amsdu_len = skb->len - mac_hdr_len;
  823. while (amsdu_len > mac_hdr_len) {
  824. hdr = (struct ethhdr *) framep;
  825. payload_8023_len = ntohs(hdr->h_proto);
  826. if (payload_8023_len < MIN_MSDU_SUBFRAME_PAYLOAD_LEN ||
  827. payload_8023_len > MAX_MSDU_SUBFRAME_PAYLOAD_LEN) {
  828. ath6kl_err("802.3 AMSDU frame bound check failed. len %d\n",
  829. payload_8023_len);
  830. break;
  831. }
  832. frame_8023_len = payload_8023_len + mac_hdr_len;
  833. new_skb = aggr_get_free_skb(p_aggr);
  834. if (!new_skb) {
  835. ath6kl_err("no buffer available\n");
  836. break;
  837. }
  838. memcpy(new_skb->data, framep, frame_8023_len);
  839. skb_put(new_skb, frame_8023_len);
  840. if (ath6kl_wmi_dot3_2_dix(new_skb)) {
  841. ath6kl_err("dot3_2_dix error\n");
  842. dev_kfree_skb(new_skb);
  843. break;
  844. }
  845. skb_queue_tail(&rxtid->q, new_skb);
  846. /* Is this the last subframe within this aggregate ? */
  847. if ((amsdu_len - frame_8023_len) == 0)
  848. break;
  849. /* Add the length of A-MSDU subframe padding bytes -
  850. * Round to nearest word.
  851. */
  852. frame_8023_len = ALIGN(frame_8023_len, 4);
  853. framep += frame_8023_len;
  854. amsdu_len -= frame_8023_len;
  855. }
  856. dev_kfree_skb(skb);
  857. }
  858. static void aggr_deque_frms(struct aggr_info_conn *agg_conn, u8 tid,
  859. u16 seq_no, u8 order)
  860. {
  861. struct sk_buff *skb;
  862. struct rxtid *rxtid;
  863. struct skb_hold_q *node;
  864. u16 idx, idx_end, seq_end;
  865. struct rxtid_stats *stats;
  866. rxtid = &agg_conn->rx_tid[tid];
  867. stats = &agg_conn->stat[tid];
  868. spin_lock_bh(&rxtid->lock);
  869. idx = AGGR_WIN_IDX(rxtid->seq_next, rxtid->hold_q_sz);
  870. /*
  871. * idx_end is typically the last possible frame in the window,
  872. * but changes to 'the' seq_no, when BAR comes. If seq_no
  873. * is non-zero, we will go up to that and stop.
  874. * Note: last seq no in current window will occupy the same
  875. * index position as index that is just previous to start.
  876. * An imp point : if win_sz is 7, for seq_no space of 4095,
  877. * then, there would be holes when sequence wrap around occurs.
  878. * Target should judiciously choose the win_sz, based on
  879. * this condition. For 4095, (TID_WINDOW_SZ = 2 x win_sz
  880. * 2, 4, 8, 16 win_sz works fine).
  881. * We must deque from "idx" to "idx_end", including both.
  882. */
  883. seq_end = seq_no ? seq_no : rxtid->seq_next;
  884. idx_end = AGGR_WIN_IDX(seq_end, rxtid->hold_q_sz);
  885. do {
  886. node = &rxtid->hold_q[idx];
  887. if ((order == 1) && (!node->skb))
  888. break;
  889. if (node->skb) {
  890. if (node->is_amsdu)
  891. aggr_slice_amsdu(agg_conn->aggr_info, rxtid,
  892. node->skb);
  893. else
  894. skb_queue_tail(&rxtid->q, node->skb);
  895. node->skb = NULL;
  896. } else
  897. stats->num_hole++;
  898. rxtid->seq_next = ATH6KL_NEXT_SEQ_NO(rxtid->seq_next);
  899. idx = AGGR_WIN_IDX(rxtid->seq_next, rxtid->hold_q_sz);
  900. } while (idx != idx_end);
  901. spin_unlock_bh(&rxtid->lock);
  902. stats->num_delivered += skb_queue_len(&rxtid->q);
  903. while ((skb = skb_dequeue(&rxtid->q)))
  904. ath6kl_deliver_frames_to_nw_stack(agg_conn->dev, skb);
  905. }
  906. static bool aggr_process_recv_frm(struct aggr_info_conn *agg_conn, u8 tid,
  907. u16 seq_no,
  908. bool is_amsdu, struct sk_buff *frame)
  909. {
  910. struct rxtid *rxtid;
  911. struct rxtid_stats *stats;
  912. struct sk_buff *skb;
  913. struct skb_hold_q *node;
  914. u16 idx, st, cur, end;
  915. bool is_queued = false;
  916. u16 extended_end;
  917. rxtid = &agg_conn->rx_tid[tid];
  918. stats = &agg_conn->stat[tid];
  919. stats->num_into_aggr++;
  920. if (!rxtid->aggr) {
  921. if (is_amsdu) {
  922. aggr_slice_amsdu(agg_conn->aggr_info, rxtid, frame);
  923. is_queued = true;
  924. stats->num_amsdu++;
  925. while ((skb = skb_dequeue(&rxtid->q)))
  926. ath6kl_deliver_frames_to_nw_stack(agg_conn->dev,
  927. skb);
  928. }
  929. return is_queued;
  930. }
  931. /* Check the incoming sequence no, if it's in the window */
  932. st = rxtid->seq_next;
  933. cur = seq_no;
  934. end = (st + rxtid->hold_q_sz-1) & ATH6KL_MAX_SEQ_NO;
  935. if (((st < end) && (cur < st || cur > end)) ||
  936. ((st > end) && (cur > end) && (cur < st))) {
  937. extended_end = (end + rxtid->hold_q_sz - 1) &
  938. ATH6KL_MAX_SEQ_NO;
  939. if (((end < extended_end) &&
  940. (cur < end || cur > extended_end)) ||
  941. ((end > extended_end) && (cur > extended_end) &&
  942. (cur < end))) {
  943. aggr_deque_frms(agg_conn, tid, 0, 0);
  944. spin_lock_bh(&rxtid->lock);
  945. if (cur >= rxtid->hold_q_sz - 1)
  946. rxtid->seq_next = cur - (rxtid->hold_q_sz - 1);
  947. else
  948. rxtid->seq_next = ATH6KL_MAX_SEQ_NO -
  949. (rxtid->hold_q_sz - 2 - cur);
  950. spin_unlock_bh(&rxtid->lock);
  951. } else {
  952. /*
  953. * Dequeue only those frames that are outside the
  954. * new shifted window.
  955. */
  956. if (cur >= rxtid->hold_q_sz - 1)
  957. st = cur - (rxtid->hold_q_sz - 1);
  958. else
  959. st = ATH6KL_MAX_SEQ_NO -
  960. (rxtid->hold_q_sz - 2 - cur);
  961. aggr_deque_frms(agg_conn, tid, st, 0);
  962. }
  963. stats->num_oow++;
  964. }
  965. idx = AGGR_WIN_IDX(seq_no, rxtid->hold_q_sz);
  966. node = &rxtid->hold_q[idx];
  967. spin_lock_bh(&rxtid->lock);
  968. /*
  969. * Is the cur frame duplicate or something beyond our window(hold_q
  970. * -> which is 2x, already)?
  971. *
  972. * 1. Duplicate is easy - drop incoming frame.
  973. * 2. Not falling in current sliding window.
  974. * 2a. is the frame_seq_no preceding current tid_seq_no?
  975. * -> drop the frame. perhaps sender did not get our ACK.
  976. * this is taken care of above.
  977. * 2b. is the frame_seq_no beyond window(st, TID_WINDOW_SZ);
  978. * -> Taken care of it above, by moving window forward.
  979. */
  980. dev_kfree_skb(node->skb);
  981. stats->num_dups++;
  982. node->skb = frame;
  983. is_queued = true;
  984. node->is_amsdu = is_amsdu;
  985. node->seq_no = seq_no;
  986. if (node->is_amsdu)
  987. stats->num_amsdu++;
  988. else
  989. stats->num_mpdu++;
  990. spin_unlock_bh(&rxtid->lock);
  991. aggr_deque_frms(agg_conn, tid, 0, 1);
  992. if (agg_conn->timer_scheduled)
  993. return is_queued;
  994. spin_lock_bh(&rxtid->lock);
  995. for (idx = 0 ; idx < rxtid->hold_q_sz; idx++) {
  996. if (rxtid->hold_q[idx].skb) {
  997. /*
  998. * There is a frame in the queue and no
  999. * timer so start a timer to ensure that
  1000. * the frame doesn't remain stuck
  1001. * forever.
  1002. */
  1003. agg_conn->timer_scheduled = true;
  1004. mod_timer(&agg_conn->timer,
  1005. (jiffies + (HZ * AGGR_RX_TIMEOUT) / 1000));
  1006. rxtid->timer_mon = true;
  1007. break;
  1008. }
  1009. }
  1010. spin_unlock_bh(&rxtid->lock);
  1011. return is_queued;
  1012. }
  1013. static void ath6kl_uapsd_trigger_frame_rx(struct ath6kl_vif *vif,
  1014. struct ath6kl_sta *conn)
  1015. {
  1016. struct ath6kl *ar = vif->ar;
  1017. bool is_apsdq_empty, is_apsdq_empty_at_start;
  1018. u32 num_frames_to_deliver, flags;
  1019. struct sk_buff *skb = NULL;
  1020. /*
  1021. * If the APSD q for this STA is not empty, dequeue and
  1022. * send a pkt from the head of the q. Also update the
  1023. * More data bit in the WMI_DATA_HDR if there are
  1024. * more pkts for this STA in the APSD q.
  1025. * If there are no more pkts for this STA,
  1026. * update the APSD bitmap for this STA.
  1027. */
  1028. num_frames_to_deliver = (conn->apsd_info >> ATH6KL_APSD_NUM_OF_AC) &
  1029. ATH6KL_APSD_FRAME_MASK;
  1030. /*
  1031. * Number of frames to send in a service period is
  1032. * indicated by the station
  1033. * in the QOS_INFO of the association request
  1034. * If it is zero, send all frames
  1035. */
  1036. if (!num_frames_to_deliver)
  1037. num_frames_to_deliver = ATH6KL_APSD_ALL_FRAME;
  1038. spin_lock_bh(&conn->psq_lock);
  1039. is_apsdq_empty = skb_queue_empty(&conn->apsdq);
  1040. spin_unlock_bh(&conn->psq_lock);
  1041. is_apsdq_empty_at_start = is_apsdq_empty;
  1042. while ((!is_apsdq_empty) && (num_frames_to_deliver)) {
  1043. spin_lock_bh(&conn->psq_lock);
  1044. skb = skb_dequeue(&conn->apsdq);
  1045. is_apsdq_empty = skb_queue_empty(&conn->apsdq);
  1046. spin_unlock_bh(&conn->psq_lock);
  1047. /*
  1048. * Set the STA flag to Trigger delivery,
  1049. * so that the frame will go out
  1050. */
  1051. conn->sta_flags |= STA_PS_APSD_TRIGGER;
  1052. num_frames_to_deliver--;
  1053. /* Last frame in the service period, set EOSP or queue empty */
  1054. if ((is_apsdq_empty) || (!num_frames_to_deliver))
  1055. conn->sta_flags |= STA_PS_APSD_EOSP;
  1056. ath6kl_data_tx(skb, vif->ndev);
  1057. conn->sta_flags &= ~(STA_PS_APSD_TRIGGER);
  1058. conn->sta_flags &= ~(STA_PS_APSD_EOSP);
  1059. }
  1060. if (is_apsdq_empty) {
  1061. if (is_apsdq_empty_at_start)
  1062. flags = WMI_AP_APSD_NO_DELIVERY_FRAMES;
  1063. else
  1064. flags = 0;
  1065. ath6kl_wmi_set_apsd_bfrd_traf(ar->wmi,
  1066. vif->fw_vif_idx,
  1067. conn->aid, 0, flags);
  1068. }
  1069. return;
  1070. }
  1071. void ath6kl_rx(struct htc_target *target, struct htc_packet *packet)
  1072. {
  1073. struct ath6kl *ar = target->dev->ar;
  1074. struct sk_buff *skb = packet->pkt_cntxt;
  1075. struct wmi_rx_meta_v2 *meta;
  1076. struct wmi_data_hdr *dhdr;
  1077. int min_hdr_len;
  1078. u8 meta_type, dot11_hdr = 0;
  1079. u8 pad_before_data_start;
  1080. int status = packet->status;
  1081. enum htc_endpoint_id ept = packet->endpoint;
  1082. bool is_amsdu, prev_ps, ps_state = false;
  1083. bool trig_state = false;
  1084. struct ath6kl_sta *conn = NULL;
  1085. struct sk_buff *skb1 = NULL;
  1086. struct ethhdr *datap = NULL;
  1087. struct ath6kl_vif *vif;
  1088. struct aggr_info_conn *aggr_conn;
  1089. u16 seq_no, offset;
  1090. u8 tid, if_idx;
  1091. ath6kl_dbg(ATH6KL_DBG_WLAN_RX,
  1092. "%s: ar=0x%p eid=%d, skb=0x%p, data=0x%p, len=0x%x status:%d",
  1093. __func__, ar, ept, skb, packet->buf,
  1094. packet->act_len, status);
  1095. if (status || packet->act_len < HTC_HDR_LENGTH) {
  1096. dev_kfree_skb(skb);
  1097. return;
  1098. }
  1099. skb_put(skb, packet->act_len + HTC_HDR_LENGTH);
  1100. skb_pull(skb, HTC_HDR_LENGTH);
  1101. ath6kl_dbg_dump(ATH6KL_DBG_RAW_BYTES, __func__, "rx ",
  1102. skb->data, skb->len);
  1103. if (ept == ar->ctrl_ep) {
  1104. if (test_bit(WMI_ENABLED, &ar->flag)) {
  1105. ath6kl_check_wow_status(ar);
  1106. ath6kl_wmi_control_rx(ar->wmi, skb);
  1107. return;
  1108. }
  1109. if_idx =
  1110. wmi_cmd_hdr_get_if_idx((struct wmi_cmd_hdr *) skb->data);
  1111. } else {
  1112. if_idx =
  1113. wmi_data_hdr_get_if_idx((struct wmi_data_hdr *) skb->data);
  1114. }
  1115. vif = ath6kl_get_vif_by_index(ar, if_idx);
  1116. if (!vif) {
  1117. dev_kfree_skb(skb);
  1118. return;
  1119. }
  1120. /*
  1121. * Take lock to protect buffer counts and adaptive power throughput
  1122. * state.
  1123. */
  1124. spin_lock_bh(&vif->if_lock);
  1125. vif->net_stats.rx_packets++;
  1126. vif->net_stats.rx_bytes += packet->act_len;
  1127. spin_unlock_bh(&vif->if_lock);
  1128. skb->dev = vif->ndev;
  1129. if (!test_bit(WMI_ENABLED, &ar->flag)) {
  1130. if (EPPING_ALIGNMENT_PAD > 0)
  1131. skb_pull(skb, EPPING_ALIGNMENT_PAD);
  1132. ath6kl_deliver_frames_to_nw_stack(vif->ndev, skb);
  1133. return;
  1134. }
  1135. ath6kl_check_wow_status(ar);
  1136. min_hdr_len = sizeof(struct ethhdr) + sizeof(struct wmi_data_hdr) +
  1137. sizeof(struct ath6kl_llc_snap_hdr);
  1138. dhdr = (struct wmi_data_hdr *) skb->data;
  1139. /*
  1140. * In the case of AP mode we may receive NULL data frames
  1141. * that do not have LLC hdr. They are 16 bytes in size.
  1142. * Allow these frames in the AP mode.
  1143. */
  1144. if (vif->nw_type != AP_NETWORK &&
  1145. ((packet->act_len < min_hdr_len) ||
  1146. (packet->act_len > WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH))) {
  1147. ath6kl_info("frame len is too short or too long\n");
  1148. vif->net_stats.rx_errors++;
  1149. vif->net_stats.rx_length_errors++;
  1150. dev_kfree_skb(skb);
  1151. return;
  1152. }
  1153. /* Get the Power save state of the STA */
  1154. if (vif->nw_type == AP_NETWORK) {
  1155. meta_type = wmi_data_hdr_get_meta(dhdr);
  1156. ps_state = !!((dhdr->info >> WMI_DATA_HDR_PS_SHIFT) &
  1157. WMI_DATA_HDR_PS_MASK);
  1158. offset = sizeof(struct wmi_data_hdr);
  1159. trig_state = !!(le16_to_cpu(dhdr->info3) & WMI_DATA_HDR_TRIG);
  1160. switch (meta_type) {
  1161. case 0:
  1162. break;
  1163. case WMI_META_VERSION_1:
  1164. offset += sizeof(struct wmi_rx_meta_v1);
  1165. break;
  1166. case WMI_META_VERSION_2:
  1167. offset += sizeof(struct wmi_rx_meta_v2);
  1168. break;
  1169. default:
  1170. break;
  1171. }
  1172. datap = (struct ethhdr *) (skb->data + offset);
  1173. conn = ath6kl_find_sta(vif, datap->h_source);
  1174. if (!conn) {
  1175. dev_kfree_skb(skb);
  1176. return;
  1177. }
  1178. /*
  1179. * If there is a change in PS state of the STA,
  1180. * take appropriate steps:
  1181. *
  1182. * 1. If Sleep-->Awake, flush the psq for the STA
  1183. * Clear the PVB for the STA.
  1184. * 2. If Awake-->Sleep, Starting queueing frames
  1185. * the STA.
  1186. */
  1187. prev_ps = !!(conn->sta_flags & STA_PS_SLEEP);
  1188. if (ps_state)
  1189. conn->sta_flags |= STA_PS_SLEEP;
  1190. else
  1191. conn->sta_flags &= ~STA_PS_SLEEP;
  1192. /* Accept trigger only when the station is in sleep */
  1193. if ((conn->sta_flags & STA_PS_SLEEP) && trig_state)
  1194. ath6kl_uapsd_trigger_frame_rx(vif, conn);
  1195. if (prev_ps ^ !!(conn->sta_flags & STA_PS_SLEEP)) {
  1196. if (!(conn->sta_flags & STA_PS_SLEEP)) {
  1197. struct sk_buff *skbuff = NULL;
  1198. bool is_apsdq_empty;
  1199. struct ath6kl_mgmt_buff *mgmt;
  1200. u8 idx;
  1201. spin_lock_bh(&conn->psq_lock);
  1202. while (conn->mgmt_psq_len > 0) {
  1203. mgmt = list_first_entry(
  1204. &conn->mgmt_psq,
  1205. struct ath6kl_mgmt_buff,
  1206. list);
  1207. list_del(&mgmt->list);
  1208. conn->mgmt_psq_len--;
  1209. spin_unlock_bh(&conn->psq_lock);
  1210. idx = vif->fw_vif_idx;
  1211. ath6kl_wmi_send_mgmt_cmd(ar->wmi,
  1212. idx,
  1213. mgmt->id,
  1214. mgmt->freq,
  1215. mgmt->wait,
  1216. mgmt->buf,
  1217. mgmt->len,
  1218. mgmt->no_cck);
  1219. kfree(mgmt);
  1220. spin_lock_bh(&conn->psq_lock);
  1221. }
  1222. conn->mgmt_psq_len = 0;
  1223. while ((skbuff = skb_dequeue(&conn->psq))) {
  1224. spin_unlock_bh(&conn->psq_lock);
  1225. ath6kl_data_tx(skbuff, vif->ndev);
  1226. spin_lock_bh(&conn->psq_lock);
  1227. }
  1228. is_apsdq_empty = skb_queue_empty(&conn->apsdq);
  1229. while ((skbuff = skb_dequeue(&conn->apsdq))) {
  1230. spin_unlock_bh(&conn->psq_lock);
  1231. ath6kl_data_tx(skbuff, vif->ndev);
  1232. spin_lock_bh(&conn->psq_lock);
  1233. }
  1234. spin_unlock_bh(&conn->psq_lock);
  1235. if (!is_apsdq_empty)
  1236. ath6kl_wmi_set_apsd_bfrd_traf(
  1237. ar->wmi,
  1238. vif->fw_vif_idx,
  1239. conn->aid, 0, 0);
  1240. /* Clear the PVB for this STA */
  1241. ath6kl_wmi_set_pvb_cmd(ar->wmi, vif->fw_vif_idx,
  1242. conn->aid, 0);
  1243. }
  1244. }
  1245. /* drop NULL data frames here */
  1246. if ((packet->act_len < min_hdr_len) ||
  1247. (packet->act_len >
  1248. WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH)) {
  1249. dev_kfree_skb(skb);
  1250. return;
  1251. }
  1252. }
  1253. is_amsdu = wmi_data_hdr_is_amsdu(dhdr) ? true : false;
  1254. tid = wmi_data_hdr_get_up(dhdr);
  1255. seq_no = wmi_data_hdr_get_seqno(dhdr);
  1256. meta_type = wmi_data_hdr_get_meta(dhdr);
  1257. dot11_hdr = wmi_data_hdr_get_dot11(dhdr);
  1258. pad_before_data_start =
  1259. (le16_to_cpu(dhdr->info3) >> WMI_DATA_HDR_PAD_BEFORE_DATA_SHIFT)
  1260. & WMI_DATA_HDR_PAD_BEFORE_DATA_MASK;
  1261. skb_pull(skb, sizeof(struct wmi_data_hdr));
  1262. switch (meta_type) {
  1263. case WMI_META_VERSION_1:
  1264. skb_pull(skb, sizeof(struct wmi_rx_meta_v1));
  1265. break;
  1266. case WMI_META_VERSION_2:
  1267. meta = (struct wmi_rx_meta_v2 *) skb->data;
  1268. if (meta->csum_flags & 0x1) {
  1269. skb->ip_summed = CHECKSUM_COMPLETE;
  1270. skb->csum = (__force __wsum) meta->csum;
  1271. }
  1272. skb_pull(skb, sizeof(struct wmi_rx_meta_v2));
  1273. break;
  1274. default:
  1275. break;
  1276. }
  1277. skb_pull(skb, pad_before_data_start);
  1278. if (dot11_hdr)
  1279. status = ath6kl_wmi_dot11_hdr_remove(ar->wmi, skb);
  1280. else if (!is_amsdu)
  1281. status = ath6kl_wmi_dot3_2_dix(skb);
  1282. if (status) {
  1283. /*
  1284. * Drop frames that could not be processed (lack of
  1285. * memory, etc.)
  1286. */
  1287. dev_kfree_skb(skb);
  1288. return;
  1289. }
  1290. if (!(vif->ndev->flags & IFF_UP)) {
  1291. dev_kfree_skb(skb);
  1292. return;
  1293. }
  1294. if (vif->nw_type == AP_NETWORK) {
  1295. datap = (struct ethhdr *) skb->data;
  1296. if (is_multicast_ether_addr(datap->h_dest))
  1297. /*
  1298. * Bcast/Mcast frames should be sent to the
  1299. * OS stack as well as on the air.
  1300. */
  1301. skb1 = skb_copy(skb, GFP_ATOMIC);
  1302. else {
  1303. /*
  1304. * Search for a connected STA with dstMac
  1305. * as the Mac address. If found send the
  1306. * frame to it on the air else send the
  1307. * frame up the stack.
  1308. */
  1309. conn = ath6kl_find_sta(vif, datap->h_dest);
  1310. if (conn && ar->intra_bss) {
  1311. skb1 = skb;
  1312. skb = NULL;
  1313. } else if (conn && !ar->intra_bss) {
  1314. dev_kfree_skb(skb);
  1315. skb = NULL;
  1316. }
  1317. }
  1318. if (skb1)
  1319. ath6kl_data_tx(skb1, vif->ndev);
  1320. if (skb == NULL) {
  1321. /* nothing to deliver up the stack */
  1322. return;
  1323. }
  1324. }
  1325. datap = (struct ethhdr *) skb->data;
  1326. if (is_unicast_ether_addr(datap->h_dest)) {
  1327. if (vif->nw_type == AP_NETWORK) {
  1328. conn = ath6kl_find_sta(vif, datap->h_source);
  1329. if (!conn)
  1330. return;
  1331. aggr_conn = conn->aggr_conn;
  1332. } else
  1333. aggr_conn = vif->aggr_cntxt->aggr_conn;
  1334. if (aggr_process_recv_frm(aggr_conn, tid, seq_no,
  1335. is_amsdu, skb)) {
  1336. /* aggregation code will handle the skb */
  1337. return;
  1338. }
  1339. } else if (!is_broadcast_ether_addr(datap->h_dest))
  1340. vif->net_stats.multicast++;
  1341. ath6kl_deliver_frames_to_nw_stack(vif->ndev, skb);
  1342. }
  1343. static void aggr_timeout(unsigned long arg)
  1344. {
  1345. u8 i, j;
  1346. struct aggr_info_conn *aggr_conn = (struct aggr_info_conn *) arg;
  1347. struct rxtid *rxtid;
  1348. struct rxtid_stats *stats;
  1349. for (i = 0; i < NUM_OF_TIDS; i++) {
  1350. rxtid = &aggr_conn->rx_tid[i];
  1351. stats = &aggr_conn->stat[i];
  1352. if (!rxtid->aggr || !rxtid->timer_mon)
  1353. continue;
  1354. stats->num_timeouts++;
  1355. ath6kl_dbg(ATH6KL_DBG_AGGR,
  1356. "aggr timeout (st %d end %d)\n",
  1357. rxtid->seq_next,
  1358. ((rxtid->seq_next + rxtid->hold_q_sz-1) &
  1359. ATH6KL_MAX_SEQ_NO));
  1360. aggr_deque_frms(aggr_conn, i, 0, 0);
  1361. }
  1362. aggr_conn->timer_scheduled = false;
  1363. for (i = 0; i < NUM_OF_TIDS; i++) {
  1364. rxtid = &aggr_conn->rx_tid[i];
  1365. if (rxtid->aggr && rxtid->hold_q) {
  1366. spin_lock_bh(&rxtid->lock);
  1367. for (j = 0; j < rxtid->hold_q_sz; j++) {
  1368. if (rxtid->hold_q[j].skb) {
  1369. aggr_conn->timer_scheduled = true;
  1370. rxtid->timer_mon = true;
  1371. break;
  1372. }
  1373. }
  1374. spin_unlock_bh(&rxtid->lock);
  1375. if (j >= rxtid->hold_q_sz)
  1376. rxtid->timer_mon = false;
  1377. }
  1378. }
  1379. if (aggr_conn->timer_scheduled)
  1380. mod_timer(&aggr_conn->timer,
  1381. jiffies + msecs_to_jiffies(AGGR_RX_TIMEOUT));
  1382. }
  1383. static void aggr_delete_tid_state(struct aggr_info_conn *aggr_conn, u8 tid)
  1384. {
  1385. struct rxtid *rxtid;
  1386. struct rxtid_stats *stats;
  1387. if (!aggr_conn || tid >= NUM_OF_TIDS)
  1388. return;
  1389. rxtid = &aggr_conn->rx_tid[tid];
  1390. stats = &aggr_conn->stat[tid];
  1391. if (rxtid->aggr)
  1392. aggr_deque_frms(aggr_conn, tid, 0, 0);
  1393. rxtid->aggr = false;
  1394. rxtid->timer_mon = false;
  1395. rxtid->win_sz = 0;
  1396. rxtid->seq_next = 0;
  1397. rxtid->hold_q_sz = 0;
  1398. kfree(rxtid->hold_q);
  1399. rxtid->hold_q = NULL;
  1400. memset(stats, 0, sizeof(struct rxtid_stats));
  1401. }
  1402. void aggr_recv_addba_req_evt(struct ath6kl_vif *vif, u8 tid_mux, u16 seq_no,
  1403. u8 win_sz)
  1404. {
  1405. struct ath6kl_sta *sta;
  1406. struct aggr_info_conn *aggr_conn = NULL;
  1407. struct rxtid *rxtid;
  1408. struct rxtid_stats *stats;
  1409. u16 hold_q_size;
  1410. u8 tid, aid;
  1411. if (vif->nw_type == AP_NETWORK) {
  1412. aid = ath6kl_get_aid(tid_mux);
  1413. sta = ath6kl_find_sta_by_aid(vif->ar, aid);
  1414. if (sta)
  1415. aggr_conn = sta->aggr_conn;
  1416. } else
  1417. aggr_conn = vif->aggr_cntxt->aggr_conn;
  1418. if (!aggr_conn)
  1419. return;
  1420. tid = ath6kl_get_tid(tid_mux);
  1421. if (tid >= NUM_OF_TIDS)
  1422. return;
  1423. rxtid = &aggr_conn->rx_tid[tid];
  1424. stats = &aggr_conn->stat[tid];
  1425. if (win_sz < AGGR_WIN_SZ_MIN || win_sz > AGGR_WIN_SZ_MAX)
  1426. ath6kl_dbg(ATH6KL_DBG_WLAN_RX, "%s: win_sz %d, tid %d\n",
  1427. __func__, win_sz, tid);
  1428. if (rxtid->aggr)
  1429. aggr_delete_tid_state(aggr_conn, tid);
  1430. rxtid->seq_next = seq_no;
  1431. hold_q_size = TID_WINDOW_SZ(win_sz) * sizeof(struct skb_hold_q);
  1432. rxtid->hold_q = kzalloc(hold_q_size, GFP_KERNEL);
  1433. if (!rxtid->hold_q)
  1434. return;
  1435. rxtid->win_sz = win_sz;
  1436. rxtid->hold_q_sz = TID_WINDOW_SZ(win_sz);
  1437. if (!skb_queue_empty(&rxtid->q))
  1438. return;
  1439. rxtid->aggr = true;
  1440. }
  1441. void aggr_conn_init(struct ath6kl_vif *vif, struct aggr_info *aggr_info,
  1442. struct aggr_info_conn *aggr_conn)
  1443. {
  1444. struct rxtid *rxtid;
  1445. u8 i;
  1446. aggr_conn->aggr_sz = AGGR_SZ_DEFAULT;
  1447. aggr_conn->dev = vif->ndev;
  1448. init_timer(&aggr_conn->timer);
  1449. aggr_conn->timer.function = aggr_timeout;
  1450. aggr_conn->timer.data = (unsigned long) aggr_conn;
  1451. aggr_conn->aggr_info = aggr_info;
  1452. aggr_conn->timer_scheduled = false;
  1453. for (i = 0; i < NUM_OF_TIDS; i++) {
  1454. rxtid = &aggr_conn->rx_tid[i];
  1455. rxtid->aggr = false;
  1456. rxtid->timer_mon = false;
  1457. skb_queue_head_init(&rxtid->q);
  1458. spin_lock_init(&rxtid->lock);
  1459. }
  1460. }
  1461. struct aggr_info *aggr_init(struct ath6kl_vif *vif)
  1462. {
  1463. struct aggr_info *p_aggr = NULL;
  1464. p_aggr = kzalloc(sizeof(struct aggr_info), GFP_KERNEL);
  1465. if (!p_aggr) {
  1466. ath6kl_err("failed to alloc memory for aggr_node\n");
  1467. return NULL;
  1468. }
  1469. p_aggr->aggr_conn = kzalloc(sizeof(struct aggr_info_conn), GFP_KERNEL);
  1470. if (!p_aggr->aggr_conn) {
  1471. ath6kl_err("failed to alloc memory for connection specific aggr info\n");
  1472. kfree(p_aggr);
  1473. return NULL;
  1474. }
  1475. aggr_conn_init(vif, p_aggr, p_aggr->aggr_conn);
  1476. skb_queue_head_init(&p_aggr->rx_amsdu_freeq);
  1477. ath6kl_alloc_netbufs(&p_aggr->rx_amsdu_freeq, AGGR_NUM_OF_FREE_NETBUFS);
  1478. return p_aggr;
  1479. }
  1480. void aggr_recv_delba_req_evt(struct ath6kl_vif *vif, u8 tid_mux)
  1481. {
  1482. struct ath6kl_sta *sta;
  1483. struct rxtid *rxtid;
  1484. struct aggr_info_conn *aggr_conn = NULL;
  1485. u8 tid, aid;
  1486. if (vif->nw_type == AP_NETWORK) {
  1487. aid = ath6kl_get_aid(tid_mux);
  1488. sta = ath6kl_find_sta_by_aid(vif->ar, aid);
  1489. if (sta)
  1490. aggr_conn = sta->aggr_conn;
  1491. } else
  1492. aggr_conn = vif->aggr_cntxt->aggr_conn;
  1493. if (!aggr_conn)
  1494. return;
  1495. tid = ath6kl_get_tid(tid_mux);
  1496. if (tid >= NUM_OF_TIDS)
  1497. return;
  1498. rxtid = &aggr_conn->rx_tid[tid];
  1499. if (rxtid->aggr)
  1500. aggr_delete_tid_state(aggr_conn, tid);
  1501. }
  1502. void aggr_reset_state(struct aggr_info_conn *aggr_conn)
  1503. {
  1504. u8 tid;
  1505. if (!aggr_conn)
  1506. return;
  1507. if (aggr_conn->timer_scheduled) {
  1508. del_timer(&aggr_conn->timer);
  1509. aggr_conn->timer_scheduled = false;
  1510. }
  1511. for (tid = 0; tid < NUM_OF_TIDS; tid++)
  1512. aggr_delete_tid_state(aggr_conn, tid);
  1513. }
  1514. /* clean up our amsdu buffer list */
  1515. void ath6kl_cleanup_amsdu_rxbufs(struct ath6kl *ar)
  1516. {
  1517. struct htc_packet *packet, *tmp_pkt;
  1518. spin_lock_bh(&ar->lock);
  1519. if (list_empty(&ar->amsdu_rx_buffer_queue)) {
  1520. spin_unlock_bh(&ar->lock);
  1521. return;
  1522. }
  1523. list_for_each_entry_safe(packet, tmp_pkt, &ar->amsdu_rx_buffer_queue,
  1524. list) {
  1525. list_del(&packet->list);
  1526. spin_unlock_bh(&ar->lock);
  1527. dev_kfree_skb(packet->pkt_cntxt);
  1528. spin_lock_bh(&ar->lock);
  1529. }
  1530. spin_unlock_bh(&ar->lock);
  1531. }
  1532. void aggr_module_destroy(struct aggr_info *aggr_info)
  1533. {
  1534. if (!aggr_info)
  1535. return;
  1536. aggr_reset_state(aggr_info->aggr_conn);
  1537. skb_queue_purge(&aggr_info->rx_amsdu_freeq);
  1538. kfree(aggr_info->aggr_conn);
  1539. kfree(aggr_info);
  1540. }