vexpress-sysreg.c 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522
  1. /*
  2. * This program is free software; you can redistribute it and/or modify
  3. * it under the terms of the GNU General Public License version 2 as
  4. * published by the Free Software Foundation.
  5. *
  6. * This program is distributed in the hope that it will be useful,
  7. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  8. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  9. * GNU General Public License for more details.
  10. *
  11. * Copyright (C) 2012 ARM Limited
  12. */
  13. #include <linux/err.h>
  14. #include <linux/gpio.h>
  15. #include <linux/io.h>
  16. #include <linux/leds.h>
  17. #include <linux/of_address.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/regulator/driver.h>
  20. #include <linux/slab.h>
  21. #include <linux/stat.h>
  22. #include <linux/timer.h>
  23. #include <linux/vexpress.h>
  24. #define SYS_ID 0x000
  25. #define SYS_SW 0x004
  26. #define SYS_LED 0x008
  27. #define SYS_100HZ 0x024
  28. #define SYS_FLAGS 0x030
  29. #define SYS_FLAGSSET 0x030
  30. #define SYS_FLAGSCLR 0x034
  31. #define SYS_NVFLAGS 0x038
  32. #define SYS_NVFLAGSSET 0x038
  33. #define SYS_NVFLAGSCLR 0x03c
  34. #define SYS_MCI 0x048
  35. #define SYS_FLASH 0x04c
  36. #define SYS_CFGSW 0x058
  37. #define SYS_24MHZ 0x05c
  38. #define SYS_MISC 0x060
  39. #define SYS_DMA 0x064
  40. #define SYS_PROCID0 0x084
  41. #define SYS_PROCID1 0x088
  42. #define SYS_CFGDATA 0x0a0
  43. #define SYS_CFGCTRL 0x0a4
  44. #define SYS_CFGSTAT 0x0a8
  45. #define SYS_HBI_MASK 0xfff
  46. #define SYS_ID_HBI_SHIFT 16
  47. #define SYS_PROCIDx_HBI_SHIFT 0
  48. #define SYS_LED_LED(n) (1 << (n))
  49. #define SYS_MCI_CARDIN (1 << 0)
  50. #define SYS_MCI_WPROT (1 << 1)
  51. #define SYS_FLASH_WPn (1 << 0)
  52. #define SYS_MISC_MASTERSITE (1 << 14)
  53. #define SYS_CFGCTRL_START (1 << 31)
  54. #define SYS_CFGCTRL_WRITE (1 << 30)
  55. #define SYS_CFGCTRL_DCC(n) (((n) & 0xf) << 26)
  56. #define SYS_CFGCTRL_FUNC(n) (((n) & 0x3f) << 20)
  57. #define SYS_CFGCTRL_SITE(n) (((n) & 0x3) << 16)
  58. #define SYS_CFGCTRL_POSITION(n) (((n) & 0xf) << 12)
  59. #define SYS_CFGCTRL_DEVICE(n) (((n) & 0xfff) << 0)
  60. #define SYS_CFGSTAT_ERR (1 << 1)
  61. #define SYS_CFGSTAT_COMPLETE (1 << 0)
  62. static void __iomem *vexpress_sysreg_base;
  63. static struct device *vexpress_sysreg_dev;
  64. static int vexpress_master_site;
  65. void vexpress_flags_set(u32 data)
  66. {
  67. writel(~0, vexpress_sysreg_base + SYS_FLAGSCLR);
  68. writel(data, vexpress_sysreg_base + SYS_FLAGSSET);
  69. }
  70. u32 vexpress_get_procid(int site)
  71. {
  72. if (site == VEXPRESS_SITE_MASTER)
  73. site = vexpress_master_site;
  74. return readl(vexpress_sysreg_base + (site == VEXPRESS_SITE_DB1 ?
  75. SYS_PROCID0 : SYS_PROCID1));
  76. }
  77. u32 vexpress_get_hbi(int site)
  78. {
  79. u32 id;
  80. switch (site) {
  81. case VEXPRESS_SITE_MB:
  82. id = readl(vexpress_sysreg_base + SYS_ID);
  83. return (id >> SYS_ID_HBI_SHIFT) & SYS_HBI_MASK;
  84. case VEXPRESS_SITE_MASTER:
  85. case VEXPRESS_SITE_DB1:
  86. case VEXPRESS_SITE_DB2:
  87. id = vexpress_get_procid(site);
  88. return (id >> SYS_PROCIDx_HBI_SHIFT) & SYS_HBI_MASK;
  89. }
  90. return ~0;
  91. }
  92. void __iomem *vexpress_get_24mhz_clock_base(void)
  93. {
  94. return vexpress_sysreg_base + SYS_24MHZ;
  95. }
  96. static void vexpress_sysreg_find_prop(struct device_node *node,
  97. const char *name, u32 *val)
  98. {
  99. of_node_get(node);
  100. while (node) {
  101. if (of_property_read_u32(node, name, val) == 0) {
  102. of_node_put(node);
  103. return;
  104. }
  105. node = of_get_next_parent(node);
  106. }
  107. }
  108. unsigned __vexpress_get_site(struct device *dev, struct device_node *node)
  109. {
  110. u32 site = 0;
  111. WARN_ON(dev && node && dev->of_node != node);
  112. if (dev && !node)
  113. node = dev->of_node;
  114. if (node) {
  115. vexpress_sysreg_find_prop(node, "arm,vexpress,site", &site);
  116. } else if (dev && dev->bus == &platform_bus_type) {
  117. struct platform_device *pdev = to_platform_device(dev);
  118. if (pdev->num_resources == 1 &&
  119. pdev->resource[0].flags == IORESOURCE_BUS)
  120. site = pdev->resource[0].start;
  121. } else if (dev && strncmp(dev_name(dev), "ct:", 3) == 0) {
  122. site = VEXPRESS_SITE_MASTER;
  123. }
  124. if (site == VEXPRESS_SITE_MASTER)
  125. site = vexpress_master_site;
  126. return site;
  127. }
  128. struct vexpress_sysreg_config_func {
  129. u32 template;
  130. u32 device;
  131. };
  132. static struct vexpress_config_bridge *vexpress_sysreg_config_bridge;
  133. static struct timer_list vexpress_sysreg_config_timer;
  134. static u32 *vexpress_sysreg_config_data;
  135. static int vexpress_sysreg_config_tries;
  136. static void *vexpress_sysreg_config_func_get(struct device *dev,
  137. struct device_node *node)
  138. {
  139. struct vexpress_sysreg_config_func *config_func;
  140. u32 site;
  141. u32 position = 0;
  142. u32 dcc = 0;
  143. u32 func_device[2];
  144. int err = -EFAULT;
  145. if (node) {
  146. of_node_get(node);
  147. vexpress_sysreg_find_prop(node, "arm,vexpress,site", &site);
  148. vexpress_sysreg_find_prop(node, "arm,vexpress,position",
  149. &position);
  150. vexpress_sysreg_find_prop(node, "arm,vexpress,dcc", &dcc);
  151. err = of_property_read_u32_array(node,
  152. "arm,vexpress-sysreg,func", func_device,
  153. ARRAY_SIZE(func_device));
  154. of_node_put(node);
  155. } else if (dev && dev->bus == &platform_bus_type) {
  156. struct platform_device *pdev = to_platform_device(dev);
  157. if (pdev->num_resources == 1 &&
  158. pdev->resource[0].flags == IORESOURCE_BUS) {
  159. site = pdev->resource[0].start;
  160. func_device[0] = pdev->resource[0].end;
  161. func_device[1] = pdev->id;
  162. err = 0;
  163. }
  164. }
  165. if (err)
  166. return NULL;
  167. config_func = kzalloc(sizeof(*config_func), GFP_KERNEL);
  168. if (!config_func)
  169. return NULL;
  170. config_func->template = SYS_CFGCTRL_DCC(dcc);
  171. config_func->template |= SYS_CFGCTRL_FUNC(func_device[0]);
  172. config_func->template |= SYS_CFGCTRL_SITE(site == VEXPRESS_SITE_MASTER ?
  173. vexpress_master_site : site);
  174. config_func->template |= SYS_CFGCTRL_POSITION(position);
  175. config_func->device |= func_device[1];
  176. dev_dbg(vexpress_sysreg_dev, "func 0x%p = 0x%x, %d\n", config_func,
  177. config_func->template, config_func->device);
  178. return config_func;
  179. }
  180. static void vexpress_sysreg_config_func_put(void *func)
  181. {
  182. kfree(func);
  183. }
  184. static int vexpress_sysreg_config_func_exec(void *func, int offset,
  185. bool write, u32 *data)
  186. {
  187. int status;
  188. struct vexpress_sysreg_config_func *config_func = func;
  189. u32 command;
  190. if (WARN_ON(!vexpress_sysreg_base))
  191. return -ENOENT;
  192. command = readl(vexpress_sysreg_base + SYS_CFGCTRL);
  193. if (WARN_ON(command & SYS_CFGCTRL_START))
  194. return -EBUSY;
  195. command = SYS_CFGCTRL_START;
  196. command |= write ? SYS_CFGCTRL_WRITE : 0;
  197. command |= config_func->template;
  198. command |= SYS_CFGCTRL_DEVICE(config_func->device + offset);
  199. /* Use a canary for reads */
  200. if (!write)
  201. *data = 0xdeadbeef;
  202. dev_dbg(vexpress_sysreg_dev, "command %x, data %x\n",
  203. command, *data);
  204. writel(*data, vexpress_sysreg_base + SYS_CFGDATA);
  205. writel(0, vexpress_sysreg_base + SYS_CFGSTAT);
  206. writel(command, vexpress_sysreg_base + SYS_CFGCTRL);
  207. mb();
  208. if (vexpress_sysreg_dev) {
  209. /* Schedule completion check */
  210. if (!write)
  211. vexpress_sysreg_config_data = data;
  212. vexpress_sysreg_config_tries = 100;
  213. mod_timer(&vexpress_sysreg_config_timer,
  214. jiffies + usecs_to_jiffies(100));
  215. status = VEXPRESS_CONFIG_STATUS_WAIT;
  216. } else {
  217. /* Early execution, no timer available, have to spin */
  218. u32 cfgstat;
  219. do {
  220. cpu_relax();
  221. cfgstat = readl(vexpress_sysreg_base + SYS_CFGSTAT);
  222. } while (!cfgstat);
  223. if (!write && (cfgstat & SYS_CFGSTAT_COMPLETE))
  224. *data = readl(vexpress_sysreg_base + SYS_CFGDATA);
  225. status = VEXPRESS_CONFIG_STATUS_DONE;
  226. if (cfgstat & SYS_CFGSTAT_ERR)
  227. status = -EINVAL;
  228. }
  229. return status;
  230. }
  231. struct vexpress_config_bridge_info vexpress_sysreg_config_bridge_info = {
  232. .name = "vexpress-sysreg",
  233. .func_get = vexpress_sysreg_config_func_get,
  234. .func_put = vexpress_sysreg_config_func_put,
  235. .func_exec = vexpress_sysreg_config_func_exec,
  236. };
  237. static void vexpress_sysreg_config_complete(unsigned long data)
  238. {
  239. int status = VEXPRESS_CONFIG_STATUS_DONE;
  240. u32 cfgstat = readl(vexpress_sysreg_base + SYS_CFGSTAT);
  241. if (cfgstat & SYS_CFGSTAT_ERR)
  242. status = -EINVAL;
  243. if (!vexpress_sysreg_config_tries--)
  244. status = -ETIMEDOUT;
  245. if (status < 0) {
  246. dev_err(vexpress_sysreg_dev, "error %d\n", status);
  247. } else if (!(cfgstat & SYS_CFGSTAT_COMPLETE)) {
  248. mod_timer(&vexpress_sysreg_config_timer,
  249. jiffies + usecs_to_jiffies(50));
  250. return;
  251. }
  252. if (vexpress_sysreg_config_data) {
  253. *vexpress_sysreg_config_data = readl(vexpress_sysreg_base +
  254. SYS_CFGDATA);
  255. dev_dbg(vexpress_sysreg_dev, "read data %x\n",
  256. *vexpress_sysreg_config_data);
  257. vexpress_sysreg_config_data = NULL;
  258. }
  259. vexpress_config_complete(vexpress_sysreg_config_bridge, status);
  260. }
  261. void vexpress_sysreg_setup(struct device_node *node)
  262. {
  263. if (WARN_ON(!vexpress_sysreg_base))
  264. return;
  265. if (readl(vexpress_sysreg_base + SYS_MISC) & SYS_MISC_MASTERSITE)
  266. vexpress_master_site = VEXPRESS_SITE_DB2;
  267. else
  268. vexpress_master_site = VEXPRESS_SITE_DB1;
  269. vexpress_sysreg_config_bridge = vexpress_config_bridge_register(
  270. node, &vexpress_sysreg_config_bridge_info);
  271. WARN_ON(!vexpress_sysreg_config_bridge);
  272. }
  273. void __init vexpress_sysreg_early_init(void __iomem *base)
  274. {
  275. vexpress_sysreg_base = base;
  276. vexpress_sysreg_setup(NULL);
  277. }
  278. void __init vexpress_sysreg_of_early_init(void)
  279. {
  280. struct device_node *node;
  281. if (vexpress_sysreg_base)
  282. return;
  283. node = of_find_compatible_node(NULL, NULL, "arm,vexpress-sysreg");
  284. if (node) {
  285. vexpress_sysreg_base = of_iomap(node, 0);
  286. vexpress_sysreg_setup(node);
  287. }
  288. }
  289. #define VEXPRESS_SYSREG_GPIO(_name, _reg, _value) \
  290. [VEXPRESS_GPIO_##_name] = { \
  291. .reg = _reg, \
  292. .value = _reg##_##_value, \
  293. }
  294. static struct vexpress_sysreg_gpio {
  295. unsigned long reg;
  296. u32 value;
  297. } vexpress_sysreg_gpios[] = {
  298. VEXPRESS_SYSREG_GPIO(MMC_CARDIN, SYS_MCI, CARDIN),
  299. VEXPRESS_SYSREG_GPIO(MMC_WPROT, SYS_MCI, WPROT),
  300. VEXPRESS_SYSREG_GPIO(FLASH_WPn, SYS_FLASH, WPn),
  301. VEXPRESS_SYSREG_GPIO(LED0, SYS_LED, LED(0)),
  302. VEXPRESS_SYSREG_GPIO(LED1, SYS_LED, LED(1)),
  303. VEXPRESS_SYSREG_GPIO(LED2, SYS_LED, LED(2)),
  304. VEXPRESS_SYSREG_GPIO(LED3, SYS_LED, LED(3)),
  305. VEXPRESS_SYSREG_GPIO(LED4, SYS_LED, LED(4)),
  306. VEXPRESS_SYSREG_GPIO(LED5, SYS_LED, LED(5)),
  307. VEXPRESS_SYSREG_GPIO(LED6, SYS_LED, LED(6)),
  308. VEXPRESS_SYSREG_GPIO(LED7, SYS_LED, LED(7)),
  309. };
  310. static int vexpress_sysreg_gpio_direction_input(struct gpio_chip *chip,
  311. unsigned offset)
  312. {
  313. return 0;
  314. }
  315. static int vexpress_sysreg_gpio_get(struct gpio_chip *chip,
  316. unsigned offset)
  317. {
  318. struct vexpress_sysreg_gpio *gpio = &vexpress_sysreg_gpios[offset];
  319. u32 reg_value = readl(vexpress_sysreg_base + gpio->reg);
  320. return !!(reg_value & gpio->value);
  321. }
  322. static void vexpress_sysreg_gpio_set(struct gpio_chip *chip,
  323. unsigned offset, int value)
  324. {
  325. struct vexpress_sysreg_gpio *gpio = &vexpress_sysreg_gpios[offset];
  326. u32 reg_value = readl(vexpress_sysreg_base + gpio->reg);
  327. if (value)
  328. reg_value |= gpio->value;
  329. else
  330. reg_value &= ~gpio->value;
  331. writel(reg_value, vexpress_sysreg_base + gpio->reg);
  332. }
  333. static int vexpress_sysreg_gpio_direction_output(struct gpio_chip *chip,
  334. unsigned offset, int value)
  335. {
  336. vexpress_sysreg_gpio_set(chip, offset, value);
  337. return 0;
  338. }
  339. static struct gpio_chip vexpress_sysreg_gpio_chip = {
  340. .label = "vexpress-sysreg",
  341. .direction_input = vexpress_sysreg_gpio_direction_input,
  342. .direction_output = vexpress_sysreg_gpio_direction_output,
  343. .get = vexpress_sysreg_gpio_get,
  344. .set = vexpress_sysreg_gpio_set,
  345. .ngpio = ARRAY_SIZE(vexpress_sysreg_gpios),
  346. .base = 0,
  347. };
  348. #define VEXPRESS_SYSREG_GREEN_LED(_name, _default_trigger, _gpio) \
  349. { \
  350. .name = "v2m:green:"_name, \
  351. .default_trigger = _default_trigger, \
  352. .gpio = VEXPRESS_GPIO_##_gpio, \
  353. }
  354. struct gpio_led vexpress_sysreg_leds[] = {
  355. VEXPRESS_SYSREG_GREEN_LED("user1", "heartbeat", LED0),
  356. VEXPRESS_SYSREG_GREEN_LED("user2", "mmc0", LED1),
  357. VEXPRESS_SYSREG_GREEN_LED("user3", "cpu0", LED2),
  358. VEXPRESS_SYSREG_GREEN_LED("user4", "cpu1", LED3),
  359. VEXPRESS_SYSREG_GREEN_LED("user5", "cpu2", LED4),
  360. VEXPRESS_SYSREG_GREEN_LED("user6", "cpu3", LED5),
  361. VEXPRESS_SYSREG_GREEN_LED("user7", "cpu4", LED6),
  362. VEXPRESS_SYSREG_GREEN_LED("user8", "cpu5", LED7),
  363. };
  364. struct gpio_led_platform_data vexpress_sysreg_leds_pdata = {
  365. .num_leds = ARRAY_SIZE(vexpress_sysreg_leds),
  366. .leds = vexpress_sysreg_leds,
  367. };
  368. static ssize_t vexpress_sysreg_sys_id_show(struct device *dev,
  369. struct device_attribute *attr, char *buf)
  370. {
  371. return sprintf(buf, "0x%08x\n", readl(vexpress_sysreg_base + SYS_ID));
  372. }
  373. DEVICE_ATTR(sys_id, S_IRUGO, vexpress_sysreg_sys_id_show, NULL);
  374. static int vexpress_sysreg_probe(struct platform_device *pdev)
  375. {
  376. int err;
  377. struct resource *res = platform_get_resource(pdev,
  378. IORESOURCE_MEM, 0);
  379. if (!devm_request_mem_region(&pdev->dev, res->start,
  380. resource_size(res), pdev->name)) {
  381. dev_err(&pdev->dev, "Failed to request memory region!\n");
  382. return -EBUSY;
  383. }
  384. if (!vexpress_sysreg_base) {
  385. vexpress_sysreg_base = devm_ioremap(&pdev->dev, res->start,
  386. resource_size(res));
  387. vexpress_sysreg_setup(pdev->dev.of_node);
  388. }
  389. if (!vexpress_sysreg_base) {
  390. dev_err(&pdev->dev, "Failed to obtain base address!\n");
  391. return -EFAULT;
  392. }
  393. setup_timer(&vexpress_sysreg_config_timer,
  394. vexpress_sysreg_config_complete, 0);
  395. vexpress_sysreg_gpio_chip.dev = &pdev->dev;
  396. err = gpiochip_add(&vexpress_sysreg_gpio_chip);
  397. if (err) {
  398. vexpress_config_bridge_unregister(
  399. vexpress_sysreg_config_bridge);
  400. dev_err(&pdev->dev, "Failed to register GPIO chip! (%d)\n",
  401. err);
  402. return err;
  403. }
  404. platform_device_register_data(vexpress_sysreg_dev, "leds-gpio",
  405. PLATFORM_DEVID_AUTO, &vexpress_sysreg_leds_pdata,
  406. sizeof(vexpress_sysreg_leds_pdata));
  407. vexpress_sysreg_dev = &pdev->dev;
  408. device_create_file(vexpress_sysreg_dev, &dev_attr_sys_id);
  409. return 0;
  410. }
  411. static const struct of_device_id vexpress_sysreg_match[] = {
  412. { .compatible = "arm,vexpress-sysreg", },
  413. {},
  414. };
  415. static struct platform_driver vexpress_sysreg_driver = {
  416. .driver = {
  417. .name = "vexpress-sysreg",
  418. .of_match_table = vexpress_sysreg_match,
  419. },
  420. .probe = vexpress_sysreg_probe,
  421. };
  422. static int __init vexpress_sysreg_init(void)
  423. {
  424. vexpress_sysreg_of_early_init();
  425. return platform_driver_register(&vexpress_sysreg_driver);
  426. }
  427. core_initcall(vexpress_sysreg_init);