tps65910.c 13 KB

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  1. /*
  2. * tps65910.c -- TI TPS6591x
  3. *
  4. * Copyright 2010 Texas Instruments Inc.
  5. *
  6. * Author: Graeme Gregory <gg@slimlogic.co.uk>
  7. * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. *
  14. */
  15. #include <linux/module.h>
  16. #include <linux/moduleparam.h>
  17. #include <linux/init.h>
  18. #include <linux/err.h>
  19. #include <linux/slab.h>
  20. #include <linux/i2c.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/irq.h>
  23. #include <linux/irqdomain.h>
  24. #include <linux/mfd/core.h>
  25. #include <linux/regmap.h>
  26. #include <linux/mfd/tps65910.h>
  27. #include <linux/of_device.h>
  28. static struct resource rtc_resources[] = {
  29. {
  30. .start = TPS65910_IRQ_RTC_ALARM,
  31. .end = TPS65910_IRQ_RTC_ALARM,
  32. .flags = IORESOURCE_IRQ,
  33. }
  34. };
  35. static struct mfd_cell tps65910s[] = {
  36. {
  37. .name = "tps65910-gpio",
  38. },
  39. {
  40. .name = "tps65910-pmic",
  41. },
  42. {
  43. .name = "tps65910-rtc",
  44. .num_resources = ARRAY_SIZE(rtc_resources),
  45. .resources = &rtc_resources[0],
  46. },
  47. {
  48. .name = "tps65910-power",
  49. },
  50. };
  51. static const struct regmap_irq tps65911_irqs[] = {
  52. /* INT_STS */
  53. [TPS65911_IRQ_PWRHOLD_F] = {
  54. .mask = INT_MSK_PWRHOLD_F_IT_MSK_MASK,
  55. .reg_offset = 0,
  56. },
  57. [TPS65911_IRQ_VBAT_VMHI] = {
  58. .mask = INT_MSK_VMBHI_IT_MSK_MASK,
  59. .reg_offset = 0,
  60. },
  61. [TPS65911_IRQ_PWRON] = {
  62. .mask = INT_MSK_PWRON_IT_MSK_MASK,
  63. .reg_offset = 0,
  64. },
  65. [TPS65911_IRQ_PWRON_LP] = {
  66. .mask = INT_MSK_PWRON_LP_IT_MSK_MASK,
  67. .reg_offset = 0,
  68. },
  69. [TPS65911_IRQ_PWRHOLD_R] = {
  70. .mask = INT_MSK_PWRHOLD_R_IT_MSK_MASK,
  71. .reg_offset = 0,
  72. },
  73. [TPS65911_IRQ_HOTDIE] = {
  74. .mask = INT_MSK_HOTDIE_IT_MSK_MASK,
  75. .reg_offset = 0,
  76. },
  77. [TPS65911_IRQ_RTC_ALARM] = {
  78. .mask = INT_MSK_RTC_ALARM_IT_MSK_MASK,
  79. .reg_offset = 0,
  80. },
  81. [TPS65911_IRQ_RTC_PERIOD] = {
  82. .mask = INT_MSK_RTC_PERIOD_IT_MSK_MASK,
  83. .reg_offset = 0,
  84. },
  85. /* INT_STS2 */
  86. [TPS65911_IRQ_GPIO0_R] = {
  87. .mask = INT_MSK2_GPIO0_R_IT_MSK_MASK,
  88. .reg_offset = 1,
  89. },
  90. [TPS65911_IRQ_GPIO0_F] = {
  91. .mask = INT_MSK2_GPIO0_F_IT_MSK_MASK,
  92. .reg_offset = 1,
  93. },
  94. [TPS65911_IRQ_GPIO1_R] = {
  95. .mask = INT_MSK2_GPIO1_R_IT_MSK_MASK,
  96. .reg_offset = 1,
  97. },
  98. [TPS65911_IRQ_GPIO1_F] = {
  99. .mask = INT_MSK2_GPIO1_F_IT_MSK_MASK,
  100. .reg_offset = 1,
  101. },
  102. [TPS65911_IRQ_GPIO2_R] = {
  103. .mask = INT_MSK2_GPIO2_R_IT_MSK_MASK,
  104. .reg_offset = 1,
  105. },
  106. [TPS65911_IRQ_GPIO2_F] = {
  107. .mask = INT_MSK2_GPIO2_F_IT_MSK_MASK,
  108. .reg_offset = 1,
  109. },
  110. [TPS65911_IRQ_GPIO3_R] = {
  111. .mask = INT_MSK2_GPIO3_R_IT_MSK_MASK,
  112. .reg_offset = 1,
  113. },
  114. [TPS65911_IRQ_GPIO3_F] = {
  115. .mask = INT_MSK2_GPIO3_F_IT_MSK_MASK,
  116. .reg_offset = 1,
  117. },
  118. /* INT_STS2 */
  119. [TPS65911_IRQ_GPIO4_R] = {
  120. .mask = INT_MSK3_GPIO4_R_IT_MSK_MASK,
  121. .reg_offset = 2,
  122. },
  123. [TPS65911_IRQ_GPIO4_F] = {
  124. .mask = INT_MSK3_GPIO4_F_IT_MSK_MASK,
  125. .reg_offset = 2,
  126. },
  127. [TPS65911_IRQ_GPIO5_R] = {
  128. .mask = INT_MSK3_GPIO5_R_IT_MSK_MASK,
  129. .reg_offset = 2,
  130. },
  131. [TPS65911_IRQ_GPIO5_F] = {
  132. .mask = INT_MSK3_GPIO5_F_IT_MSK_MASK,
  133. .reg_offset = 2,
  134. },
  135. [TPS65911_IRQ_WTCHDG] = {
  136. .mask = INT_MSK3_WTCHDG_IT_MSK_MASK,
  137. .reg_offset = 2,
  138. },
  139. [TPS65911_IRQ_VMBCH2_H] = {
  140. .mask = INT_MSK3_VMBCH2_H_IT_MSK_MASK,
  141. .reg_offset = 2,
  142. },
  143. [TPS65911_IRQ_VMBCH2_L] = {
  144. .mask = INT_MSK3_VMBCH2_L_IT_MSK_MASK,
  145. .reg_offset = 2,
  146. },
  147. [TPS65911_IRQ_PWRDN] = {
  148. .mask = INT_MSK3_PWRDN_IT_MSK_MASK,
  149. .reg_offset = 2,
  150. },
  151. };
  152. static const struct regmap_irq tps65910_irqs[] = {
  153. /* INT_STS */
  154. [TPS65910_IRQ_VBAT_VMBDCH] = {
  155. .mask = TPS65910_INT_MSK_VMBDCH_IT_MSK_MASK,
  156. .reg_offset = 0,
  157. },
  158. [TPS65910_IRQ_VBAT_VMHI] = {
  159. .mask = TPS65910_INT_MSK_VMBHI_IT_MSK_MASK,
  160. .reg_offset = 0,
  161. },
  162. [TPS65910_IRQ_PWRON] = {
  163. .mask = TPS65910_INT_MSK_PWRON_IT_MSK_MASK,
  164. .reg_offset = 0,
  165. },
  166. [TPS65910_IRQ_PWRON_LP] = {
  167. .mask = TPS65910_INT_MSK_PWRON_LP_IT_MSK_MASK,
  168. .reg_offset = 0,
  169. },
  170. [TPS65910_IRQ_PWRHOLD] = {
  171. .mask = TPS65910_INT_MSK_PWRHOLD_IT_MSK_MASK,
  172. .reg_offset = 0,
  173. },
  174. [TPS65910_IRQ_HOTDIE] = {
  175. .mask = TPS65910_INT_MSK_HOTDIE_IT_MSK_MASK,
  176. .reg_offset = 0,
  177. },
  178. [TPS65910_IRQ_RTC_ALARM] = {
  179. .mask = TPS65910_INT_MSK_RTC_ALARM_IT_MSK_MASK,
  180. .reg_offset = 0,
  181. },
  182. [TPS65910_IRQ_RTC_PERIOD] = {
  183. .mask = TPS65910_INT_MSK_RTC_PERIOD_IT_MSK_MASK,
  184. .reg_offset = 0,
  185. },
  186. /* INT_STS2 */
  187. [TPS65910_IRQ_GPIO_R] = {
  188. .mask = TPS65910_INT_MSK2_GPIO0_F_IT_MSK_MASK,
  189. .reg_offset = 1,
  190. },
  191. [TPS65910_IRQ_GPIO_F] = {
  192. .mask = TPS65910_INT_MSK2_GPIO0_R_IT_MSK_MASK,
  193. .reg_offset = 1,
  194. },
  195. };
  196. static struct regmap_irq_chip tps65911_irq_chip = {
  197. .name = "tps65910",
  198. .irqs = tps65911_irqs,
  199. .num_irqs = ARRAY_SIZE(tps65911_irqs),
  200. .num_regs = 3,
  201. .irq_reg_stride = 2,
  202. .status_base = TPS65910_INT_STS,
  203. .mask_base = TPS65910_INT_MSK,
  204. .ack_base = TPS65910_INT_STS,
  205. };
  206. static struct regmap_irq_chip tps65910_irq_chip = {
  207. .name = "tps65910",
  208. .irqs = tps65910_irqs,
  209. .num_irqs = ARRAY_SIZE(tps65910_irqs),
  210. .num_regs = 2,
  211. .irq_reg_stride = 2,
  212. .status_base = TPS65910_INT_STS,
  213. .mask_base = TPS65910_INT_MSK,
  214. .ack_base = TPS65910_INT_STS,
  215. };
  216. static int tps65910_irq_init(struct tps65910 *tps65910, int irq,
  217. struct tps65910_platform_data *pdata)
  218. {
  219. int ret = 0;
  220. static struct regmap_irq_chip *tps6591x_irqs_chip;
  221. if (!irq) {
  222. dev_warn(tps65910->dev, "No interrupt support, no core IRQ\n");
  223. return -EINVAL;
  224. }
  225. if (!pdata) {
  226. dev_warn(tps65910->dev, "No interrupt support, no pdata\n");
  227. return -EINVAL;
  228. }
  229. switch (tps65910_chip_id(tps65910)) {
  230. case TPS65910:
  231. tps6591x_irqs_chip = &tps65910_irq_chip;
  232. break;
  233. case TPS65911:
  234. tps6591x_irqs_chip = &tps65911_irq_chip;
  235. break;
  236. }
  237. tps65910->chip_irq = irq;
  238. ret = regmap_add_irq_chip(tps65910->regmap, tps65910->chip_irq,
  239. IRQF_ONESHOT, pdata->irq_base,
  240. tps6591x_irqs_chip, &tps65910->irq_data);
  241. if (ret < 0)
  242. dev_warn(tps65910->dev, "Failed to add irq_chip %d\n", ret);
  243. return ret;
  244. }
  245. static int tps65910_irq_exit(struct tps65910 *tps65910)
  246. {
  247. if (tps65910->chip_irq > 0)
  248. regmap_del_irq_chip(tps65910->chip_irq, tps65910->irq_data);
  249. return 0;
  250. }
  251. static bool is_volatile_reg(struct device *dev, unsigned int reg)
  252. {
  253. struct tps65910 *tps65910 = dev_get_drvdata(dev);
  254. /*
  255. * Caching all regulator registers.
  256. * All regualator register address range is same for
  257. * TPS65910 and TPS65911
  258. */
  259. if ((reg >= TPS65910_VIO) && (reg <= TPS65910_VDAC)) {
  260. /* Check for non-existing register */
  261. if (tps65910_chip_id(tps65910) == TPS65910)
  262. if ((reg == TPS65911_VDDCTRL_OP) ||
  263. (reg == TPS65911_VDDCTRL_SR))
  264. return true;
  265. return false;
  266. }
  267. return true;
  268. }
  269. static const struct regmap_config tps65910_regmap_config = {
  270. .reg_bits = 8,
  271. .val_bits = 8,
  272. .volatile_reg = is_volatile_reg,
  273. .max_register = TPS65910_MAX_REGISTER - 1,
  274. .cache_type = REGCACHE_RBTREE,
  275. };
  276. static int tps65910_ck32k_init(struct tps65910 *tps65910,
  277. struct tps65910_board *pmic_pdata)
  278. {
  279. int ret;
  280. if (!pmic_pdata->en_ck32k_xtal)
  281. return 0;
  282. ret = tps65910_reg_clear_bits(tps65910, TPS65910_DEVCTRL,
  283. DEVCTRL_CK32K_CTRL_MASK);
  284. if (ret < 0) {
  285. dev_err(tps65910->dev, "clear ck32k_ctrl failed: %d\n", ret);
  286. return ret;
  287. }
  288. return 0;
  289. }
  290. static int tps65910_sleepinit(struct tps65910 *tps65910,
  291. struct tps65910_board *pmic_pdata)
  292. {
  293. struct device *dev = NULL;
  294. int ret = 0;
  295. dev = tps65910->dev;
  296. if (!pmic_pdata->en_dev_slp)
  297. return 0;
  298. /* enabling SLEEP device state */
  299. ret = tps65910_reg_set_bits(tps65910, TPS65910_DEVCTRL,
  300. DEVCTRL_DEV_SLP_MASK);
  301. if (ret < 0) {
  302. dev_err(dev, "set dev_slp failed: %d\n", ret);
  303. goto err_sleep_init;
  304. }
  305. /* Return if there is no sleep keepon data. */
  306. if (!pmic_pdata->slp_keepon)
  307. return 0;
  308. if (pmic_pdata->slp_keepon->therm_keepon) {
  309. ret = tps65910_reg_set_bits(tps65910,
  310. TPS65910_SLEEP_KEEP_RES_ON,
  311. SLEEP_KEEP_RES_ON_THERM_KEEPON_MASK);
  312. if (ret < 0) {
  313. dev_err(dev, "set therm_keepon failed: %d\n", ret);
  314. goto disable_dev_slp;
  315. }
  316. }
  317. if (pmic_pdata->slp_keepon->clkout32k_keepon) {
  318. ret = tps65910_reg_set_bits(tps65910,
  319. TPS65910_SLEEP_KEEP_RES_ON,
  320. SLEEP_KEEP_RES_ON_CLKOUT32K_KEEPON_MASK);
  321. if (ret < 0) {
  322. dev_err(dev, "set clkout32k_keepon failed: %d\n", ret);
  323. goto disable_dev_slp;
  324. }
  325. }
  326. if (pmic_pdata->slp_keepon->i2chs_keepon) {
  327. ret = tps65910_reg_set_bits(tps65910,
  328. TPS65910_SLEEP_KEEP_RES_ON,
  329. SLEEP_KEEP_RES_ON_I2CHS_KEEPON_MASK);
  330. if (ret < 0) {
  331. dev_err(dev, "set i2chs_keepon failed: %d\n", ret);
  332. goto disable_dev_slp;
  333. }
  334. }
  335. return 0;
  336. disable_dev_slp:
  337. tps65910_reg_clear_bits(tps65910, TPS65910_DEVCTRL,
  338. DEVCTRL_DEV_SLP_MASK);
  339. err_sleep_init:
  340. return ret;
  341. }
  342. #ifdef CONFIG_OF
  343. static struct of_device_id tps65910_of_match[] = {
  344. { .compatible = "ti,tps65910", .data = (void *)TPS65910},
  345. { .compatible = "ti,tps65911", .data = (void *)TPS65911},
  346. { },
  347. };
  348. MODULE_DEVICE_TABLE(of, tps65910_of_match);
  349. static struct tps65910_board *tps65910_parse_dt(struct i2c_client *client,
  350. int *chip_id)
  351. {
  352. struct device_node *np = client->dev.of_node;
  353. struct tps65910_board *board_info;
  354. unsigned int prop;
  355. const struct of_device_id *match;
  356. int ret = 0;
  357. match = of_match_device(tps65910_of_match, &client->dev);
  358. if (!match) {
  359. dev_err(&client->dev, "Failed to find matching dt id\n");
  360. return NULL;
  361. }
  362. *chip_id = (int)match->data;
  363. board_info = devm_kzalloc(&client->dev, sizeof(*board_info),
  364. GFP_KERNEL);
  365. if (!board_info) {
  366. dev_err(&client->dev, "Failed to allocate pdata\n");
  367. return NULL;
  368. }
  369. ret = of_property_read_u32(np, "ti,vmbch-threshold", &prop);
  370. if (!ret)
  371. board_info->vmbch_threshold = prop;
  372. else if (*chip_id == TPS65911)
  373. dev_warn(&client->dev, "VMBCH-Threshold not specified");
  374. ret = of_property_read_u32(np, "ti,vmbch2-threshold", &prop);
  375. if (!ret)
  376. board_info->vmbch2_threshold = prop;
  377. else if (*chip_id == TPS65911)
  378. dev_warn(&client->dev, "VMBCH2-Threshold not specified");
  379. prop = of_property_read_bool(np, "ti,en-ck32k-xtal");
  380. board_info->en_ck32k_xtal = prop;
  381. board_info->irq = client->irq;
  382. board_info->irq_base = -1;
  383. board_info->pm_off = of_property_read_bool(np,
  384. "ti,system-power-controller");
  385. return board_info;
  386. }
  387. #else
  388. static inline
  389. struct tps65910_board *tps65910_parse_dt(struct i2c_client *client,
  390. int *chip_id)
  391. {
  392. return NULL;
  393. }
  394. #endif
  395. static struct i2c_client *tps65910_i2c_client;
  396. static void tps65910_power_off(void)
  397. {
  398. struct tps65910 *tps65910;
  399. tps65910 = dev_get_drvdata(&tps65910_i2c_client->dev);
  400. if (tps65910_reg_set_bits(tps65910, TPS65910_DEVCTRL,
  401. DEVCTRL_PWR_OFF_MASK) < 0)
  402. return;
  403. tps65910_reg_clear_bits(tps65910, TPS65910_DEVCTRL,
  404. DEVCTRL_DEV_ON_MASK);
  405. }
  406. static int tps65910_i2c_probe(struct i2c_client *i2c,
  407. const struct i2c_device_id *id)
  408. {
  409. struct tps65910 *tps65910;
  410. struct tps65910_board *pmic_plat_data;
  411. struct tps65910_board *of_pmic_plat_data = NULL;
  412. struct tps65910_platform_data *init_data;
  413. int ret = 0;
  414. int chip_id = id->driver_data;
  415. pmic_plat_data = dev_get_platdata(&i2c->dev);
  416. if (!pmic_plat_data && i2c->dev.of_node) {
  417. pmic_plat_data = tps65910_parse_dt(i2c, &chip_id);
  418. of_pmic_plat_data = pmic_plat_data;
  419. }
  420. if (!pmic_plat_data)
  421. return -EINVAL;
  422. init_data = devm_kzalloc(&i2c->dev, sizeof(*init_data), GFP_KERNEL);
  423. if (init_data == NULL)
  424. return -ENOMEM;
  425. tps65910 = devm_kzalloc(&i2c->dev, sizeof(*tps65910), GFP_KERNEL);
  426. if (tps65910 == NULL)
  427. return -ENOMEM;
  428. tps65910->of_plat_data = of_pmic_plat_data;
  429. i2c_set_clientdata(i2c, tps65910);
  430. tps65910->dev = &i2c->dev;
  431. tps65910->i2c_client = i2c;
  432. tps65910->id = chip_id;
  433. tps65910->regmap = devm_regmap_init_i2c(i2c, &tps65910_regmap_config);
  434. if (IS_ERR(tps65910->regmap)) {
  435. ret = PTR_ERR(tps65910->regmap);
  436. dev_err(&i2c->dev, "regmap initialization failed: %d\n", ret);
  437. return ret;
  438. }
  439. init_data->irq = pmic_plat_data->irq;
  440. init_data->irq_base = pmic_plat_data->irq_base;
  441. tps65910_irq_init(tps65910, init_data->irq, init_data);
  442. tps65910_ck32k_init(tps65910, pmic_plat_data);
  443. tps65910_sleepinit(tps65910, pmic_plat_data);
  444. if (pmic_plat_data->pm_off && !pm_power_off) {
  445. tps65910_i2c_client = i2c;
  446. pm_power_off = tps65910_power_off;
  447. }
  448. ret = mfd_add_devices(tps65910->dev, -1,
  449. tps65910s, ARRAY_SIZE(tps65910s),
  450. NULL, 0,
  451. regmap_irq_get_domain(tps65910->irq_data));
  452. if (ret < 0) {
  453. dev_err(&i2c->dev, "mfd_add_devices failed: %d\n", ret);
  454. return ret;
  455. }
  456. return ret;
  457. }
  458. static int tps65910_i2c_remove(struct i2c_client *i2c)
  459. {
  460. struct tps65910 *tps65910 = i2c_get_clientdata(i2c);
  461. tps65910_irq_exit(tps65910);
  462. mfd_remove_devices(tps65910->dev);
  463. return 0;
  464. }
  465. static const struct i2c_device_id tps65910_i2c_id[] = {
  466. { "tps65910", TPS65910 },
  467. { "tps65911", TPS65911 },
  468. { }
  469. };
  470. MODULE_DEVICE_TABLE(i2c, tps65910_i2c_id);
  471. static struct i2c_driver tps65910_i2c_driver = {
  472. .driver = {
  473. .name = "tps65910",
  474. .owner = THIS_MODULE,
  475. .of_match_table = of_match_ptr(tps65910_of_match),
  476. },
  477. .probe = tps65910_i2c_probe,
  478. .remove = tps65910_i2c_remove,
  479. .id_table = tps65910_i2c_id,
  480. };
  481. static int __init tps65910_i2c_init(void)
  482. {
  483. return i2c_add_driver(&tps65910_i2c_driver);
  484. }
  485. /* init early so consumer devices can complete system boot */
  486. subsys_initcall(tps65910_i2c_init);
  487. static void __exit tps65910_i2c_exit(void)
  488. {
  489. i2c_del_driver(&tps65910_i2c_driver);
  490. }
  491. module_exit(tps65910_i2c_exit);
  492. MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
  493. MODULE_AUTHOR("Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>");
  494. MODULE_DESCRIPTION("TPS6591x chip family multi-function driver");
  495. MODULE_LICENSE("GPL");