ti_am335x_tscadc.c 6.8 KB

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  1. /*
  2. * TI Touch Screen / ADC MFD driver
  3. *
  4. * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License as
  8. * published by the Free Software Foundation version 2.
  9. *
  10. * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  11. * kind, whether express or implied; without even the implied warranty
  12. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. */
  15. #include <linux/module.h>
  16. #include <linux/init.h>
  17. #include <linux/slab.h>
  18. #include <linux/err.h>
  19. #include <linux/io.h>
  20. #include <linux/clk.h>
  21. #include <linux/regmap.h>
  22. #include <linux/mfd/core.h>
  23. #include <linux/pm_runtime.h>
  24. #include <linux/mfd/ti_am335x_tscadc.h>
  25. #include <linux/input/ti_am335x_tsc.h>
  26. #include <linux/platform_data/ti_am335x_adc.h>
  27. static unsigned int tscadc_readl(struct ti_tscadc_dev *tsadc, unsigned int reg)
  28. {
  29. unsigned int val;
  30. regmap_read(tsadc->regmap_tscadc, reg, &val);
  31. return val;
  32. }
  33. static void tscadc_writel(struct ti_tscadc_dev *tsadc, unsigned int reg,
  34. unsigned int val)
  35. {
  36. regmap_write(tsadc->regmap_tscadc, reg, val);
  37. }
  38. static const struct regmap_config tscadc_regmap_config = {
  39. .name = "ti_tscadc",
  40. .reg_bits = 32,
  41. .reg_stride = 4,
  42. .val_bits = 32,
  43. };
  44. static void tscadc_idle_config(struct ti_tscadc_dev *config)
  45. {
  46. unsigned int idleconfig;
  47. idleconfig = STEPCONFIG_YNN | STEPCONFIG_INM_ADCREFM |
  48. STEPCONFIG_INP_ADCREFM | STEPCONFIG_YPN;
  49. tscadc_writel(config, REG_IDLECONFIG, idleconfig);
  50. }
  51. static int ti_tscadc_probe(struct platform_device *pdev)
  52. {
  53. struct ti_tscadc_dev *tscadc;
  54. struct resource *res;
  55. struct clk *clk;
  56. struct mfd_tscadc_board *pdata = pdev->dev.platform_data;
  57. struct mfd_cell *cell;
  58. int err, ctrl;
  59. int clk_value, clock_rate;
  60. int tsc_wires, adc_channels = 0, total_channels;
  61. if (!pdata) {
  62. dev_err(&pdev->dev, "Could not find platform data\n");
  63. return -EINVAL;
  64. }
  65. if (pdata->adc_init)
  66. adc_channels = pdata->adc_init->adc_channels;
  67. tsc_wires = pdata->tsc_init->wires;
  68. total_channels = tsc_wires + adc_channels;
  69. if (total_channels > 8) {
  70. dev_err(&pdev->dev, "Number of i/p channels more than 8\n");
  71. return -EINVAL;
  72. }
  73. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  74. if (!res) {
  75. dev_err(&pdev->dev, "no memory resource defined.\n");
  76. return -EINVAL;
  77. }
  78. /* Allocate memory for device */
  79. tscadc = devm_kzalloc(&pdev->dev,
  80. sizeof(struct ti_tscadc_dev), GFP_KERNEL);
  81. if (!tscadc) {
  82. dev_err(&pdev->dev, "failed to allocate memory.\n");
  83. return -ENOMEM;
  84. }
  85. tscadc->dev = &pdev->dev;
  86. err = platform_get_irq(pdev, 0);
  87. if (err < 0) {
  88. dev_err(&pdev->dev, "no irq ID is specified.\n");
  89. goto ret;
  90. } else
  91. tscadc->irq = err;
  92. res = devm_request_mem_region(&pdev->dev,
  93. res->start, resource_size(res), pdev->name);
  94. if (!res) {
  95. dev_err(&pdev->dev, "failed to reserve registers.\n");
  96. return -EBUSY;
  97. }
  98. tscadc->tscadc_base = devm_ioremap(&pdev->dev,
  99. res->start, resource_size(res));
  100. if (!tscadc->tscadc_base) {
  101. dev_err(&pdev->dev, "failed to map registers.\n");
  102. return -ENOMEM;
  103. }
  104. tscadc->regmap_tscadc = devm_regmap_init_mmio(&pdev->dev,
  105. tscadc->tscadc_base, &tscadc_regmap_config);
  106. if (IS_ERR(tscadc->regmap_tscadc)) {
  107. dev_err(&pdev->dev, "regmap init failed\n");
  108. err = PTR_ERR(tscadc->regmap_tscadc);
  109. goto ret;
  110. }
  111. pm_runtime_enable(&pdev->dev);
  112. pm_runtime_get_sync(&pdev->dev);
  113. /*
  114. * The TSC_ADC_Subsystem has 2 clock domains
  115. * OCP_CLK and ADC_CLK.
  116. * The ADC clock is expected to run at target of 3MHz,
  117. * and expected to capture 12-bit data at a rate of 200 KSPS.
  118. * The TSC_ADC_SS controller design assumes the OCP clock is
  119. * at least 6x faster than the ADC clock.
  120. */
  121. clk = clk_get(&pdev->dev, "adc_tsc_fck");
  122. if (IS_ERR(clk)) {
  123. dev_err(&pdev->dev, "failed to get TSC fck\n");
  124. err = PTR_ERR(clk);
  125. goto err_disable_clk;
  126. }
  127. clock_rate = clk_get_rate(clk);
  128. clk_put(clk);
  129. clk_value = clock_rate / ADC_CLK;
  130. if (clk_value < MAX_CLK_DIV) {
  131. dev_err(&pdev->dev, "clock input less than min clock requirement\n");
  132. err = -EINVAL;
  133. goto err_disable_clk;
  134. }
  135. /* TSCADC_CLKDIV needs to be configured to the value minus 1 */
  136. clk_value = clk_value - 1;
  137. tscadc_writel(tscadc, REG_CLKDIV, clk_value);
  138. /* Set the control register bits */
  139. ctrl = CNTRLREG_STEPCONFIGWRT |
  140. CNTRLREG_TSCENB |
  141. CNTRLREG_STEPID |
  142. CNTRLREG_4WIRE;
  143. tscadc_writel(tscadc, REG_CTRL, ctrl);
  144. /* Set register bits for Idle Config Mode */
  145. tscadc_idle_config(tscadc);
  146. /* Enable the TSC module enable bit */
  147. ctrl = tscadc_readl(tscadc, REG_CTRL);
  148. ctrl |= CNTRLREG_TSCSSENB;
  149. tscadc_writel(tscadc, REG_CTRL, ctrl);
  150. /* TSC Cell */
  151. cell = &tscadc->cells[TSC_CELL];
  152. cell->name = "tsc";
  153. cell->platform_data = tscadc;
  154. cell->pdata_size = sizeof(*tscadc);
  155. /* ADC Cell */
  156. cell = &tscadc->cells[ADC_CELL];
  157. cell->name = "tiadc";
  158. cell->platform_data = tscadc;
  159. cell->pdata_size = sizeof(*tscadc);
  160. err = mfd_add_devices(&pdev->dev, pdev->id, tscadc->cells,
  161. TSCADC_CELLS, NULL, 0, NULL);
  162. if (err < 0)
  163. goto err_disable_clk;
  164. device_init_wakeup(&pdev->dev, true);
  165. platform_set_drvdata(pdev, tscadc);
  166. return 0;
  167. err_disable_clk:
  168. pm_runtime_put_sync(&pdev->dev);
  169. pm_runtime_disable(&pdev->dev);
  170. ret:
  171. return err;
  172. }
  173. static int ti_tscadc_remove(struct platform_device *pdev)
  174. {
  175. struct ti_tscadc_dev *tscadc = platform_get_drvdata(pdev);
  176. tscadc_writel(tscadc, REG_SE, 0x00);
  177. pm_runtime_put_sync(&pdev->dev);
  178. pm_runtime_disable(&pdev->dev);
  179. mfd_remove_devices(tscadc->dev);
  180. return 0;
  181. }
  182. #ifdef CONFIG_PM
  183. static int tscadc_suspend(struct device *dev)
  184. {
  185. struct ti_tscadc_dev *tscadc_dev = dev_get_drvdata(dev);
  186. tscadc_writel(tscadc_dev, REG_SE, 0x00);
  187. pm_runtime_put_sync(dev);
  188. return 0;
  189. }
  190. static int tscadc_resume(struct device *dev)
  191. {
  192. struct ti_tscadc_dev *tscadc_dev = dev_get_drvdata(dev);
  193. unsigned int restore, ctrl;
  194. pm_runtime_get_sync(dev);
  195. /* context restore */
  196. ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_TSCENB |
  197. CNTRLREG_STEPID | CNTRLREG_4WIRE;
  198. tscadc_writel(tscadc_dev, REG_CTRL, ctrl);
  199. tscadc_idle_config(tscadc_dev);
  200. tscadc_writel(tscadc_dev, REG_SE, STPENB_STEPENB);
  201. restore = tscadc_readl(tscadc_dev, REG_CTRL);
  202. tscadc_writel(tscadc_dev, REG_CTRL,
  203. (restore | CNTRLREG_TSCSSENB));
  204. return 0;
  205. }
  206. static const struct dev_pm_ops tscadc_pm_ops = {
  207. .suspend = tscadc_suspend,
  208. .resume = tscadc_resume,
  209. };
  210. #define TSCADC_PM_OPS (&tscadc_pm_ops)
  211. #else
  212. #define TSCADC_PM_OPS NULL
  213. #endif
  214. static struct platform_driver ti_tscadc_driver = {
  215. .driver = {
  216. .name = "ti_tscadc",
  217. .owner = THIS_MODULE,
  218. .pm = TSCADC_PM_OPS,
  219. },
  220. .probe = ti_tscadc_probe,
  221. .remove = ti_tscadc_remove,
  222. };
  223. module_platform_driver(ti_tscadc_driver);
  224. MODULE_DESCRIPTION("TI touchscreen / ADC MFD controller driver");
  225. MODULE_AUTHOR("Rachna Patil <rachna@ti.com>");
  226. MODULE_LICENSE("GPL");