ab8500-gpadc.c 20 KB

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  1. /*
  2. * Copyright (C) ST-Ericsson SA 2010
  3. *
  4. * License Terms: GNU General Public License v2
  5. * Author: Arun R Murthy <arun.murthy@stericsson.com>
  6. * Author: Daniel Willerud <daniel.willerud@stericsson.com>
  7. * Author: Johan Palsson <johan.palsson@stericsson.com>
  8. */
  9. #include <linux/init.h>
  10. #include <linux/module.h>
  11. #include <linux/device.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/spinlock.h>
  14. #include <linux/delay.h>
  15. #include <linux/pm_runtime.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/completion.h>
  18. #include <linux/regulator/consumer.h>
  19. #include <linux/err.h>
  20. #include <linux/slab.h>
  21. #include <linux/list.h>
  22. #include <linux/mfd/abx500.h>
  23. #include <linux/mfd/abx500/ab8500.h>
  24. #include <linux/mfd/abx500/ab8500-gpadc.h>
  25. /*
  26. * GPADC register offsets
  27. * Bank : 0x0A
  28. */
  29. #define AB8500_GPADC_CTRL1_REG 0x00
  30. #define AB8500_GPADC_CTRL2_REG 0x01
  31. #define AB8500_GPADC_CTRL3_REG 0x02
  32. #define AB8500_GPADC_AUTO_TIMER_REG 0x03
  33. #define AB8500_GPADC_STAT_REG 0x04
  34. #define AB8500_GPADC_MANDATAL_REG 0x05
  35. #define AB8500_GPADC_MANDATAH_REG 0x06
  36. #define AB8500_GPADC_AUTODATAL_REG 0x07
  37. #define AB8500_GPADC_AUTODATAH_REG 0x08
  38. #define AB8500_GPADC_MUX_CTRL_REG 0x09
  39. /*
  40. * OTP register offsets
  41. * Bank : 0x15
  42. */
  43. #define AB8500_GPADC_CAL_1 0x0F
  44. #define AB8500_GPADC_CAL_2 0x10
  45. #define AB8500_GPADC_CAL_3 0x11
  46. #define AB8500_GPADC_CAL_4 0x12
  47. #define AB8500_GPADC_CAL_5 0x13
  48. #define AB8500_GPADC_CAL_6 0x14
  49. #define AB8500_GPADC_CAL_7 0x15
  50. /* gpadc constants */
  51. #define EN_VINTCORE12 0x04
  52. #define EN_VTVOUT 0x02
  53. #define EN_GPADC 0x01
  54. #define DIS_GPADC 0x00
  55. #define SW_AVG_16 0x60
  56. #define ADC_SW_CONV 0x04
  57. #define EN_ICHAR 0x80
  58. #define BTEMP_PULL_UP 0x08
  59. #define EN_BUF 0x40
  60. #define DIS_ZERO 0x00
  61. #define GPADC_BUSY 0x01
  62. /* GPADC constants from AB8500 spec, UM0836 */
  63. #define ADC_RESOLUTION 1024
  64. #define ADC_CH_BTEMP_MIN 0
  65. #define ADC_CH_BTEMP_MAX 1350
  66. #define ADC_CH_DIETEMP_MIN 0
  67. #define ADC_CH_DIETEMP_MAX 1350
  68. #define ADC_CH_CHG_V_MIN 0
  69. #define ADC_CH_CHG_V_MAX 20030
  70. #define ADC_CH_ACCDET2_MIN 0
  71. #define ADC_CH_ACCDET2_MAX 2500
  72. #define ADC_CH_VBAT_MIN 2300
  73. #define ADC_CH_VBAT_MAX 4800
  74. #define ADC_CH_CHG_I_MIN 0
  75. #define ADC_CH_CHG_I_MAX 1500
  76. #define ADC_CH_BKBAT_MIN 0
  77. #define ADC_CH_BKBAT_MAX 3200
  78. /* This is used to not lose precision when dividing to get gain and offset */
  79. #define CALIB_SCALE 1000
  80. /* Time in ms before disabling regulator */
  81. #define GPADC_AUDOSUSPEND_DELAY 1
  82. #define CONVERSION_TIME 500 /* ms */
  83. enum cal_channels {
  84. ADC_INPUT_VMAIN = 0,
  85. ADC_INPUT_BTEMP,
  86. ADC_INPUT_VBAT,
  87. NBR_CAL_INPUTS,
  88. };
  89. /**
  90. * struct adc_cal_data - Table for storing gain and offset for the calibrated
  91. * ADC channels
  92. * @gain: Gain of the ADC channel
  93. * @offset: Offset of the ADC channel
  94. */
  95. struct adc_cal_data {
  96. u64 gain;
  97. u64 offset;
  98. };
  99. /**
  100. * struct ab8500_gpadc - AB8500 GPADC device information
  101. * @dev: pointer to the struct device
  102. * @node: a list of AB8500 GPADCs, hence prepared for
  103. reentrance
  104. * @parent: pointer to the struct ab8500
  105. * @ab8500_gpadc_complete: pointer to the struct completion, to indicate
  106. * the completion of gpadc conversion
  107. * @ab8500_gpadc_lock: structure of type mutex
  108. * @regu: pointer to the struct regulator
  109. * @irq: interrupt number that is used by gpadc
  110. * @cal_data array of ADC calibration data structs
  111. */
  112. struct ab8500_gpadc {
  113. struct device *dev;
  114. struct list_head node;
  115. struct ab8500 *parent;
  116. struct completion ab8500_gpadc_complete;
  117. struct mutex ab8500_gpadc_lock;
  118. struct regulator *regu;
  119. int irq;
  120. struct adc_cal_data cal_data[NBR_CAL_INPUTS];
  121. };
  122. static LIST_HEAD(ab8500_gpadc_list);
  123. /**
  124. * ab8500_gpadc_get() - returns a reference to the primary AB8500 GPADC
  125. * (i.e. the first GPADC in the instance list)
  126. */
  127. struct ab8500_gpadc *ab8500_gpadc_get(char *name)
  128. {
  129. struct ab8500_gpadc *gpadc;
  130. list_for_each_entry(gpadc, &ab8500_gpadc_list, node) {
  131. if (!strcmp(name, dev_name(gpadc->dev)))
  132. return gpadc;
  133. }
  134. return ERR_PTR(-ENOENT);
  135. }
  136. EXPORT_SYMBOL(ab8500_gpadc_get);
  137. /**
  138. * ab8500_gpadc_ad_to_voltage() - Convert a raw ADC value to a voltage
  139. */
  140. int ab8500_gpadc_ad_to_voltage(struct ab8500_gpadc *gpadc, u8 channel,
  141. int ad_value)
  142. {
  143. int res;
  144. switch (channel) {
  145. case MAIN_CHARGER_V:
  146. /* For some reason we don't have calibrated data */
  147. if (!gpadc->cal_data[ADC_INPUT_VMAIN].gain) {
  148. res = ADC_CH_CHG_V_MIN + (ADC_CH_CHG_V_MAX -
  149. ADC_CH_CHG_V_MIN) * ad_value /
  150. ADC_RESOLUTION;
  151. break;
  152. }
  153. /* Here we can use the calibrated data */
  154. res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_VMAIN].gain +
  155. gpadc->cal_data[ADC_INPUT_VMAIN].offset) / CALIB_SCALE;
  156. break;
  157. case BAT_CTRL:
  158. case BTEMP_BALL:
  159. case ACC_DETECT1:
  160. case ADC_AUX1:
  161. case ADC_AUX2:
  162. /* For some reason we don't have calibrated data */
  163. if (!gpadc->cal_data[ADC_INPUT_BTEMP].gain) {
  164. res = ADC_CH_BTEMP_MIN + (ADC_CH_BTEMP_MAX -
  165. ADC_CH_BTEMP_MIN) * ad_value /
  166. ADC_RESOLUTION;
  167. break;
  168. }
  169. /* Here we can use the calibrated data */
  170. res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_BTEMP].gain +
  171. gpadc->cal_data[ADC_INPUT_BTEMP].offset) / CALIB_SCALE;
  172. break;
  173. case MAIN_BAT_V:
  174. /* For some reason we don't have calibrated data */
  175. if (!gpadc->cal_data[ADC_INPUT_VBAT].gain) {
  176. res = ADC_CH_VBAT_MIN + (ADC_CH_VBAT_MAX -
  177. ADC_CH_VBAT_MIN) * ad_value /
  178. ADC_RESOLUTION;
  179. break;
  180. }
  181. /* Here we can use the calibrated data */
  182. res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_VBAT].gain +
  183. gpadc->cal_data[ADC_INPUT_VBAT].offset) / CALIB_SCALE;
  184. break;
  185. case DIE_TEMP:
  186. res = ADC_CH_DIETEMP_MIN +
  187. (ADC_CH_DIETEMP_MAX - ADC_CH_DIETEMP_MIN) * ad_value /
  188. ADC_RESOLUTION;
  189. break;
  190. case ACC_DETECT2:
  191. res = ADC_CH_ACCDET2_MIN +
  192. (ADC_CH_ACCDET2_MAX - ADC_CH_ACCDET2_MIN) * ad_value /
  193. ADC_RESOLUTION;
  194. break;
  195. case VBUS_V:
  196. res = ADC_CH_CHG_V_MIN +
  197. (ADC_CH_CHG_V_MAX - ADC_CH_CHG_V_MIN) * ad_value /
  198. ADC_RESOLUTION;
  199. break;
  200. case MAIN_CHARGER_C:
  201. case USB_CHARGER_C:
  202. res = ADC_CH_CHG_I_MIN +
  203. (ADC_CH_CHG_I_MAX - ADC_CH_CHG_I_MIN) * ad_value /
  204. ADC_RESOLUTION;
  205. break;
  206. case BK_BAT_V:
  207. res = ADC_CH_BKBAT_MIN +
  208. (ADC_CH_BKBAT_MAX - ADC_CH_BKBAT_MIN) * ad_value /
  209. ADC_RESOLUTION;
  210. break;
  211. default:
  212. dev_err(gpadc->dev,
  213. "unknown channel, not possible to convert\n");
  214. res = -EINVAL;
  215. break;
  216. }
  217. return res;
  218. }
  219. EXPORT_SYMBOL(ab8500_gpadc_ad_to_voltage);
  220. /**
  221. * ab8500_gpadc_convert() - gpadc conversion
  222. * @channel: analog channel to be converted to digital data
  223. *
  224. * This function converts the selected analog i/p to digital
  225. * data.
  226. */
  227. int ab8500_gpadc_convert(struct ab8500_gpadc *gpadc, u8 channel)
  228. {
  229. int ad_value;
  230. int voltage;
  231. ad_value = ab8500_gpadc_read_raw(gpadc, channel);
  232. if (ad_value < 0) {
  233. dev_err(gpadc->dev, "GPADC raw value failed ch: %d\n", channel);
  234. return ad_value;
  235. }
  236. voltage = ab8500_gpadc_ad_to_voltage(gpadc, channel, ad_value);
  237. if (voltage < 0)
  238. dev_err(gpadc->dev, "GPADC to voltage conversion failed ch:"
  239. " %d AD: 0x%x\n", channel, ad_value);
  240. return voltage;
  241. }
  242. EXPORT_SYMBOL(ab8500_gpadc_convert);
  243. /**
  244. * ab8500_gpadc_read_raw() - gpadc read
  245. * @channel: analog channel to be read
  246. *
  247. * This function obtains the raw ADC value, this then needs
  248. * to be converted by calling ab8500_gpadc_ad_to_voltage()
  249. */
  250. int ab8500_gpadc_read_raw(struct ab8500_gpadc *gpadc, u8 channel)
  251. {
  252. int ret;
  253. int looplimit = 0;
  254. u8 val, low_data, high_data;
  255. if (!gpadc)
  256. return -ENODEV;
  257. mutex_lock(&gpadc->ab8500_gpadc_lock);
  258. /* Enable VTVout LDO this is required for GPADC */
  259. pm_runtime_get_sync(gpadc->dev);
  260. /* Check if ADC is not busy, lock and proceed */
  261. do {
  262. ret = abx500_get_register_interruptible(gpadc->dev,
  263. AB8500_GPADC, AB8500_GPADC_STAT_REG, &val);
  264. if (ret < 0)
  265. goto out;
  266. if (!(val & GPADC_BUSY))
  267. break;
  268. msleep(10);
  269. } while (++looplimit < 10);
  270. if (looplimit >= 10 && (val & GPADC_BUSY)) {
  271. dev_err(gpadc->dev, "gpadc_conversion: GPADC busy");
  272. ret = -EINVAL;
  273. goto out;
  274. }
  275. /* Enable GPADC */
  276. ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
  277. AB8500_GPADC, AB8500_GPADC_CTRL1_REG, EN_GPADC, EN_GPADC);
  278. if (ret < 0) {
  279. dev_err(gpadc->dev, "gpadc_conversion: enable gpadc failed\n");
  280. goto out;
  281. }
  282. /* Select the channel source and set average samples to 16 */
  283. ret = abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
  284. AB8500_GPADC_CTRL2_REG, (channel | SW_AVG_16));
  285. if (ret < 0) {
  286. dev_err(gpadc->dev,
  287. "gpadc_conversion: set avg samples failed\n");
  288. goto out;
  289. }
  290. /*
  291. * Enable ADC, buffering, select rising edge and enable ADC path
  292. * charging current sense if it needed, ABB 3.0 needs some special
  293. * treatment too.
  294. */
  295. switch (channel) {
  296. case MAIN_CHARGER_C:
  297. case USB_CHARGER_C:
  298. ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
  299. AB8500_GPADC, AB8500_GPADC_CTRL1_REG,
  300. EN_BUF | EN_ICHAR,
  301. EN_BUF | EN_ICHAR);
  302. break;
  303. case BTEMP_BALL:
  304. if (!is_ab8500_2p0_or_earlier(gpadc->parent)) {
  305. /* Turn on btemp pull-up on ABB 3.0 */
  306. ret = abx500_mask_and_set_register_interruptible(
  307. gpadc->dev,
  308. AB8500_GPADC, AB8500_GPADC_CTRL1_REG,
  309. EN_BUF | BTEMP_PULL_UP,
  310. EN_BUF | BTEMP_PULL_UP);
  311. /*
  312. * Delay might be needed for ABB8500 cut 3.0, if not, remove
  313. * when hardware will be available
  314. */
  315. usleep_range(1000, 1000);
  316. break;
  317. }
  318. /* Intentional fallthrough */
  319. default:
  320. ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
  321. AB8500_GPADC, AB8500_GPADC_CTRL1_REG, EN_BUF, EN_BUF);
  322. break;
  323. }
  324. if (ret < 0) {
  325. dev_err(gpadc->dev,
  326. "gpadc_conversion: select falling edge failed\n");
  327. goto out;
  328. }
  329. ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
  330. AB8500_GPADC, AB8500_GPADC_CTRL1_REG, ADC_SW_CONV, ADC_SW_CONV);
  331. if (ret < 0) {
  332. dev_err(gpadc->dev,
  333. "gpadc_conversion: start s/w conversion failed\n");
  334. goto out;
  335. }
  336. /* wait for completion of conversion */
  337. if (!wait_for_completion_timeout(&gpadc->ab8500_gpadc_complete,
  338. msecs_to_jiffies(CONVERSION_TIME))) {
  339. dev_err(gpadc->dev,
  340. "timeout: didn't receive GPADC conversion interrupt\n");
  341. ret = -EINVAL;
  342. goto out;
  343. }
  344. /* Read the converted RAW data */
  345. ret = abx500_get_register_interruptible(gpadc->dev, AB8500_GPADC,
  346. AB8500_GPADC_MANDATAL_REG, &low_data);
  347. if (ret < 0) {
  348. dev_err(gpadc->dev, "gpadc_conversion: read low data failed\n");
  349. goto out;
  350. }
  351. ret = abx500_get_register_interruptible(gpadc->dev, AB8500_GPADC,
  352. AB8500_GPADC_MANDATAH_REG, &high_data);
  353. if (ret < 0) {
  354. dev_err(gpadc->dev,
  355. "gpadc_conversion: read high data failed\n");
  356. goto out;
  357. }
  358. /* Disable GPADC */
  359. ret = abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
  360. AB8500_GPADC_CTRL1_REG, DIS_GPADC);
  361. if (ret < 0) {
  362. dev_err(gpadc->dev, "gpadc_conversion: disable gpadc failed\n");
  363. goto out;
  364. }
  365. pm_runtime_mark_last_busy(gpadc->dev);
  366. pm_runtime_put_autosuspend(gpadc->dev);
  367. mutex_unlock(&gpadc->ab8500_gpadc_lock);
  368. return (high_data << 8) | low_data;
  369. out:
  370. /*
  371. * It has shown to be needed to turn off the GPADC if an error occurs,
  372. * otherwise we might have problem when waiting for the busy bit in the
  373. * GPADC status register to go low. In V1.1 there wait_for_completion
  374. * seems to timeout when waiting for an interrupt.. Not seen in V2.0
  375. */
  376. (void) abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
  377. AB8500_GPADC_CTRL1_REG, DIS_GPADC);
  378. pm_runtime_put(gpadc->dev);
  379. mutex_unlock(&gpadc->ab8500_gpadc_lock);
  380. dev_err(gpadc->dev,
  381. "gpadc_conversion: Failed to AD convert channel %d\n", channel);
  382. return ret;
  383. }
  384. EXPORT_SYMBOL(ab8500_gpadc_read_raw);
  385. /**
  386. * ab8500_bm_gpswadcconvend_handler() - isr for s/w gpadc conversion completion
  387. * @irq: irq number
  388. * @data: pointer to the data passed during request irq
  389. *
  390. * This is a interrupt service routine for s/w gpadc conversion completion.
  391. * Notifies the gpadc completion is completed and the converted raw value
  392. * can be read from the registers.
  393. * Returns IRQ status(IRQ_HANDLED)
  394. */
  395. static irqreturn_t ab8500_bm_gpswadcconvend_handler(int irq, void *_gpadc)
  396. {
  397. struct ab8500_gpadc *gpadc = _gpadc;
  398. complete(&gpadc->ab8500_gpadc_complete);
  399. return IRQ_HANDLED;
  400. }
  401. static int otp_cal_regs[] = {
  402. AB8500_GPADC_CAL_1,
  403. AB8500_GPADC_CAL_2,
  404. AB8500_GPADC_CAL_3,
  405. AB8500_GPADC_CAL_4,
  406. AB8500_GPADC_CAL_5,
  407. AB8500_GPADC_CAL_6,
  408. AB8500_GPADC_CAL_7,
  409. };
  410. static void ab8500_gpadc_read_calibration_data(struct ab8500_gpadc *gpadc)
  411. {
  412. int i;
  413. int ret[ARRAY_SIZE(otp_cal_regs)];
  414. u8 gpadc_cal[ARRAY_SIZE(otp_cal_regs)];
  415. int vmain_high, vmain_low;
  416. int btemp_high, btemp_low;
  417. int vbat_high, vbat_low;
  418. /* First we read all OTP registers and store the error code */
  419. for (i = 0; i < ARRAY_SIZE(otp_cal_regs); i++) {
  420. ret[i] = abx500_get_register_interruptible(gpadc->dev,
  421. AB8500_OTP_EMUL, otp_cal_regs[i], &gpadc_cal[i]);
  422. if (ret[i] < 0)
  423. dev_err(gpadc->dev, "%s: read otp reg 0x%02x failed\n",
  424. __func__, otp_cal_regs[i]);
  425. }
  426. /*
  427. * The ADC calibration data is stored in OTP registers.
  428. * The layout of the calibration data is outlined below and a more
  429. * detailed description can be found in UM0836
  430. *
  431. * vm_h/l = vmain_high/low
  432. * bt_h/l = btemp_high/low
  433. * vb_h/l = vbat_high/low
  434. *
  435. * Data bits:
  436. * | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
  437. * |.......|.......|.......|.......|.......|.......|.......|.......
  438. * | | vm_h9 | vm_h8
  439. * |.......|.......|.......|.......|.......|.......|.......|.......
  440. * | | vm_h7 | vm_h6 | vm_h5 | vm_h4 | vm_h3 | vm_h2
  441. * |.......|.......|.......|.......|.......|.......|.......|.......
  442. * | vm_h1 | vm_h0 | vm_l4 | vm_l3 | vm_l2 | vm_l1 | vm_l0 | bt_h9
  443. * |.......|.......|.......|.......|.......|.......|.......|.......
  444. * | bt_h8 | bt_h7 | bt_h6 | bt_h5 | bt_h4 | bt_h3 | bt_h2 | bt_h1
  445. * |.......|.......|.......|.......|.......|.......|.......|.......
  446. * | bt_h0 | bt_l4 | bt_l3 | bt_l2 | bt_l1 | bt_l0 | vb_h9 | vb_h8
  447. * |.......|.......|.......|.......|.......|.......|.......|.......
  448. * | vb_h7 | vb_h6 | vb_h5 | vb_h4 | vb_h3 | vb_h2 | vb_h1 | vb_h0
  449. * |.......|.......|.......|.......|.......|.......|.......|.......
  450. * | vb_l5 | vb_l4 | vb_l3 | vb_l2 | vb_l1 | vb_l0 |
  451. * |.......|.......|.......|.......|.......|.......|.......|.......
  452. *
  453. *
  454. * Ideal output ADC codes corresponding to injected input voltages
  455. * during manufacturing is:
  456. *
  457. * vmain_high: Vin = 19500mV / ADC ideal code = 997
  458. * vmain_low: Vin = 315mV / ADC ideal code = 16
  459. * btemp_high: Vin = 1300mV / ADC ideal code = 985
  460. * btemp_low: Vin = 21mV / ADC ideal code = 16
  461. * vbat_high: Vin = 4700mV / ADC ideal code = 982
  462. * vbat_low: Vin = 2380mV / ADC ideal code = 33
  463. */
  464. /* Calculate gain and offset for VMAIN if all reads succeeded */
  465. if (!(ret[0] < 0 || ret[1] < 0 || ret[2] < 0)) {
  466. vmain_high = (((gpadc_cal[0] & 0x03) << 8) |
  467. ((gpadc_cal[1] & 0x3F) << 2) |
  468. ((gpadc_cal[2] & 0xC0) >> 6));
  469. vmain_low = ((gpadc_cal[2] & 0x3E) >> 1);
  470. gpadc->cal_data[ADC_INPUT_VMAIN].gain = CALIB_SCALE *
  471. (19500 - 315) / (vmain_high - vmain_low);
  472. gpadc->cal_data[ADC_INPUT_VMAIN].offset = CALIB_SCALE * 19500 -
  473. (CALIB_SCALE * (19500 - 315) /
  474. (vmain_high - vmain_low)) * vmain_high;
  475. } else {
  476. gpadc->cal_data[ADC_INPUT_VMAIN].gain = 0;
  477. }
  478. /* Calculate gain and offset for BTEMP if all reads succeeded */
  479. if (!(ret[2] < 0 || ret[3] < 0 || ret[4] < 0)) {
  480. btemp_high = (((gpadc_cal[2] & 0x01) << 9) |
  481. (gpadc_cal[3] << 1) |
  482. ((gpadc_cal[4] & 0x80) >> 7));
  483. btemp_low = ((gpadc_cal[4] & 0x7C) >> 2);
  484. gpadc->cal_data[ADC_INPUT_BTEMP].gain =
  485. CALIB_SCALE * (1300 - 21) / (btemp_high - btemp_low);
  486. gpadc->cal_data[ADC_INPUT_BTEMP].offset = CALIB_SCALE * 1300 -
  487. (CALIB_SCALE * (1300 - 21) /
  488. (btemp_high - btemp_low)) * btemp_high;
  489. } else {
  490. gpadc->cal_data[ADC_INPUT_BTEMP].gain = 0;
  491. }
  492. /* Calculate gain and offset for VBAT if all reads succeeded */
  493. if (!(ret[4] < 0 || ret[5] < 0 || ret[6] < 0)) {
  494. vbat_high = (((gpadc_cal[4] & 0x03) << 8) | gpadc_cal[5]);
  495. vbat_low = ((gpadc_cal[6] & 0xFC) >> 2);
  496. gpadc->cal_data[ADC_INPUT_VBAT].gain = CALIB_SCALE *
  497. (4700 - 2380) / (vbat_high - vbat_low);
  498. gpadc->cal_data[ADC_INPUT_VBAT].offset = CALIB_SCALE * 4700 -
  499. (CALIB_SCALE * (4700 - 2380) /
  500. (vbat_high - vbat_low)) * vbat_high;
  501. } else {
  502. gpadc->cal_data[ADC_INPUT_VBAT].gain = 0;
  503. }
  504. dev_dbg(gpadc->dev, "VMAIN gain %llu offset %llu\n",
  505. gpadc->cal_data[ADC_INPUT_VMAIN].gain,
  506. gpadc->cal_data[ADC_INPUT_VMAIN].offset);
  507. dev_dbg(gpadc->dev, "BTEMP gain %llu offset %llu\n",
  508. gpadc->cal_data[ADC_INPUT_BTEMP].gain,
  509. gpadc->cal_data[ADC_INPUT_BTEMP].offset);
  510. dev_dbg(gpadc->dev, "VBAT gain %llu offset %llu\n",
  511. gpadc->cal_data[ADC_INPUT_VBAT].gain,
  512. gpadc->cal_data[ADC_INPUT_VBAT].offset);
  513. }
  514. static int ab8500_gpadc_runtime_suspend(struct device *dev)
  515. {
  516. struct ab8500_gpadc *gpadc = dev_get_drvdata(dev);
  517. regulator_disable(gpadc->regu);
  518. return 0;
  519. }
  520. static int ab8500_gpadc_runtime_resume(struct device *dev)
  521. {
  522. struct ab8500_gpadc *gpadc = dev_get_drvdata(dev);
  523. regulator_enable(gpadc->regu);
  524. return 0;
  525. }
  526. static int ab8500_gpadc_runtime_idle(struct device *dev)
  527. {
  528. pm_runtime_suspend(dev);
  529. return 0;
  530. }
  531. static int ab8500_gpadc_probe(struct platform_device *pdev)
  532. {
  533. int ret = 0;
  534. struct ab8500_gpadc *gpadc;
  535. gpadc = kzalloc(sizeof(struct ab8500_gpadc), GFP_KERNEL);
  536. if (!gpadc) {
  537. dev_err(&pdev->dev, "Error: No memory\n");
  538. return -ENOMEM;
  539. }
  540. gpadc->irq = platform_get_irq_byname(pdev, "SW_CONV_END");
  541. if (gpadc->irq < 0) {
  542. dev_err(&pdev->dev, "failed to get platform irq-%d\n",
  543. gpadc->irq);
  544. ret = gpadc->irq;
  545. goto fail;
  546. }
  547. gpadc->dev = &pdev->dev;
  548. gpadc->parent = dev_get_drvdata(pdev->dev.parent);
  549. mutex_init(&gpadc->ab8500_gpadc_lock);
  550. /* Initialize completion used to notify completion of conversion */
  551. init_completion(&gpadc->ab8500_gpadc_complete);
  552. /* Register interrupt - SwAdcComplete */
  553. ret = request_threaded_irq(gpadc->irq, NULL,
  554. ab8500_bm_gpswadcconvend_handler,
  555. IRQF_ONESHOT | IRQF_NO_SUSPEND | IRQF_SHARED,
  556. "ab8500-gpadc", gpadc);
  557. if (ret < 0) {
  558. dev_err(gpadc->dev, "Failed to register interrupt, irq: %d\n",
  559. gpadc->irq);
  560. goto fail;
  561. }
  562. /* VTVout LDO used to power up ab8500-GPADC */
  563. gpadc->regu = regulator_get(&pdev->dev, "vddadc");
  564. if (IS_ERR(gpadc->regu)) {
  565. ret = PTR_ERR(gpadc->regu);
  566. dev_err(gpadc->dev, "failed to get vtvout LDO\n");
  567. goto fail_irq;
  568. }
  569. platform_set_drvdata(pdev, gpadc);
  570. regulator_enable(gpadc->regu);
  571. pm_runtime_set_autosuspend_delay(gpadc->dev, GPADC_AUDOSUSPEND_DELAY);
  572. pm_runtime_use_autosuspend(gpadc->dev);
  573. pm_runtime_set_active(gpadc->dev);
  574. pm_runtime_enable(gpadc->dev);
  575. ab8500_gpadc_read_calibration_data(gpadc);
  576. list_add_tail(&gpadc->node, &ab8500_gpadc_list);
  577. dev_dbg(gpadc->dev, "probe success\n");
  578. return 0;
  579. fail_irq:
  580. free_irq(gpadc->irq, gpadc);
  581. fail:
  582. kfree(gpadc);
  583. gpadc = NULL;
  584. return ret;
  585. }
  586. static int ab8500_gpadc_remove(struct platform_device *pdev)
  587. {
  588. struct ab8500_gpadc *gpadc = platform_get_drvdata(pdev);
  589. /* remove this gpadc entry from the list */
  590. list_del(&gpadc->node);
  591. /* remove interrupt - completion of Sw ADC conversion */
  592. free_irq(gpadc->irq, gpadc);
  593. pm_runtime_get_sync(gpadc->dev);
  594. pm_runtime_disable(gpadc->dev);
  595. regulator_disable(gpadc->regu);
  596. pm_runtime_set_suspended(gpadc->dev);
  597. pm_runtime_put_noidle(gpadc->dev);
  598. kfree(gpadc);
  599. gpadc = NULL;
  600. return 0;
  601. }
  602. static const struct dev_pm_ops ab8500_gpadc_pm_ops = {
  603. SET_RUNTIME_PM_OPS(ab8500_gpadc_runtime_suspend,
  604. ab8500_gpadc_runtime_resume,
  605. ab8500_gpadc_runtime_idle)
  606. };
  607. static struct platform_driver ab8500_gpadc_driver = {
  608. .probe = ab8500_gpadc_probe,
  609. .remove = ab8500_gpadc_remove,
  610. .driver = {
  611. .name = "ab8500-gpadc",
  612. .owner = THIS_MODULE,
  613. .pm = &ab8500_gpadc_pm_ops,
  614. },
  615. };
  616. static int __init ab8500_gpadc_init(void)
  617. {
  618. return platform_driver_register(&ab8500_gpadc_driver);
  619. }
  620. static void __exit ab8500_gpadc_exit(void)
  621. {
  622. platform_driver_unregister(&ab8500_gpadc_driver);
  623. }
  624. subsys_initcall_sync(ab8500_gpadc_init);
  625. module_exit(ab8500_gpadc_exit);
  626. MODULE_LICENSE("GPL v2");
  627. MODULE_AUTHOR("Arun R Murthy, Daniel Willerud, Johan Palsson");
  628. MODULE_ALIAS("platform:ab8500_gpadc");
  629. MODULE_DESCRIPTION("AB8500 GPADC driver");