stk1160-reg.h 2.4 KB

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  1. /*
  2. * STK1160 driver
  3. *
  4. * Copyright (C) 2012 Ezequiel Garcia
  5. * <elezegarcia--a.t--gmail.com>
  6. *
  7. * Based on Easycap driver by R.M. Thomas
  8. * Copyright (C) 2010 R.M. Thomas
  9. * <rmthomas--a.t--sciolus.org>
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. */
  22. /* GPIO Control */
  23. #define STK1160_GCTRL 0x000
  24. /* Remote Wakup Control */
  25. #define STK1160_RMCTL 0x00c
  26. /*
  27. * Decoder Control Register:
  28. * This byte controls capture start/stop
  29. * with bit #7 (0x?? OR 0x80 to activate).
  30. */
  31. #define STK1160_DCTRL 0x100
  32. /* Capture Frame Start Position */
  33. #define STK116_CFSPO 0x110
  34. #define STK116_CFSPO_STX_L 0x110
  35. #define STK116_CFSPO_STX_H 0x111
  36. #define STK116_CFSPO_STY_L 0x112
  37. #define STK116_CFSPO_STY_H 0x113
  38. /* Capture Frame End Position */
  39. #define STK116_CFEPO 0x114
  40. #define STK116_CFEPO_ENX_L 0x114
  41. #define STK116_CFEPO_ENX_H 0x115
  42. #define STK116_CFEPO_ENY_L 0x116
  43. #define STK116_CFEPO_ENY_H 0x117
  44. /* Serial Interface Control */
  45. #define STK1160_SICTL 0x200
  46. #define STK1160_SICTL_CD 0x202
  47. #define STK1160_SICTL_SDA 0x203
  48. /* Serial Bus Write */
  49. #define STK1160_SBUSW 0x204
  50. #define STK1160_SBUSW_WA 0x204
  51. #define STK1160_SBUSW_WD 0x205
  52. /* Serial Bus Read */
  53. #define STK1160_SBUSR 0x208
  54. #define STK1160_SBUSR_RA 0x208
  55. #define STK1160_SBUSR_RD 0x209
  56. /* Alternate Serial Inteface Control */
  57. #define STK1160_ASIC 0x2fc
  58. /* PLL Select Options */
  59. #define STK1160_PLLSO 0x018
  60. /* PLL Frequency Divider */
  61. #define STK1160_PLLFD 0x01c
  62. /* Timing Generator */
  63. #define STK1160_TIGEN 0x300
  64. /* Timing Control Parameter */
  65. #define STK1160_TICTL 0x350
  66. /* AC97 Audio Control */
  67. #define STK1160_AC97CTL_0 0x500
  68. #define STK1160_AC97CTL_1 0x504
  69. /* Use [0:6] bits of register 0x504 to set codec command address */
  70. #define STK1160_AC97_ADDR 0x504
  71. /* Use [16:31] bits of register 0x500 to set codec command data */
  72. #define STK1160_AC97_CMD 0x502
  73. /* Audio I2S Interface */
  74. #define STK1160_I2SCTL 0x50c
  75. /* EEPROM Interface */
  76. #define STK1160_EEPROM_SZ 0x5f0