cx88-video.c 54 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075
  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * video4linux video interface
  5. *
  6. * (c) 2003-04 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  7. *
  8. * (c) 2005-2006 Mauro Carvalho Chehab <mchehab@infradead.org>
  9. * - Multituner support
  10. * - video_ioctl2 conversion
  11. * - PAL/M fixes
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License as published by
  15. * the Free Software Foundation; either version 2 of the License, or
  16. * (at your option) any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  26. */
  27. #include <linux/init.h>
  28. #include <linux/list.h>
  29. #include <linux/module.h>
  30. #include <linux/kmod.h>
  31. #include <linux/kernel.h>
  32. #include <linux/slab.h>
  33. #include <linux/interrupt.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/kthread.h>
  37. #include <asm/div64.h>
  38. #include "cx88.h"
  39. #include <media/v4l2-common.h>
  40. #include <media/v4l2-ioctl.h>
  41. #include <media/v4l2-event.h>
  42. #include <media/wm8775.h>
  43. MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards");
  44. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  45. MODULE_LICENSE("GPL");
  46. MODULE_VERSION(CX88_VERSION);
  47. /* ------------------------------------------------------------------ */
  48. static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
  49. static unsigned int vbi_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
  50. static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
  51. module_param_array(video_nr, int, NULL, 0444);
  52. module_param_array(vbi_nr, int, NULL, 0444);
  53. module_param_array(radio_nr, int, NULL, 0444);
  54. MODULE_PARM_DESC(video_nr,"video device numbers");
  55. MODULE_PARM_DESC(vbi_nr,"vbi device numbers");
  56. MODULE_PARM_DESC(radio_nr,"radio device numbers");
  57. static unsigned int video_debug;
  58. module_param(video_debug,int,0644);
  59. MODULE_PARM_DESC(video_debug,"enable debug messages [video]");
  60. static unsigned int irq_debug;
  61. module_param(irq_debug,int,0644);
  62. MODULE_PARM_DESC(irq_debug,"enable debug messages [IRQ handler]");
  63. static unsigned int vid_limit = 16;
  64. module_param(vid_limit,int,0644);
  65. MODULE_PARM_DESC(vid_limit,"capture memory limit in megabytes");
  66. #define dprintk(level,fmt, arg...) if (video_debug >= level) \
  67. printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
  68. /* ------------------------------------------------------------------- */
  69. /* static data */
  70. static const struct cx8800_fmt formats[] = {
  71. {
  72. .name = "8 bpp, gray",
  73. .fourcc = V4L2_PIX_FMT_GREY,
  74. .cxformat = ColorFormatY8,
  75. .depth = 8,
  76. .flags = FORMAT_FLAGS_PACKED,
  77. },{
  78. .name = "15 bpp RGB, le",
  79. .fourcc = V4L2_PIX_FMT_RGB555,
  80. .cxformat = ColorFormatRGB15,
  81. .depth = 16,
  82. .flags = FORMAT_FLAGS_PACKED,
  83. },{
  84. .name = "15 bpp RGB, be",
  85. .fourcc = V4L2_PIX_FMT_RGB555X,
  86. .cxformat = ColorFormatRGB15 | ColorFormatBSWAP,
  87. .depth = 16,
  88. .flags = FORMAT_FLAGS_PACKED,
  89. },{
  90. .name = "16 bpp RGB, le",
  91. .fourcc = V4L2_PIX_FMT_RGB565,
  92. .cxformat = ColorFormatRGB16,
  93. .depth = 16,
  94. .flags = FORMAT_FLAGS_PACKED,
  95. },{
  96. .name = "16 bpp RGB, be",
  97. .fourcc = V4L2_PIX_FMT_RGB565X,
  98. .cxformat = ColorFormatRGB16 | ColorFormatBSWAP,
  99. .depth = 16,
  100. .flags = FORMAT_FLAGS_PACKED,
  101. },{
  102. .name = "24 bpp RGB, le",
  103. .fourcc = V4L2_PIX_FMT_BGR24,
  104. .cxformat = ColorFormatRGB24,
  105. .depth = 24,
  106. .flags = FORMAT_FLAGS_PACKED,
  107. },{
  108. .name = "32 bpp RGB, le",
  109. .fourcc = V4L2_PIX_FMT_BGR32,
  110. .cxformat = ColorFormatRGB32,
  111. .depth = 32,
  112. .flags = FORMAT_FLAGS_PACKED,
  113. },{
  114. .name = "32 bpp RGB, be",
  115. .fourcc = V4L2_PIX_FMT_RGB32,
  116. .cxformat = ColorFormatRGB32 | ColorFormatBSWAP | ColorFormatWSWAP,
  117. .depth = 32,
  118. .flags = FORMAT_FLAGS_PACKED,
  119. },{
  120. .name = "4:2:2, packed, YUYV",
  121. .fourcc = V4L2_PIX_FMT_YUYV,
  122. .cxformat = ColorFormatYUY2,
  123. .depth = 16,
  124. .flags = FORMAT_FLAGS_PACKED,
  125. },{
  126. .name = "4:2:2, packed, UYVY",
  127. .fourcc = V4L2_PIX_FMT_UYVY,
  128. .cxformat = ColorFormatYUY2 | ColorFormatBSWAP,
  129. .depth = 16,
  130. .flags = FORMAT_FLAGS_PACKED,
  131. },
  132. };
  133. static const struct cx8800_fmt* format_by_fourcc(unsigned int fourcc)
  134. {
  135. unsigned int i;
  136. for (i = 0; i < ARRAY_SIZE(formats); i++)
  137. if (formats[i].fourcc == fourcc)
  138. return formats+i;
  139. return NULL;
  140. }
  141. /* ------------------------------------------------------------------- */
  142. struct cx88_ctrl {
  143. /* control information */
  144. u32 id;
  145. s32 minimum;
  146. s32 maximum;
  147. u32 step;
  148. s32 default_value;
  149. /* control register information */
  150. u32 off;
  151. u32 reg;
  152. u32 sreg;
  153. u32 mask;
  154. u32 shift;
  155. };
  156. static const struct cx88_ctrl cx8800_vid_ctls[] = {
  157. /* --- video --- */
  158. {
  159. .id = V4L2_CID_BRIGHTNESS,
  160. .minimum = 0x00,
  161. .maximum = 0xff,
  162. .step = 1,
  163. .default_value = 0x7f,
  164. .off = 128,
  165. .reg = MO_CONTR_BRIGHT,
  166. .mask = 0x00ff,
  167. .shift = 0,
  168. },{
  169. .id = V4L2_CID_CONTRAST,
  170. .minimum = 0,
  171. .maximum = 0xff,
  172. .step = 1,
  173. .default_value = 0x3f,
  174. .off = 0,
  175. .reg = MO_CONTR_BRIGHT,
  176. .mask = 0xff00,
  177. .shift = 8,
  178. },{
  179. .id = V4L2_CID_HUE,
  180. .minimum = 0,
  181. .maximum = 0xff,
  182. .step = 1,
  183. .default_value = 0x7f,
  184. .off = 128,
  185. .reg = MO_HUE,
  186. .mask = 0x00ff,
  187. .shift = 0,
  188. },{
  189. /* strictly, this only describes only U saturation.
  190. * V saturation is handled specially through code.
  191. */
  192. .id = V4L2_CID_SATURATION,
  193. .minimum = 0,
  194. .maximum = 0xff,
  195. .step = 1,
  196. .default_value = 0x7f,
  197. .off = 0,
  198. .reg = MO_UV_SATURATION,
  199. .mask = 0x00ff,
  200. .shift = 0,
  201. }, {
  202. .id = V4L2_CID_SHARPNESS,
  203. .minimum = 0,
  204. .maximum = 4,
  205. .step = 1,
  206. .default_value = 0x0,
  207. .off = 0,
  208. /* NOTE: the value is converted and written to both even
  209. and odd registers in the code */
  210. .reg = MO_FILTER_ODD,
  211. .mask = 7 << 7,
  212. .shift = 7,
  213. }, {
  214. .id = V4L2_CID_CHROMA_AGC,
  215. .minimum = 0,
  216. .maximum = 1,
  217. .default_value = 0x1,
  218. .reg = MO_INPUT_FORMAT,
  219. .mask = 1 << 10,
  220. .shift = 10,
  221. }, {
  222. .id = V4L2_CID_COLOR_KILLER,
  223. .minimum = 0,
  224. .maximum = 1,
  225. .default_value = 0x1,
  226. .reg = MO_INPUT_FORMAT,
  227. .mask = 1 << 9,
  228. .shift = 9,
  229. }, {
  230. .id = V4L2_CID_BAND_STOP_FILTER,
  231. .minimum = 0,
  232. .maximum = 1,
  233. .step = 1,
  234. .default_value = 0x0,
  235. .off = 0,
  236. .reg = MO_HTOTAL,
  237. .mask = 3 << 11,
  238. .shift = 11,
  239. }
  240. };
  241. static const struct cx88_ctrl cx8800_aud_ctls[] = {
  242. {
  243. /* --- audio --- */
  244. .id = V4L2_CID_AUDIO_MUTE,
  245. .minimum = 0,
  246. .maximum = 1,
  247. .default_value = 1,
  248. .reg = AUD_VOL_CTL,
  249. .sreg = SHADOW_AUD_VOL_CTL,
  250. .mask = (1 << 6),
  251. .shift = 6,
  252. },{
  253. .id = V4L2_CID_AUDIO_VOLUME,
  254. .minimum = 0,
  255. .maximum = 0x3f,
  256. .step = 1,
  257. .default_value = 0x3f,
  258. .reg = AUD_VOL_CTL,
  259. .sreg = SHADOW_AUD_VOL_CTL,
  260. .mask = 0x3f,
  261. .shift = 0,
  262. },{
  263. .id = V4L2_CID_AUDIO_BALANCE,
  264. .minimum = 0,
  265. .maximum = 0x7f,
  266. .step = 1,
  267. .default_value = 0x40,
  268. .reg = AUD_BAL_CTL,
  269. .sreg = SHADOW_AUD_BAL_CTL,
  270. .mask = 0x7f,
  271. .shift = 0,
  272. }
  273. };
  274. enum {
  275. CX8800_VID_CTLS = ARRAY_SIZE(cx8800_vid_ctls),
  276. CX8800_AUD_CTLS = ARRAY_SIZE(cx8800_aud_ctls),
  277. };
  278. /* ------------------------------------------------------------------- */
  279. /* resource management */
  280. static int res_get(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bit)
  281. {
  282. struct cx88_core *core = dev->core;
  283. if (fh->resources & bit)
  284. /* have it already allocated */
  285. return 1;
  286. /* is it free? */
  287. mutex_lock(&core->lock);
  288. if (dev->resources & bit) {
  289. /* no, someone else uses it */
  290. mutex_unlock(&core->lock);
  291. return 0;
  292. }
  293. /* it's free, grab it */
  294. fh->resources |= bit;
  295. dev->resources |= bit;
  296. dprintk(1,"res: get %d\n",bit);
  297. mutex_unlock(&core->lock);
  298. return 1;
  299. }
  300. static
  301. int res_check(struct cx8800_fh *fh, unsigned int bit)
  302. {
  303. return (fh->resources & bit);
  304. }
  305. static
  306. int res_locked(struct cx8800_dev *dev, unsigned int bit)
  307. {
  308. return (dev->resources & bit);
  309. }
  310. static
  311. void res_free(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bits)
  312. {
  313. struct cx88_core *core = dev->core;
  314. BUG_ON((fh->resources & bits) != bits);
  315. mutex_lock(&core->lock);
  316. fh->resources &= ~bits;
  317. dev->resources &= ~bits;
  318. dprintk(1,"res: put %d\n",bits);
  319. mutex_unlock(&core->lock);
  320. }
  321. /* ------------------------------------------------------------------ */
  322. int cx88_video_mux(struct cx88_core *core, unsigned int input)
  323. {
  324. /* struct cx88_core *core = dev->core; */
  325. dprintk(1,"video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n",
  326. input, INPUT(input).vmux,
  327. INPUT(input).gpio0,INPUT(input).gpio1,
  328. INPUT(input).gpio2,INPUT(input).gpio3);
  329. core->input = input;
  330. cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input).vmux << 14);
  331. cx_write(MO_GP3_IO, INPUT(input).gpio3);
  332. cx_write(MO_GP0_IO, INPUT(input).gpio0);
  333. cx_write(MO_GP1_IO, INPUT(input).gpio1);
  334. cx_write(MO_GP2_IO, INPUT(input).gpio2);
  335. switch (INPUT(input).type) {
  336. case CX88_VMUX_SVIDEO:
  337. cx_set(MO_AFECFG_IO, 0x00000001);
  338. cx_set(MO_INPUT_FORMAT, 0x00010010);
  339. cx_set(MO_FILTER_EVEN, 0x00002020);
  340. cx_set(MO_FILTER_ODD, 0x00002020);
  341. break;
  342. default:
  343. cx_clear(MO_AFECFG_IO, 0x00000001);
  344. cx_clear(MO_INPUT_FORMAT, 0x00010010);
  345. cx_clear(MO_FILTER_EVEN, 0x00002020);
  346. cx_clear(MO_FILTER_ODD, 0x00002020);
  347. break;
  348. }
  349. /* if there are audioroutes defined, we have an external
  350. ADC to deal with audio */
  351. if (INPUT(input).audioroute) {
  352. /* The wm8775 module has the "2" route hardwired into
  353. the initialization. Some boards may use different
  354. routes for different inputs. HVR-1300 surely does */
  355. if (core->board.audio_chip &&
  356. core->board.audio_chip == V4L2_IDENT_WM8775) {
  357. call_all(core, audio, s_routing,
  358. INPUT(input).audioroute, 0, 0);
  359. }
  360. /* cx2388's C-ADC is connected to the tuner only.
  361. When used with S-Video, that ADC is busy dealing with
  362. chroma, so an external must be used for baseband audio */
  363. if (INPUT(input).type != CX88_VMUX_TELEVISION &&
  364. INPUT(input).type != CX88_VMUX_CABLE) {
  365. /* "I2S ADC mode" */
  366. core->tvaudio = WW_I2SADC;
  367. cx88_set_tvaudio(core);
  368. } else {
  369. /* Normal mode */
  370. cx_write(AUD_I2SCNTL, 0x0);
  371. cx_clear(AUD_CTL, EN_I2SIN_ENABLE);
  372. }
  373. }
  374. return 0;
  375. }
  376. EXPORT_SYMBOL(cx88_video_mux);
  377. /* ------------------------------------------------------------------ */
  378. static int start_video_dma(struct cx8800_dev *dev,
  379. struct cx88_dmaqueue *q,
  380. struct cx88_buffer *buf)
  381. {
  382. struct cx88_core *core = dev->core;
  383. /* setup fifo + format */
  384. cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH21],
  385. buf->bpl, buf->risc.dma);
  386. cx88_set_scale(core, buf->vb.width, buf->vb.height, buf->vb.field);
  387. cx_write(MO_COLOR_CTRL, buf->fmt->cxformat | ColorFormatGamma);
  388. /* reset counter */
  389. cx_write(MO_VIDY_GPCNTRL,GP_COUNT_CONTROL_RESET);
  390. q->count = 1;
  391. /* enable irqs */
  392. cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT);
  393. /* Enables corresponding bits at PCI_INT_STAT:
  394. bits 0 to 4: video, audio, transport stream, VIP, Host
  395. bit 7: timer
  396. bits 8 and 9: DMA complete for: SRC, DST
  397. bits 10 and 11: BERR signal asserted for RISC: RD, WR
  398. bits 12 to 15: BERR signal asserted for: BRDG, SRC, DST, IPB
  399. */
  400. cx_set(MO_VID_INTMSK, 0x0f0011);
  401. /* enable capture */
  402. cx_set(VID_CAPTURE_CONTROL,0x06);
  403. /* start dma */
  404. cx_set(MO_DEV_CNTRL2, (1<<5));
  405. cx_set(MO_VID_DMACNTRL, 0x11); /* Planar Y and packed FIFO and RISC enable */
  406. return 0;
  407. }
  408. #ifdef CONFIG_PM
  409. static int stop_video_dma(struct cx8800_dev *dev)
  410. {
  411. struct cx88_core *core = dev->core;
  412. /* stop dma */
  413. cx_clear(MO_VID_DMACNTRL, 0x11);
  414. /* disable capture */
  415. cx_clear(VID_CAPTURE_CONTROL,0x06);
  416. /* disable irqs */
  417. cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT);
  418. cx_clear(MO_VID_INTMSK, 0x0f0011);
  419. return 0;
  420. }
  421. #endif
  422. static int restart_video_queue(struct cx8800_dev *dev,
  423. struct cx88_dmaqueue *q)
  424. {
  425. struct cx88_core *core = dev->core;
  426. struct cx88_buffer *buf, *prev;
  427. if (!list_empty(&q->active)) {
  428. buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
  429. dprintk(2,"restart_queue [%p/%d]: restart dma\n",
  430. buf, buf->vb.i);
  431. start_video_dma(dev, q, buf);
  432. list_for_each_entry(buf, &q->active, vb.queue)
  433. buf->count = q->count++;
  434. mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
  435. return 0;
  436. }
  437. prev = NULL;
  438. for (;;) {
  439. if (list_empty(&q->queued))
  440. return 0;
  441. buf = list_entry(q->queued.next, struct cx88_buffer, vb.queue);
  442. if (NULL == prev) {
  443. list_move_tail(&buf->vb.queue, &q->active);
  444. start_video_dma(dev, q, buf);
  445. buf->vb.state = VIDEOBUF_ACTIVE;
  446. buf->count = q->count++;
  447. mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
  448. dprintk(2,"[%p/%d] restart_queue - first active\n",
  449. buf,buf->vb.i);
  450. } else if (prev->vb.width == buf->vb.width &&
  451. prev->vb.height == buf->vb.height &&
  452. prev->fmt == buf->fmt) {
  453. list_move_tail(&buf->vb.queue, &q->active);
  454. buf->vb.state = VIDEOBUF_ACTIVE;
  455. buf->count = q->count++;
  456. prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
  457. dprintk(2,"[%p/%d] restart_queue - move to active\n",
  458. buf,buf->vb.i);
  459. } else {
  460. return 0;
  461. }
  462. prev = buf;
  463. }
  464. }
  465. /* ------------------------------------------------------------------ */
  466. static int
  467. buffer_setup(struct videobuf_queue *q, unsigned int *count, unsigned int *size)
  468. {
  469. struct cx8800_fh *fh = q->priv_data;
  470. struct cx8800_dev *dev = fh->dev;
  471. *size = dev->fmt->depth * dev->width * dev->height >> 3;
  472. if (0 == *count)
  473. *count = 32;
  474. if (*size * *count > vid_limit * 1024 * 1024)
  475. *count = (vid_limit * 1024 * 1024) / *size;
  476. return 0;
  477. }
  478. static int
  479. buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
  480. enum v4l2_field field)
  481. {
  482. struct cx8800_fh *fh = q->priv_data;
  483. struct cx8800_dev *dev = fh->dev;
  484. struct cx88_core *core = dev->core;
  485. struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
  486. struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb);
  487. int rc, init_buffer = 0;
  488. BUG_ON(NULL == dev->fmt);
  489. if (dev->width < 48 || dev->width > norm_maxw(core->tvnorm) ||
  490. dev->height < 32 || dev->height > norm_maxh(core->tvnorm))
  491. return -EINVAL;
  492. buf->vb.size = (dev->width * dev->height * dev->fmt->depth) >> 3;
  493. if (0 != buf->vb.baddr && buf->vb.bsize < buf->vb.size)
  494. return -EINVAL;
  495. if (buf->fmt != dev->fmt ||
  496. buf->vb.width != dev->width ||
  497. buf->vb.height != dev->height ||
  498. buf->vb.field != field) {
  499. buf->fmt = dev->fmt;
  500. buf->vb.width = dev->width;
  501. buf->vb.height = dev->height;
  502. buf->vb.field = field;
  503. init_buffer = 1;
  504. }
  505. if (VIDEOBUF_NEEDS_INIT == buf->vb.state) {
  506. init_buffer = 1;
  507. if (0 != (rc = videobuf_iolock(q,&buf->vb,NULL)))
  508. goto fail;
  509. }
  510. if (init_buffer) {
  511. buf->bpl = buf->vb.width * buf->fmt->depth >> 3;
  512. switch (buf->vb.field) {
  513. case V4L2_FIELD_TOP:
  514. cx88_risc_buffer(dev->pci, &buf->risc,
  515. dma->sglist, 0, UNSET,
  516. buf->bpl, 0, buf->vb.height);
  517. break;
  518. case V4L2_FIELD_BOTTOM:
  519. cx88_risc_buffer(dev->pci, &buf->risc,
  520. dma->sglist, UNSET, 0,
  521. buf->bpl, 0, buf->vb.height);
  522. break;
  523. case V4L2_FIELD_INTERLACED:
  524. cx88_risc_buffer(dev->pci, &buf->risc,
  525. dma->sglist, 0, buf->bpl,
  526. buf->bpl, buf->bpl,
  527. buf->vb.height >> 1);
  528. break;
  529. case V4L2_FIELD_SEQ_TB:
  530. cx88_risc_buffer(dev->pci, &buf->risc,
  531. dma->sglist,
  532. 0, buf->bpl * (buf->vb.height >> 1),
  533. buf->bpl, 0,
  534. buf->vb.height >> 1);
  535. break;
  536. case V4L2_FIELD_SEQ_BT:
  537. cx88_risc_buffer(dev->pci, &buf->risc,
  538. dma->sglist,
  539. buf->bpl * (buf->vb.height >> 1), 0,
  540. buf->bpl, 0,
  541. buf->vb.height >> 1);
  542. break;
  543. default:
  544. BUG();
  545. }
  546. }
  547. dprintk(2,"[%p/%d] buffer_prepare - %dx%d %dbpp \"%s\" - dma=0x%08lx\n",
  548. buf, buf->vb.i,
  549. dev->width, dev->height, dev->fmt->depth, dev->fmt->name,
  550. (unsigned long)buf->risc.dma);
  551. buf->vb.state = VIDEOBUF_PREPARED;
  552. return 0;
  553. fail:
  554. cx88_free_buffer(q,buf);
  555. return rc;
  556. }
  557. static void
  558. buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb)
  559. {
  560. struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
  561. struct cx88_buffer *prev;
  562. struct cx8800_fh *fh = vq->priv_data;
  563. struct cx8800_dev *dev = fh->dev;
  564. struct cx88_core *core = dev->core;
  565. struct cx88_dmaqueue *q = &dev->vidq;
  566. /* add jump to stopper */
  567. buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC);
  568. buf->risc.jmp[1] = cpu_to_le32(q->stopper.dma);
  569. if (!list_empty(&q->queued)) {
  570. list_add_tail(&buf->vb.queue,&q->queued);
  571. buf->vb.state = VIDEOBUF_QUEUED;
  572. dprintk(2,"[%p/%d] buffer_queue - append to queued\n",
  573. buf, buf->vb.i);
  574. } else if (list_empty(&q->active)) {
  575. list_add_tail(&buf->vb.queue,&q->active);
  576. start_video_dma(dev, q, buf);
  577. buf->vb.state = VIDEOBUF_ACTIVE;
  578. buf->count = q->count++;
  579. mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
  580. dprintk(2,"[%p/%d] buffer_queue - first active\n",
  581. buf, buf->vb.i);
  582. } else {
  583. prev = list_entry(q->active.prev, struct cx88_buffer, vb.queue);
  584. if (prev->vb.width == buf->vb.width &&
  585. prev->vb.height == buf->vb.height &&
  586. prev->fmt == buf->fmt) {
  587. list_add_tail(&buf->vb.queue,&q->active);
  588. buf->vb.state = VIDEOBUF_ACTIVE;
  589. buf->count = q->count++;
  590. prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
  591. dprintk(2,"[%p/%d] buffer_queue - append to active\n",
  592. buf, buf->vb.i);
  593. } else {
  594. list_add_tail(&buf->vb.queue,&q->queued);
  595. buf->vb.state = VIDEOBUF_QUEUED;
  596. dprintk(2,"[%p/%d] buffer_queue - first queued\n",
  597. buf, buf->vb.i);
  598. }
  599. }
  600. }
  601. static void buffer_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
  602. {
  603. struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
  604. cx88_free_buffer(q,buf);
  605. }
  606. static const struct videobuf_queue_ops cx8800_video_qops = {
  607. .buf_setup = buffer_setup,
  608. .buf_prepare = buffer_prepare,
  609. .buf_queue = buffer_queue,
  610. .buf_release = buffer_release,
  611. };
  612. /* ------------------------------------------------------------------ */
  613. /* ------------------------------------------------------------------ */
  614. static struct videobuf_queue *get_queue(struct file *file)
  615. {
  616. struct video_device *vdev = video_devdata(file);
  617. struct cx8800_fh *fh = file->private_data;
  618. switch (vdev->vfl_type) {
  619. case VFL_TYPE_GRABBER:
  620. return &fh->vidq;
  621. case VFL_TYPE_VBI:
  622. return &fh->vbiq;
  623. default:
  624. BUG();
  625. return NULL;
  626. }
  627. }
  628. static int get_resource(struct file *file)
  629. {
  630. struct video_device *vdev = video_devdata(file);
  631. switch (vdev->vfl_type) {
  632. case VFL_TYPE_GRABBER:
  633. return RESOURCE_VIDEO;
  634. case VFL_TYPE_VBI:
  635. return RESOURCE_VBI;
  636. default:
  637. BUG();
  638. return 0;
  639. }
  640. }
  641. static int video_open(struct file *file)
  642. {
  643. struct video_device *vdev = video_devdata(file);
  644. struct cx8800_dev *dev = video_drvdata(file);
  645. struct cx88_core *core = dev->core;
  646. struct cx8800_fh *fh;
  647. enum v4l2_buf_type type = 0;
  648. int radio = 0;
  649. switch (vdev->vfl_type) {
  650. case VFL_TYPE_GRABBER:
  651. type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  652. break;
  653. case VFL_TYPE_VBI:
  654. type = V4L2_BUF_TYPE_VBI_CAPTURE;
  655. break;
  656. case VFL_TYPE_RADIO:
  657. radio = 1;
  658. break;
  659. }
  660. dprintk(1, "open dev=%s radio=%d type=%s\n",
  661. video_device_node_name(vdev), radio, v4l2_type_names[type]);
  662. /* allocate + initialize per filehandle data */
  663. fh = kzalloc(sizeof(*fh),GFP_KERNEL);
  664. if (unlikely(!fh))
  665. return -ENOMEM;
  666. v4l2_fh_init(&fh->fh, vdev);
  667. file->private_data = fh;
  668. fh->dev = dev;
  669. mutex_lock(&core->lock);
  670. videobuf_queue_sg_init(&fh->vidq, &cx8800_video_qops,
  671. &dev->pci->dev, &dev->slock,
  672. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  673. V4L2_FIELD_INTERLACED,
  674. sizeof(struct cx88_buffer),
  675. fh, NULL);
  676. videobuf_queue_sg_init(&fh->vbiq, &cx8800_vbi_qops,
  677. &dev->pci->dev, &dev->slock,
  678. V4L2_BUF_TYPE_VBI_CAPTURE,
  679. V4L2_FIELD_SEQ_TB,
  680. sizeof(struct cx88_buffer),
  681. fh, NULL);
  682. if (vdev->vfl_type == VFL_TYPE_RADIO) {
  683. dprintk(1,"video_open: setting radio device\n");
  684. cx_write(MO_GP3_IO, core->board.radio.gpio3);
  685. cx_write(MO_GP0_IO, core->board.radio.gpio0);
  686. cx_write(MO_GP1_IO, core->board.radio.gpio1);
  687. cx_write(MO_GP2_IO, core->board.radio.gpio2);
  688. if (core->board.radio.audioroute) {
  689. if(core->board.audio_chip &&
  690. core->board.audio_chip == V4L2_IDENT_WM8775) {
  691. call_all(core, audio, s_routing,
  692. core->board.radio.audioroute, 0, 0);
  693. }
  694. /* "I2S ADC mode" */
  695. core->tvaudio = WW_I2SADC;
  696. cx88_set_tvaudio(core);
  697. } else {
  698. /* FM Mode */
  699. core->tvaudio = WW_FM;
  700. cx88_set_tvaudio(core);
  701. cx88_set_stereo(core,V4L2_TUNER_MODE_STEREO,1);
  702. }
  703. call_all(core, tuner, s_radio);
  704. }
  705. core->users++;
  706. mutex_unlock(&core->lock);
  707. v4l2_fh_add(&fh->fh);
  708. return 0;
  709. }
  710. static ssize_t
  711. video_read(struct file *file, char __user *data, size_t count, loff_t *ppos)
  712. {
  713. struct video_device *vdev = video_devdata(file);
  714. struct cx8800_fh *fh = file->private_data;
  715. switch (vdev->vfl_type) {
  716. case VFL_TYPE_GRABBER:
  717. if (res_locked(fh->dev,RESOURCE_VIDEO))
  718. return -EBUSY;
  719. return videobuf_read_one(&fh->vidq, data, count, ppos,
  720. file->f_flags & O_NONBLOCK);
  721. case VFL_TYPE_VBI:
  722. if (!res_get(fh->dev,fh,RESOURCE_VBI))
  723. return -EBUSY;
  724. return videobuf_read_stream(&fh->vbiq, data, count, ppos, 1,
  725. file->f_flags & O_NONBLOCK);
  726. default:
  727. BUG();
  728. return 0;
  729. }
  730. }
  731. static unsigned int
  732. video_poll(struct file *file, struct poll_table_struct *wait)
  733. {
  734. struct video_device *vdev = video_devdata(file);
  735. struct cx8800_fh *fh = file->private_data;
  736. struct cx88_buffer *buf;
  737. unsigned int rc = v4l2_ctrl_poll(file, wait);
  738. if (vdev->vfl_type == VFL_TYPE_VBI) {
  739. if (!res_get(fh->dev,fh,RESOURCE_VBI))
  740. return rc | POLLERR;
  741. return rc | videobuf_poll_stream(file, &fh->vbiq, wait);
  742. }
  743. mutex_lock(&fh->vidq.vb_lock);
  744. if (res_check(fh,RESOURCE_VIDEO)) {
  745. /* streaming capture */
  746. if (list_empty(&fh->vidq.stream))
  747. goto done;
  748. buf = list_entry(fh->vidq.stream.next,struct cx88_buffer,vb.stream);
  749. } else {
  750. /* read() capture */
  751. buf = (struct cx88_buffer*)fh->vidq.read_buf;
  752. if (NULL == buf)
  753. goto done;
  754. }
  755. poll_wait(file, &buf->vb.done, wait);
  756. if (buf->vb.state == VIDEOBUF_DONE ||
  757. buf->vb.state == VIDEOBUF_ERROR)
  758. rc |= POLLIN|POLLRDNORM;
  759. done:
  760. mutex_unlock(&fh->vidq.vb_lock);
  761. return rc;
  762. }
  763. static int video_release(struct file *file)
  764. {
  765. struct cx8800_fh *fh = file->private_data;
  766. struct cx8800_dev *dev = fh->dev;
  767. /* turn off overlay */
  768. if (res_check(fh, RESOURCE_OVERLAY)) {
  769. /* FIXME */
  770. res_free(dev,fh,RESOURCE_OVERLAY);
  771. }
  772. /* stop video capture */
  773. if (res_check(fh, RESOURCE_VIDEO)) {
  774. videobuf_queue_cancel(&fh->vidq);
  775. res_free(dev,fh,RESOURCE_VIDEO);
  776. }
  777. if (fh->vidq.read_buf) {
  778. buffer_release(&fh->vidq,fh->vidq.read_buf);
  779. kfree(fh->vidq.read_buf);
  780. }
  781. /* stop vbi capture */
  782. if (res_check(fh, RESOURCE_VBI)) {
  783. videobuf_stop(&fh->vbiq);
  784. res_free(dev,fh,RESOURCE_VBI);
  785. }
  786. videobuf_mmap_free(&fh->vidq);
  787. videobuf_mmap_free(&fh->vbiq);
  788. mutex_lock(&dev->core->lock);
  789. v4l2_fh_del(&fh->fh);
  790. v4l2_fh_exit(&fh->fh);
  791. file->private_data = NULL;
  792. kfree(fh);
  793. dev->core->users--;
  794. if (!dev->core->users)
  795. call_all(dev->core, core, s_power, 0);
  796. mutex_unlock(&dev->core->lock);
  797. return 0;
  798. }
  799. static int
  800. video_mmap(struct file *file, struct vm_area_struct * vma)
  801. {
  802. return videobuf_mmap_mapper(get_queue(file), vma);
  803. }
  804. /* ------------------------------------------------------------------ */
  805. /* VIDEO CTRL IOCTLS */
  806. static int cx8800_s_vid_ctrl(struct v4l2_ctrl *ctrl)
  807. {
  808. struct cx88_core *core =
  809. container_of(ctrl->handler, struct cx88_core, video_hdl);
  810. const struct cx88_ctrl *cc = ctrl->priv;
  811. u32 value, mask;
  812. mask = cc->mask;
  813. switch (ctrl->id) {
  814. case V4L2_CID_SATURATION:
  815. /* special v_sat handling */
  816. value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
  817. if (core->tvnorm & V4L2_STD_SECAM) {
  818. /* For SECAM, both U and V sat should be equal */
  819. value = value << 8 | value;
  820. } else {
  821. /* Keeps U Saturation proportional to V Sat */
  822. value = (value * 0x5a) / 0x7f << 8 | value;
  823. }
  824. mask = 0xffff;
  825. break;
  826. case V4L2_CID_SHARPNESS:
  827. /* 0b000, 0b100, 0b101, 0b110, or 0b111 */
  828. value = (ctrl->val < 1 ? 0 : ((ctrl->val + 3) << 7));
  829. /* needs to be set for both fields */
  830. cx_andor(MO_FILTER_EVEN, mask, value);
  831. break;
  832. case V4L2_CID_CHROMA_AGC:
  833. value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
  834. break;
  835. default:
  836. value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
  837. break;
  838. }
  839. dprintk(1, "set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
  840. ctrl->id, ctrl->name, ctrl->val, cc->reg, value,
  841. mask, cc->sreg ? " [shadowed]" : "");
  842. if (cc->sreg)
  843. cx_sandor(cc->sreg, cc->reg, mask, value);
  844. else
  845. cx_andor(cc->reg, mask, value);
  846. return 0;
  847. }
  848. static int cx8800_s_aud_ctrl(struct v4l2_ctrl *ctrl)
  849. {
  850. struct cx88_core *core =
  851. container_of(ctrl->handler, struct cx88_core, audio_hdl);
  852. const struct cx88_ctrl *cc = ctrl->priv;
  853. u32 value,mask;
  854. /* Pass changes onto any WM8775 */
  855. if (core->board.audio_chip == V4L2_IDENT_WM8775) {
  856. switch (ctrl->id) {
  857. case V4L2_CID_AUDIO_MUTE:
  858. wm8775_s_ctrl(core, ctrl->id, ctrl->val);
  859. break;
  860. case V4L2_CID_AUDIO_VOLUME:
  861. wm8775_s_ctrl(core, ctrl->id, (ctrl->val) ?
  862. (0x90 + ctrl->val) << 8 : 0);
  863. break;
  864. case V4L2_CID_AUDIO_BALANCE:
  865. wm8775_s_ctrl(core, ctrl->id, ctrl->val << 9);
  866. break;
  867. default:
  868. break;
  869. }
  870. }
  871. mask = cc->mask;
  872. switch (ctrl->id) {
  873. case V4L2_CID_AUDIO_BALANCE:
  874. value = (ctrl->val < 0x40) ? (0x7f - ctrl->val) : (ctrl->val - 0x40);
  875. break;
  876. case V4L2_CID_AUDIO_VOLUME:
  877. value = 0x3f - (ctrl->val & 0x3f);
  878. break;
  879. default:
  880. value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
  881. break;
  882. }
  883. dprintk(1,"set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
  884. ctrl->id, ctrl->name, ctrl->val, cc->reg, value,
  885. mask, cc->sreg ? " [shadowed]" : "");
  886. if (cc->sreg)
  887. cx_sandor(cc->sreg, cc->reg, mask, value);
  888. else
  889. cx_andor(cc->reg, mask, value);
  890. return 0;
  891. }
  892. /* ------------------------------------------------------------------ */
  893. /* VIDEO IOCTLS */
  894. static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
  895. struct v4l2_format *f)
  896. {
  897. struct cx8800_fh *fh = priv;
  898. struct cx8800_dev *dev = fh->dev;
  899. f->fmt.pix.width = dev->width;
  900. f->fmt.pix.height = dev->height;
  901. f->fmt.pix.field = fh->vidq.field;
  902. f->fmt.pix.pixelformat = dev->fmt->fourcc;
  903. f->fmt.pix.bytesperline =
  904. (f->fmt.pix.width * dev->fmt->depth) >> 3;
  905. f->fmt.pix.sizeimage =
  906. f->fmt.pix.height * f->fmt.pix.bytesperline;
  907. f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
  908. return 0;
  909. }
  910. static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
  911. struct v4l2_format *f)
  912. {
  913. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  914. const struct cx8800_fmt *fmt;
  915. enum v4l2_field field;
  916. unsigned int maxw, maxh;
  917. fmt = format_by_fourcc(f->fmt.pix.pixelformat);
  918. if (NULL == fmt)
  919. return -EINVAL;
  920. field = f->fmt.pix.field;
  921. maxw = norm_maxw(core->tvnorm);
  922. maxh = norm_maxh(core->tvnorm);
  923. if (V4L2_FIELD_ANY == field) {
  924. field = (f->fmt.pix.height > maxh/2)
  925. ? V4L2_FIELD_INTERLACED
  926. : V4L2_FIELD_BOTTOM;
  927. }
  928. switch (field) {
  929. case V4L2_FIELD_TOP:
  930. case V4L2_FIELD_BOTTOM:
  931. maxh = maxh / 2;
  932. break;
  933. case V4L2_FIELD_INTERLACED:
  934. break;
  935. default:
  936. return -EINVAL;
  937. }
  938. f->fmt.pix.field = field;
  939. v4l_bound_align_image(&f->fmt.pix.width, 48, maxw, 2,
  940. &f->fmt.pix.height, 32, maxh, 0, 0);
  941. f->fmt.pix.bytesperline =
  942. (f->fmt.pix.width * fmt->depth) >> 3;
  943. f->fmt.pix.sizeimage =
  944. f->fmt.pix.height * f->fmt.pix.bytesperline;
  945. return 0;
  946. }
  947. static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
  948. struct v4l2_format *f)
  949. {
  950. struct cx8800_fh *fh = priv;
  951. struct cx8800_dev *dev = fh->dev;
  952. int err = vidioc_try_fmt_vid_cap (file,priv,f);
  953. if (0 != err)
  954. return err;
  955. dev->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
  956. dev->width = f->fmt.pix.width;
  957. dev->height = f->fmt.pix.height;
  958. fh->vidq.field = f->fmt.pix.field;
  959. return 0;
  960. }
  961. void cx88_querycap(struct file *file, struct cx88_core *core,
  962. struct v4l2_capability *cap)
  963. {
  964. struct video_device *vdev = video_devdata(file);
  965. strlcpy(cap->card, core->board.name, sizeof(cap->card));
  966. cap->device_caps = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING;
  967. if (UNSET != core->board.tuner_type)
  968. cap->device_caps |= V4L2_CAP_TUNER;
  969. switch (vdev->vfl_type) {
  970. case VFL_TYPE_RADIO:
  971. cap->device_caps = V4L2_CAP_RADIO | V4L2_CAP_TUNER;
  972. break;
  973. case VFL_TYPE_GRABBER:
  974. cap->device_caps |= V4L2_CAP_VIDEO_CAPTURE;
  975. break;
  976. case VFL_TYPE_VBI:
  977. cap->device_caps |= V4L2_CAP_VBI_CAPTURE;
  978. break;
  979. }
  980. cap->capabilities = cap->device_caps | V4L2_CAP_VIDEO_CAPTURE |
  981. V4L2_CAP_VBI_CAPTURE | V4L2_CAP_DEVICE_CAPS;
  982. if (core->board.radio.type == CX88_RADIO)
  983. cap->capabilities |= V4L2_CAP_RADIO;
  984. }
  985. EXPORT_SYMBOL(cx88_querycap);
  986. static int vidioc_querycap(struct file *file, void *priv,
  987. struct v4l2_capability *cap)
  988. {
  989. struct cx8800_dev *dev = ((struct cx8800_fh *)priv)->dev;
  990. struct cx88_core *core = dev->core;
  991. strcpy(cap->driver, "cx8800");
  992. sprintf(cap->bus_info, "PCI:%s", pci_name(dev->pci));
  993. cx88_querycap(file, core, cap);
  994. return 0;
  995. }
  996. static int vidioc_enum_fmt_vid_cap (struct file *file, void *priv,
  997. struct v4l2_fmtdesc *f)
  998. {
  999. if (unlikely(f->index >= ARRAY_SIZE(formats)))
  1000. return -EINVAL;
  1001. strlcpy(f->description,formats[f->index].name,sizeof(f->description));
  1002. f->pixelformat = formats[f->index].fourcc;
  1003. return 0;
  1004. }
  1005. static int vidioc_reqbufs (struct file *file, void *priv, struct v4l2_requestbuffers *p)
  1006. {
  1007. return videobuf_reqbufs(get_queue(file), p);
  1008. }
  1009. static int vidioc_querybuf (struct file *file, void *priv, struct v4l2_buffer *p)
  1010. {
  1011. return videobuf_querybuf(get_queue(file), p);
  1012. }
  1013. static int vidioc_qbuf (struct file *file, void *priv, struct v4l2_buffer *p)
  1014. {
  1015. return videobuf_qbuf(get_queue(file), p);
  1016. }
  1017. static int vidioc_dqbuf (struct file *file, void *priv, struct v4l2_buffer *p)
  1018. {
  1019. return videobuf_dqbuf(get_queue(file), p,
  1020. file->f_flags & O_NONBLOCK);
  1021. }
  1022. static int vidioc_streamon(struct file *file, void *priv, enum v4l2_buf_type i)
  1023. {
  1024. struct video_device *vdev = video_devdata(file);
  1025. struct cx8800_fh *fh = priv;
  1026. struct cx8800_dev *dev = fh->dev;
  1027. if ((vdev->vfl_type == VFL_TYPE_GRABBER && i != V4L2_BUF_TYPE_VIDEO_CAPTURE) ||
  1028. (vdev->vfl_type == VFL_TYPE_VBI && i != V4L2_BUF_TYPE_VBI_CAPTURE))
  1029. return -EINVAL;
  1030. if (unlikely(!res_get(dev, fh, get_resource(file))))
  1031. return -EBUSY;
  1032. return videobuf_streamon(get_queue(file));
  1033. }
  1034. static int vidioc_streamoff(struct file *file, void *priv, enum v4l2_buf_type i)
  1035. {
  1036. struct video_device *vdev = video_devdata(file);
  1037. struct cx8800_fh *fh = priv;
  1038. struct cx8800_dev *dev = fh->dev;
  1039. int err, res;
  1040. if ((vdev->vfl_type == VFL_TYPE_GRABBER && i != V4L2_BUF_TYPE_VIDEO_CAPTURE) ||
  1041. (vdev->vfl_type == VFL_TYPE_VBI && i != V4L2_BUF_TYPE_VBI_CAPTURE))
  1042. return -EINVAL;
  1043. res = get_resource(file);
  1044. err = videobuf_streamoff(get_queue(file));
  1045. if (err < 0)
  1046. return err;
  1047. res_free(dev,fh,res);
  1048. return 0;
  1049. }
  1050. static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *tvnorm)
  1051. {
  1052. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1053. *tvnorm = core->tvnorm;
  1054. return 0;
  1055. }
  1056. static int vidioc_s_std (struct file *file, void *priv, v4l2_std_id *tvnorms)
  1057. {
  1058. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1059. mutex_lock(&core->lock);
  1060. cx88_set_tvnorm(core,*tvnorms);
  1061. mutex_unlock(&core->lock);
  1062. return 0;
  1063. }
  1064. /* only one input in this sample driver */
  1065. int cx88_enum_input (struct cx88_core *core,struct v4l2_input *i)
  1066. {
  1067. static const char * const iname[] = {
  1068. [ CX88_VMUX_COMPOSITE1 ] = "Composite1",
  1069. [ CX88_VMUX_COMPOSITE2 ] = "Composite2",
  1070. [ CX88_VMUX_COMPOSITE3 ] = "Composite3",
  1071. [ CX88_VMUX_COMPOSITE4 ] = "Composite4",
  1072. [ CX88_VMUX_SVIDEO ] = "S-Video",
  1073. [ CX88_VMUX_TELEVISION ] = "Television",
  1074. [ CX88_VMUX_CABLE ] = "Cable TV",
  1075. [ CX88_VMUX_DVB ] = "DVB",
  1076. [ CX88_VMUX_DEBUG ] = "for debug only",
  1077. };
  1078. unsigned int n = i->index;
  1079. if (n >= 4)
  1080. return -EINVAL;
  1081. if (0 == INPUT(n).type)
  1082. return -EINVAL;
  1083. i->type = V4L2_INPUT_TYPE_CAMERA;
  1084. strcpy(i->name,iname[INPUT(n).type]);
  1085. if ((CX88_VMUX_TELEVISION == INPUT(n).type) ||
  1086. (CX88_VMUX_CABLE == INPUT(n).type)) {
  1087. i->type = V4L2_INPUT_TYPE_TUNER;
  1088. }
  1089. i->std = CX88_NORMS;
  1090. return 0;
  1091. }
  1092. EXPORT_SYMBOL(cx88_enum_input);
  1093. static int vidioc_enum_input (struct file *file, void *priv,
  1094. struct v4l2_input *i)
  1095. {
  1096. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1097. return cx88_enum_input (core,i);
  1098. }
  1099. static int vidioc_g_input (struct file *file, void *priv, unsigned int *i)
  1100. {
  1101. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1102. *i = core->input;
  1103. return 0;
  1104. }
  1105. static int vidioc_s_input (struct file *file, void *priv, unsigned int i)
  1106. {
  1107. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1108. if (i >= 4)
  1109. return -EINVAL;
  1110. if (0 == INPUT(i).type)
  1111. return -EINVAL;
  1112. mutex_lock(&core->lock);
  1113. cx88_newstation(core);
  1114. cx88_video_mux(core,i);
  1115. mutex_unlock(&core->lock);
  1116. return 0;
  1117. }
  1118. static int vidioc_g_tuner (struct file *file, void *priv,
  1119. struct v4l2_tuner *t)
  1120. {
  1121. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1122. u32 reg;
  1123. if (unlikely(UNSET == core->board.tuner_type))
  1124. return -EINVAL;
  1125. if (0 != t->index)
  1126. return -EINVAL;
  1127. strcpy(t->name, "Television");
  1128. t->capability = V4L2_TUNER_CAP_NORM;
  1129. t->rangehigh = 0xffffffffUL;
  1130. call_all(core, tuner, g_tuner, t);
  1131. cx88_get_stereo(core ,t);
  1132. reg = cx_read(MO_DEVICE_STATUS);
  1133. t->signal = (reg & (1<<5)) ? 0xffff : 0x0000;
  1134. return 0;
  1135. }
  1136. static int vidioc_s_tuner (struct file *file, void *priv,
  1137. struct v4l2_tuner *t)
  1138. {
  1139. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1140. if (UNSET == core->board.tuner_type)
  1141. return -EINVAL;
  1142. if (0 != t->index)
  1143. return -EINVAL;
  1144. cx88_set_stereo(core, t->audmode, 1);
  1145. return 0;
  1146. }
  1147. static int vidioc_g_frequency (struct file *file, void *priv,
  1148. struct v4l2_frequency *f)
  1149. {
  1150. struct cx8800_fh *fh = priv;
  1151. struct cx88_core *core = fh->dev->core;
  1152. if (unlikely(UNSET == core->board.tuner_type))
  1153. return -EINVAL;
  1154. if (f->tuner)
  1155. return -EINVAL;
  1156. f->frequency = core->freq;
  1157. call_all(core, tuner, g_frequency, f);
  1158. return 0;
  1159. }
  1160. int cx88_set_freq (struct cx88_core *core,
  1161. struct v4l2_frequency *f)
  1162. {
  1163. if (unlikely(UNSET == core->board.tuner_type))
  1164. return -EINVAL;
  1165. if (unlikely(f->tuner != 0))
  1166. return -EINVAL;
  1167. mutex_lock(&core->lock);
  1168. cx88_newstation(core);
  1169. call_all(core, tuner, s_frequency, f);
  1170. call_all(core, tuner, g_frequency, f);
  1171. core->freq = f->frequency;
  1172. /* When changing channels it is required to reset TVAUDIO */
  1173. msleep (10);
  1174. cx88_set_tvaudio(core);
  1175. mutex_unlock(&core->lock);
  1176. return 0;
  1177. }
  1178. EXPORT_SYMBOL(cx88_set_freq);
  1179. static int vidioc_s_frequency (struct file *file, void *priv,
  1180. struct v4l2_frequency *f)
  1181. {
  1182. struct cx8800_fh *fh = priv;
  1183. struct cx88_core *core = fh->dev->core;
  1184. return cx88_set_freq(core, f);
  1185. }
  1186. static int vidioc_g_chip_ident(struct file *file, void *priv,
  1187. struct v4l2_dbg_chip_ident *chip)
  1188. {
  1189. if (!v4l2_chip_match_host(&chip->match))
  1190. return -EINVAL;
  1191. chip->revision = 0;
  1192. chip->ident = V4L2_IDENT_UNKNOWN;
  1193. return 0;
  1194. }
  1195. #ifdef CONFIG_VIDEO_ADV_DEBUG
  1196. static int vidioc_g_register (struct file *file, void *fh,
  1197. struct v4l2_dbg_register *reg)
  1198. {
  1199. struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core;
  1200. if (!v4l2_chip_match_host(&reg->match))
  1201. return -EINVAL;
  1202. /* cx2388x has a 24-bit register space */
  1203. reg->val = cx_read(reg->reg & 0xffffff);
  1204. reg->size = 4;
  1205. return 0;
  1206. }
  1207. static int vidioc_s_register (struct file *file, void *fh,
  1208. struct v4l2_dbg_register *reg)
  1209. {
  1210. struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core;
  1211. if (!v4l2_chip_match_host(&reg->match))
  1212. return -EINVAL;
  1213. cx_write(reg->reg & 0xffffff, reg->val);
  1214. return 0;
  1215. }
  1216. #endif
  1217. /* ----------------------------------------------------------- */
  1218. /* RADIO ESPECIFIC IOCTLS */
  1219. /* ----------------------------------------------------------- */
  1220. static int radio_g_tuner (struct file *file, void *priv,
  1221. struct v4l2_tuner *t)
  1222. {
  1223. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1224. if (unlikely(t->index > 0))
  1225. return -EINVAL;
  1226. strcpy(t->name, "Radio");
  1227. call_all(core, tuner, g_tuner, t);
  1228. return 0;
  1229. }
  1230. /* FIXME: Should add a standard for radio */
  1231. static int radio_s_tuner (struct file *file, void *priv,
  1232. struct v4l2_tuner *t)
  1233. {
  1234. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1235. if (0 != t->index)
  1236. return -EINVAL;
  1237. if (t->audmode > V4L2_TUNER_MODE_STEREO)
  1238. t->audmode = V4L2_TUNER_MODE_STEREO;
  1239. call_all(core, tuner, s_tuner, t);
  1240. return 0;
  1241. }
  1242. /* ----------------------------------------------------------- */
  1243. static void cx8800_vid_timeout(unsigned long data)
  1244. {
  1245. struct cx8800_dev *dev = (struct cx8800_dev*)data;
  1246. struct cx88_core *core = dev->core;
  1247. struct cx88_dmaqueue *q = &dev->vidq;
  1248. struct cx88_buffer *buf;
  1249. unsigned long flags;
  1250. cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
  1251. cx_clear(MO_VID_DMACNTRL, 0x11);
  1252. cx_clear(VID_CAPTURE_CONTROL, 0x06);
  1253. spin_lock_irqsave(&dev->slock,flags);
  1254. while (!list_empty(&q->active)) {
  1255. buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
  1256. list_del(&buf->vb.queue);
  1257. buf->vb.state = VIDEOBUF_ERROR;
  1258. wake_up(&buf->vb.done);
  1259. printk("%s/0: [%p/%d] timeout - dma=0x%08lx\n", core->name,
  1260. buf, buf->vb.i, (unsigned long)buf->risc.dma);
  1261. }
  1262. restart_video_queue(dev,q);
  1263. spin_unlock_irqrestore(&dev->slock,flags);
  1264. }
  1265. static const char *cx88_vid_irqs[32] = {
  1266. "y_risci1", "u_risci1", "v_risci1", "vbi_risc1",
  1267. "y_risci2", "u_risci2", "v_risci2", "vbi_risc2",
  1268. "y_oflow", "u_oflow", "v_oflow", "vbi_oflow",
  1269. "y_sync", "u_sync", "v_sync", "vbi_sync",
  1270. "opc_err", "par_err", "rip_err", "pci_abort",
  1271. };
  1272. static void cx8800_vid_irq(struct cx8800_dev *dev)
  1273. {
  1274. struct cx88_core *core = dev->core;
  1275. u32 status, mask, count;
  1276. status = cx_read(MO_VID_INTSTAT);
  1277. mask = cx_read(MO_VID_INTMSK);
  1278. if (0 == (status & mask))
  1279. return;
  1280. cx_write(MO_VID_INTSTAT, status);
  1281. if (irq_debug || (status & mask & ~0xff))
  1282. cx88_print_irqbits(core->name, "irq vid",
  1283. cx88_vid_irqs, ARRAY_SIZE(cx88_vid_irqs),
  1284. status, mask);
  1285. /* risc op code error */
  1286. if (status & (1 << 16)) {
  1287. printk(KERN_WARNING "%s/0: video risc op code error\n",core->name);
  1288. cx_clear(MO_VID_DMACNTRL, 0x11);
  1289. cx_clear(VID_CAPTURE_CONTROL, 0x06);
  1290. cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
  1291. }
  1292. /* risc1 y */
  1293. if (status & 0x01) {
  1294. spin_lock(&dev->slock);
  1295. count = cx_read(MO_VIDY_GPCNT);
  1296. cx88_wakeup(core, &dev->vidq, count);
  1297. spin_unlock(&dev->slock);
  1298. }
  1299. /* risc1 vbi */
  1300. if (status & 0x08) {
  1301. spin_lock(&dev->slock);
  1302. count = cx_read(MO_VBI_GPCNT);
  1303. cx88_wakeup(core, &dev->vbiq, count);
  1304. spin_unlock(&dev->slock);
  1305. }
  1306. /* risc2 y */
  1307. if (status & 0x10) {
  1308. dprintk(2,"stopper video\n");
  1309. spin_lock(&dev->slock);
  1310. restart_video_queue(dev,&dev->vidq);
  1311. spin_unlock(&dev->slock);
  1312. }
  1313. /* risc2 vbi */
  1314. if (status & 0x80) {
  1315. dprintk(2,"stopper vbi\n");
  1316. spin_lock(&dev->slock);
  1317. cx8800_restart_vbi_queue(dev,&dev->vbiq);
  1318. spin_unlock(&dev->slock);
  1319. }
  1320. }
  1321. static irqreturn_t cx8800_irq(int irq, void *dev_id)
  1322. {
  1323. struct cx8800_dev *dev = dev_id;
  1324. struct cx88_core *core = dev->core;
  1325. u32 status;
  1326. int loop, handled = 0;
  1327. for (loop = 0; loop < 10; loop++) {
  1328. status = cx_read(MO_PCI_INTSTAT) &
  1329. (core->pci_irqmask | PCI_INT_VIDINT);
  1330. if (0 == status)
  1331. goto out;
  1332. cx_write(MO_PCI_INTSTAT, status);
  1333. handled = 1;
  1334. if (status & core->pci_irqmask)
  1335. cx88_core_irq(core,status);
  1336. if (status & PCI_INT_VIDINT)
  1337. cx8800_vid_irq(dev);
  1338. }
  1339. if (10 == loop) {
  1340. printk(KERN_WARNING "%s/0: irq loop -- clearing mask\n",
  1341. core->name);
  1342. cx_write(MO_PCI_INTMSK,0);
  1343. }
  1344. out:
  1345. return IRQ_RETVAL(handled);
  1346. }
  1347. /* ----------------------------------------------------------- */
  1348. /* exported stuff */
  1349. static const struct v4l2_file_operations video_fops =
  1350. {
  1351. .owner = THIS_MODULE,
  1352. .open = video_open,
  1353. .release = video_release,
  1354. .read = video_read,
  1355. .poll = video_poll,
  1356. .mmap = video_mmap,
  1357. .unlocked_ioctl = video_ioctl2,
  1358. };
  1359. static const struct v4l2_ioctl_ops video_ioctl_ops = {
  1360. .vidioc_querycap = vidioc_querycap,
  1361. .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
  1362. .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
  1363. .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
  1364. .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
  1365. .vidioc_reqbufs = vidioc_reqbufs,
  1366. .vidioc_querybuf = vidioc_querybuf,
  1367. .vidioc_qbuf = vidioc_qbuf,
  1368. .vidioc_dqbuf = vidioc_dqbuf,
  1369. .vidioc_g_std = vidioc_g_std,
  1370. .vidioc_s_std = vidioc_s_std,
  1371. .vidioc_enum_input = vidioc_enum_input,
  1372. .vidioc_g_input = vidioc_g_input,
  1373. .vidioc_s_input = vidioc_s_input,
  1374. .vidioc_streamon = vidioc_streamon,
  1375. .vidioc_streamoff = vidioc_streamoff,
  1376. .vidioc_g_tuner = vidioc_g_tuner,
  1377. .vidioc_s_tuner = vidioc_s_tuner,
  1378. .vidioc_g_frequency = vidioc_g_frequency,
  1379. .vidioc_s_frequency = vidioc_s_frequency,
  1380. .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
  1381. .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
  1382. .vidioc_g_chip_ident = vidioc_g_chip_ident,
  1383. #ifdef CONFIG_VIDEO_ADV_DEBUG
  1384. .vidioc_g_register = vidioc_g_register,
  1385. .vidioc_s_register = vidioc_s_register,
  1386. #endif
  1387. };
  1388. static const struct video_device cx8800_video_template = {
  1389. .name = "cx8800-video",
  1390. .fops = &video_fops,
  1391. .ioctl_ops = &video_ioctl_ops,
  1392. .tvnorms = CX88_NORMS,
  1393. };
  1394. static const struct v4l2_ioctl_ops vbi_ioctl_ops = {
  1395. .vidioc_querycap = vidioc_querycap,
  1396. .vidioc_g_fmt_vbi_cap = cx8800_vbi_fmt,
  1397. .vidioc_try_fmt_vbi_cap = cx8800_vbi_fmt,
  1398. .vidioc_s_fmt_vbi_cap = cx8800_vbi_fmt,
  1399. .vidioc_reqbufs = vidioc_reqbufs,
  1400. .vidioc_querybuf = vidioc_querybuf,
  1401. .vidioc_qbuf = vidioc_qbuf,
  1402. .vidioc_dqbuf = vidioc_dqbuf,
  1403. .vidioc_g_std = vidioc_g_std,
  1404. .vidioc_s_std = vidioc_s_std,
  1405. .vidioc_enum_input = vidioc_enum_input,
  1406. .vidioc_g_input = vidioc_g_input,
  1407. .vidioc_s_input = vidioc_s_input,
  1408. .vidioc_streamon = vidioc_streamon,
  1409. .vidioc_streamoff = vidioc_streamoff,
  1410. .vidioc_g_tuner = vidioc_g_tuner,
  1411. .vidioc_s_tuner = vidioc_s_tuner,
  1412. .vidioc_g_frequency = vidioc_g_frequency,
  1413. .vidioc_s_frequency = vidioc_s_frequency,
  1414. .vidioc_g_chip_ident = vidioc_g_chip_ident,
  1415. #ifdef CONFIG_VIDEO_ADV_DEBUG
  1416. .vidioc_g_register = vidioc_g_register,
  1417. .vidioc_s_register = vidioc_s_register,
  1418. #endif
  1419. };
  1420. static const struct video_device cx8800_vbi_template = {
  1421. .name = "cx8800-vbi",
  1422. .fops = &video_fops,
  1423. .ioctl_ops = &vbi_ioctl_ops,
  1424. .tvnorms = CX88_NORMS,
  1425. };
  1426. static const struct v4l2_file_operations radio_fops =
  1427. {
  1428. .owner = THIS_MODULE,
  1429. .open = video_open,
  1430. .poll = v4l2_ctrl_poll,
  1431. .release = video_release,
  1432. .unlocked_ioctl = video_ioctl2,
  1433. };
  1434. static const struct v4l2_ioctl_ops radio_ioctl_ops = {
  1435. .vidioc_querycap = vidioc_querycap,
  1436. .vidioc_g_tuner = radio_g_tuner,
  1437. .vidioc_s_tuner = radio_s_tuner,
  1438. .vidioc_g_frequency = vidioc_g_frequency,
  1439. .vidioc_s_frequency = vidioc_s_frequency,
  1440. .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
  1441. .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
  1442. .vidioc_g_chip_ident = vidioc_g_chip_ident,
  1443. #ifdef CONFIG_VIDEO_ADV_DEBUG
  1444. .vidioc_g_register = vidioc_g_register,
  1445. .vidioc_s_register = vidioc_s_register,
  1446. #endif
  1447. };
  1448. static const struct video_device cx8800_radio_template = {
  1449. .name = "cx8800-radio",
  1450. .fops = &radio_fops,
  1451. .ioctl_ops = &radio_ioctl_ops,
  1452. };
  1453. static const struct v4l2_ctrl_ops cx8800_ctrl_vid_ops = {
  1454. .s_ctrl = cx8800_s_vid_ctrl,
  1455. };
  1456. static const struct v4l2_ctrl_ops cx8800_ctrl_aud_ops = {
  1457. .s_ctrl = cx8800_s_aud_ctrl,
  1458. };
  1459. /* ----------------------------------------------------------- */
  1460. static void cx8800_unregister_video(struct cx8800_dev *dev)
  1461. {
  1462. if (dev->radio_dev) {
  1463. if (video_is_registered(dev->radio_dev))
  1464. video_unregister_device(dev->radio_dev);
  1465. else
  1466. video_device_release(dev->radio_dev);
  1467. dev->radio_dev = NULL;
  1468. }
  1469. if (dev->vbi_dev) {
  1470. if (video_is_registered(dev->vbi_dev))
  1471. video_unregister_device(dev->vbi_dev);
  1472. else
  1473. video_device_release(dev->vbi_dev);
  1474. dev->vbi_dev = NULL;
  1475. }
  1476. if (dev->video_dev) {
  1477. if (video_is_registered(dev->video_dev))
  1478. video_unregister_device(dev->video_dev);
  1479. else
  1480. video_device_release(dev->video_dev);
  1481. dev->video_dev = NULL;
  1482. }
  1483. }
  1484. static int cx8800_initdev(struct pci_dev *pci_dev,
  1485. const struct pci_device_id *pci_id)
  1486. {
  1487. struct cx8800_dev *dev;
  1488. struct cx88_core *core;
  1489. int err;
  1490. int i;
  1491. dev = kzalloc(sizeof(*dev),GFP_KERNEL);
  1492. if (NULL == dev)
  1493. return -ENOMEM;
  1494. /* pci init */
  1495. dev->pci = pci_dev;
  1496. if (pci_enable_device(pci_dev)) {
  1497. err = -EIO;
  1498. goto fail_free;
  1499. }
  1500. core = cx88_core_get(dev->pci);
  1501. if (NULL == core) {
  1502. err = -EINVAL;
  1503. goto fail_free;
  1504. }
  1505. dev->core = core;
  1506. /* print pci info */
  1507. dev->pci_rev = pci_dev->revision;
  1508. pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
  1509. printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, "
  1510. "latency: %d, mmio: 0x%llx\n", core->name,
  1511. pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
  1512. dev->pci_lat,(unsigned long long)pci_resource_start(pci_dev,0));
  1513. pci_set_master(pci_dev);
  1514. if (!pci_dma_supported(pci_dev,DMA_BIT_MASK(32))) {
  1515. printk("%s/0: Oops: no 32bit PCI DMA ???\n",core->name);
  1516. err = -EIO;
  1517. goto fail_core;
  1518. }
  1519. /* initialize driver struct */
  1520. spin_lock_init(&dev->slock);
  1521. core->tvnorm = V4L2_STD_NTSC_M;
  1522. /* init video dma queues */
  1523. INIT_LIST_HEAD(&dev->vidq.active);
  1524. INIT_LIST_HEAD(&dev->vidq.queued);
  1525. dev->vidq.timeout.function = cx8800_vid_timeout;
  1526. dev->vidq.timeout.data = (unsigned long)dev;
  1527. init_timer(&dev->vidq.timeout);
  1528. cx88_risc_stopper(dev->pci,&dev->vidq.stopper,
  1529. MO_VID_DMACNTRL,0x11,0x00);
  1530. /* init vbi dma queues */
  1531. INIT_LIST_HEAD(&dev->vbiq.active);
  1532. INIT_LIST_HEAD(&dev->vbiq.queued);
  1533. dev->vbiq.timeout.function = cx8800_vbi_timeout;
  1534. dev->vbiq.timeout.data = (unsigned long)dev;
  1535. init_timer(&dev->vbiq.timeout);
  1536. cx88_risc_stopper(dev->pci,&dev->vbiq.stopper,
  1537. MO_VID_DMACNTRL,0x88,0x00);
  1538. /* get irq */
  1539. err = request_irq(pci_dev->irq, cx8800_irq,
  1540. IRQF_SHARED | IRQF_DISABLED, core->name, dev);
  1541. if (err < 0) {
  1542. printk(KERN_ERR "%s/0: can't get IRQ %d\n",
  1543. core->name,pci_dev->irq);
  1544. goto fail_core;
  1545. }
  1546. cx_set(MO_PCI_INTMSK, core->pci_irqmask);
  1547. for (i = 0; i < CX8800_AUD_CTLS; i++) {
  1548. const struct cx88_ctrl *cc = &cx8800_aud_ctls[i];
  1549. struct v4l2_ctrl *vc;
  1550. vc = v4l2_ctrl_new_std(&core->audio_hdl, &cx8800_ctrl_aud_ops,
  1551. cc->id, cc->minimum, cc->maximum, cc->step, cc->default_value);
  1552. if (vc == NULL) {
  1553. err = core->audio_hdl.error;
  1554. goto fail_core;
  1555. }
  1556. vc->priv = (void *)cc;
  1557. }
  1558. for (i = 0; i < CX8800_VID_CTLS; i++) {
  1559. const struct cx88_ctrl *cc = &cx8800_vid_ctls[i];
  1560. struct v4l2_ctrl *vc;
  1561. vc = v4l2_ctrl_new_std(&core->video_hdl, &cx8800_ctrl_vid_ops,
  1562. cc->id, cc->minimum, cc->maximum, cc->step, cc->default_value);
  1563. if (vc == NULL) {
  1564. err = core->video_hdl.error;
  1565. goto fail_core;
  1566. }
  1567. vc->priv = (void *)cc;
  1568. if (vc->id == V4L2_CID_CHROMA_AGC)
  1569. core->chroma_agc = vc;
  1570. }
  1571. v4l2_ctrl_add_handler(&core->video_hdl, &core->audio_hdl, NULL);
  1572. /* load and configure helper modules */
  1573. if (core->board.audio_chip == V4L2_IDENT_WM8775) {
  1574. struct i2c_board_info wm8775_info = {
  1575. .type = "wm8775",
  1576. .addr = 0x36 >> 1,
  1577. .platform_data = &core->wm8775_data,
  1578. };
  1579. struct v4l2_subdev *sd;
  1580. if (core->boardnr == CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1)
  1581. core->wm8775_data.is_nova_s = true;
  1582. else
  1583. core->wm8775_data.is_nova_s = false;
  1584. sd = v4l2_i2c_new_subdev_board(&core->v4l2_dev, &core->i2c_adap,
  1585. &wm8775_info, NULL);
  1586. if (sd != NULL) {
  1587. core->sd_wm8775 = sd;
  1588. sd->grp_id = WM8775_GID;
  1589. }
  1590. }
  1591. if (core->board.audio_chip == V4L2_IDENT_TVAUDIO) {
  1592. /* This probes for a tda9874 as is used on some
  1593. Pixelview Ultra boards. */
  1594. v4l2_i2c_new_subdev(&core->v4l2_dev, &core->i2c_adap,
  1595. "tvaudio", 0, I2C_ADDRS(0xb0 >> 1));
  1596. }
  1597. switch (core->boardnr) {
  1598. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  1599. case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD: {
  1600. static const struct i2c_board_info rtc_info = {
  1601. I2C_BOARD_INFO("isl1208", 0x6f)
  1602. };
  1603. request_module("rtc-isl1208");
  1604. core->i2c_rtc = i2c_new_device(&core->i2c_adap, &rtc_info);
  1605. }
  1606. /* break intentionally omitted */
  1607. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  1608. request_module("ir-kbd-i2c");
  1609. }
  1610. /* Sets device info at pci_dev */
  1611. pci_set_drvdata(pci_dev, dev);
  1612. dev->width = 320;
  1613. dev->height = 240;
  1614. dev->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24);
  1615. /* initial device configuration */
  1616. mutex_lock(&core->lock);
  1617. cx88_set_tvnorm(core, core->tvnorm);
  1618. v4l2_ctrl_handler_setup(&core->video_hdl);
  1619. v4l2_ctrl_handler_setup(&core->audio_hdl);
  1620. cx88_video_mux(core, 0);
  1621. /* register v4l devices */
  1622. dev->video_dev = cx88_vdev_init(core,dev->pci,
  1623. &cx8800_video_template,"video");
  1624. video_set_drvdata(dev->video_dev, dev);
  1625. dev->video_dev->ctrl_handler = &core->video_hdl;
  1626. err = video_register_device(dev->video_dev,VFL_TYPE_GRABBER,
  1627. video_nr[core->nr]);
  1628. if (err < 0) {
  1629. printk(KERN_ERR "%s/0: can't register video device\n",
  1630. core->name);
  1631. goto fail_unreg;
  1632. }
  1633. printk(KERN_INFO "%s/0: registered device %s [v4l2]\n",
  1634. core->name, video_device_node_name(dev->video_dev));
  1635. dev->vbi_dev = cx88_vdev_init(core,dev->pci,&cx8800_vbi_template,"vbi");
  1636. video_set_drvdata(dev->vbi_dev, dev);
  1637. err = video_register_device(dev->vbi_dev,VFL_TYPE_VBI,
  1638. vbi_nr[core->nr]);
  1639. if (err < 0) {
  1640. printk(KERN_ERR "%s/0: can't register vbi device\n",
  1641. core->name);
  1642. goto fail_unreg;
  1643. }
  1644. printk(KERN_INFO "%s/0: registered device %s\n",
  1645. core->name, video_device_node_name(dev->vbi_dev));
  1646. if (core->board.radio.type == CX88_RADIO) {
  1647. dev->radio_dev = cx88_vdev_init(core,dev->pci,
  1648. &cx8800_radio_template,"radio");
  1649. video_set_drvdata(dev->radio_dev, dev);
  1650. dev->radio_dev->ctrl_handler = &core->audio_hdl;
  1651. err = video_register_device(dev->radio_dev,VFL_TYPE_RADIO,
  1652. radio_nr[core->nr]);
  1653. if (err < 0) {
  1654. printk(KERN_ERR "%s/0: can't register radio device\n",
  1655. core->name);
  1656. goto fail_unreg;
  1657. }
  1658. printk(KERN_INFO "%s/0: registered device %s\n",
  1659. core->name, video_device_node_name(dev->radio_dev));
  1660. }
  1661. /* start tvaudio thread */
  1662. if (core->board.tuner_type != TUNER_ABSENT) {
  1663. core->kthread = kthread_run(cx88_audio_thread, core, "cx88 tvaudio");
  1664. if (IS_ERR(core->kthread)) {
  1665. err = PTR_ERR(core->kthread);
  1666. printk(KERN_ERR "%s/0: failed to create cx88 audio thread, err=%d\n",
  1667. core->name, err);
  1668. }
  1669. }
  1670. mutex_unlock(&core->lock);
  1671. return 0;
  1672. fail_unreg:
  1673. cx8800_unregister_video(dev);
  1674. free_irq(pci_dev->irq, dev);
  1675. mutex_unlock(&core->lock);
  1676. fail_core:
  1677. cx88_core_put(core,dev->pci);
  1678. fail_free:
  1679. kfree(dev);
  1680. return err;
  1681. }
  1682. static void cx8800_finidev(struct pci_dev *pci_dev)
  1683. {
  1684. struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
  1685. struct cx88_core *core = dev->core;
  1686. /* stop thread */
  1687. if (core->kthread) {
  1688. kthread_stop(core->kthread);
  1689. core->kthread = NULL;
  1690. }
  1691. if (core->ir)
  1692. cx88_ir_stop(core);
  1693. cx88_shutdown(core); /* FIXME */
  1694. pci_disable_device(pci_dev);
  1695. /* unregister stuff */
  1696. free_irq(pci_dev->irq, dev);
  1697. cx8800_unregister_video(dev);
  1698. pci_set_drvdata(pci_dev, NULL);
  1699. /* free memory */
  1700. btcx_riscmem_free(dev->pci,&dev->vidq.stopper);
  1701. cx88_core_put(core,dev->pci);
  1702. kfree(dev);
  1703. }
  1704. #ifdef CONFIG_PM
  1705. static int cx8800_suspend(struct pci_dev *pci_dev, pm_message_t state)
  1706. {
  1707. struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
  1708. struct cx88_core *core = dev->core;
  1709. /* stop video+vbi capture */
  1710. spin_lock(&dev->slock);
  1711. if (!list_empty(&dev->vidq.active)) {
  1712. printk("%s/0: suspend video\n", core->name);
  1713. stop_video_dma(dev);
  1714. del_timer(&dev->vidq.timeout);
  1715. }
  1716. if (!list_empty(&dev->vbiq.active)) {
  1717. printk("%s/0: suspend vbi\n", core->name);
  1718. cx8800_stop_vbi_dma(dev);
  1719. del_timer(&dev->vbiq.timeout);
  1720. }
  1721. spin_unlock(&dev->slock);
  1722. if (core->ir)
  1723. cx88_ir_stop(core);
  1724. /* FIXME -- shutdown device */
  1725. cx88_shutdown(core);
  1726. pci_save_state(pci_dev);
  1727. if (0 != pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state))) {
  1728. pci_disable_device(pci_dev);
  1729. dev->state.disabled = 1;
  1730. }
  1731. return 0;
  1732. }
  1733. static int cx8800_resume(struct pci_dev *pci_dev)
  1734. {
  1735. struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
  1736. struct cx88_core *core = dev->core;
  1737. int err;
  1738. if (dev->state.disabled) {
  1739. err=pci_enable_device(pci_dev);
  1740. if (err) {
  1741. printk(KERN_ERR "%s/0: can't enable device\n",
  1742. core->name);
  1743. return err;
  1744. }
  1745. dev->state.disabled = 0;
  1746. }
  1747. err= pci_set_power_state(pci_dev, PCI_D0);
  1748. if (err) {
  1749. printk(KERN_ERR "%s/0: can't set power state\n", core->name);
  1750. pci_disable_device(pci_dev);
  1751. dev->state.disabled = 1;
  1752. return err;
  1753. }
  1754. pci_restore_state(pci_dev);
  1755. /* FIXME: re-initialize hardware */
  1756. cx88_reset(core);
  1757. if (core->ir)
  1758. cx88_ir_start(core);
  1759. cx_set(MO_PCI_INTMSK, core->pci_irqmask);
  1760. /* restart video+vbi capture */
  1761. spin_lock(&dev->slock);
  1762. if (!list_empty(&dev->vidq.active)) {
  1763. printk("%s/0: resume video\n", core->name);
  1764. restart_video_queue(dev,&dev->vidq);
  1765. }
  1766. if (!list_empty(&dev->vbiq.active)) {
  1767. printk("%s/0: resume vbi\n", core->name);
  1768. cx8800_restart_vbi_queue(dev,&dev->vbiq);
  1769. }
  1770. spin_unlock(&dev->slock);
  1771. return 0;
  1772. }
  1773. #endif
  1774. /* ----------------------------------------------------------- */
  1775. static const struct pci_device_id cx8800_pci_tbl[] = {
  1776. {
  1777. .vendor = 0x14f1,
  1778. .device = 0x8800,
  1779. .subvendor = PCI_ANY_ID,
  1780. .subdevice = PCI_ANY_ID,
  1781. },{
  1782. /* --- end of list --- */
  1783. }
  1784. };
  1785. MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl);
  1786. static struct pci_driver cx8800_pci_driver = {
  1787. .name = "cx8800",
  1788. .id_table = cx8800_pci_tbl,
  1789. .probe = cx8800_initdev,
  1790. .remove = cx8800_finidev,
  1791. #ifdef CONFIG_PM
  1792. .suspend = cx8800_suspend,
  1793. .resume = cx8800_resume,
  1794. #endif
  1795. };
  1796. static int __init cx8800_init(void)
  1797. {
  1798. printk(KERN_INFO "cx88/0: cx2388x v4l2 driver version %s loaded\n",
  1799. CX88_VERSION);
  1800. return pci_register_driver(&cx8800_pci_driver);
  1801. }
  1802. static void __exit cx8800_fini(void)
  1803. {
  1804. pci_unregister_driver(&cx8800_pci_driver);
  1805. }
  1806. module_init(cx8800_init);
  1807. module_exit(cx8800_fini);