cx23885.h 21 KB

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  1. /*
  2. * Driver for the Conexant CX23885 PCIe bridge
  3. *
  4. * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. *
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. #include <linux/pci.h>
  22. #include <linux/i2c.h>
  23. #include <linux/kdev_t.h>
  24. #include <linux/slab.h>
  25. #include <media/v4l2-device.h>
  26. #include <media/tuner.h>
  27. #include <media/tveeprom.h>
  28. #include <media/videobuf-dma-sg.h>
  29. #include <media/videobuf-dvb.h>
  30. #include <media/rc-core.h>
  31. #include "btcx-risc.h"
  32. #include "cx23885-reg.h"
  33. #include "media/cx2341x.h"
  34. #include <linux/mutex.h>
  35. #define CX23885_VERSION "0.0.3"
  36. #define UNSET (-1U)
  37. #define CX23885_MAXBOARDS 8
  38. /* Max number of inputs by card */
  39. #define MAX_CX23885_INPUT 8
  40. #define INPUT(nr) (&cx23885_boards[dev->board].input[nr])
  41. #define RESOURCE_OVERLAY 1
  42. #define RESOURCE_VIDEO 2
  43. #define RESOURCE_VBI 4
  44. #define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */
  45. #define CX23885_BOARD_NOAUTO UNSET
  46. #define CX23885_BOARD_UNKNOWN 0
  47. #define CX23885_BOARD_HAUPPAUGE_HVR1800lp 1
  48. #define CX23885_BOARD_HAUPPAUGE_HVR1800 2
  49. #define CX23885_BOARD_HAUPPAUGE_HVR1250 3
  50. #define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP 4
  51. #define CX23885_BOARD_HAUPPAUGE_HVR1500Q 5
  52. #define CX23885_BOARD_HAUPPAUGE_HVR1500 6
  53. #define CX23885_BOARD_HAUPPAUGE_HVR1200 7
  54. #define CX23885_BOARD_HAUPPAUGE_HVR1700 8
  55. #define CX23885_BOARD_HAUPPAUGE_HVR1400 9
  56. #define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10
  57. #define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11
  58. #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12
  59. #define CX23885_BOARD_COMPRO_VIDEOMATE_E650F 13
  60. #define CX23885_BOARD_TBS_6920 14
  61. #define CX23885_BOARD_TEVII_S470 15
  62. #define CX23885_BOARD_DVBWORLD_2005 16
  63. #define CX23885_BOARD_NETUP_DUAL_DVBS2_CI 17
  64. #define CX23885_BOARD_HAUPPAUGE_HVR1270 18
  65. #define CX23885_BOARD_HAUPPAUGE_HVR1275 19
  66. #define CX23885_BOARD_HAUPPAUGE_HVR1255 20
  67. #define CX23885_BOARD_HAUPPAUGE_HVR1210 21
  68. #define CX23885_BOARD_MYGICA_X8506 22
  69. #define CX23885_BOARD_MAGICPRO_PROHDTVE2 23
  70. #define CX23885_BOARD_HAUPPAUGE_HVR1850 24
  71. #define CX23885_BOARD_COMPRO_VIDEOMATE_E800 25
  72. #define CX23885_BOARD_HAUPPAUGE_HVR1290 26
  73. #define CX23885_BOARD_MYGICA_X8558PRO 27
  74. #define CX23885_BOARD_LEADTEK_WINFAST_PXTV1200 28
  75. #define CX23885_BOARD_GOTVIEW_X5_3D_HYBRID 29
  76. #define CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF 30
  77. #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000 31
  78. #define CX23885_BOARD_MPX885 32
  79. #define CX23885_BOARD_MYGICA_X8507 33
  80. #define CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL 34
  81. #define CX23885_BOARD_TEVII_S471 35
  82. #define CX23885_BOARD_HAUPPAUGE_HVR1255_22111 36
  83. #define CX23885_BOARD_PROF_8000 37
  84. #define CX23885_BOARD_HAUPPAUGE_HVR4400 38
  85. #define CX23885_BOARD_AVERMEDIA_HC81R 39
  86. #define GPIO_0 0x00000001
  87. #define GPIO_1 0x00000002
  88. #define GPIO_2 0x00000004
  89. #define GPIO_3 0x00000008
  90. #define GPIO_4 0x00000010
  91. #define GPIO_5 0x00000020
  92. #define GPIO_6 0x00000040
  93. #define GPIO_7 0x00000080
  94. #define GPIO_8 0x00000100
  95. #define GPIO_9 0x00000200
  96. #define GPIO_10 0x00000400
  97. #define GPIO_11 0x00000800
  98. #define GPIO_12 0x00001000
  99. #define GPIO_13 0x00002000
  100. #define GPIO_14 0x00004000
  101. #define GPIO_15 0x00008000
  102. /* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */
  103. #define CX23885_NORMS (\
  104. V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \
  105. V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \
  106. V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \
  107. V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK)
  108. struct cx23885_fmt {
  109. char *name;
  110. u32 fourcc; /* v4l2 format id */
  111. int depth;
  112. int flags;
  113. u32 cxformat;
  114. };
  115. struct cx23885_ctrl {
  116. struct v4l2_queryctrl v;
  117. u32 off;
  118. u32 reg;
  119. u32 mask;
  120. u32 shift;
  121. };
  122. struct cx23885_tvnorm {
  123. char *name;
  124. v4l2_std_id id;
  125. u32 cxiformat;
  126. u32 cxoformat;
  127. };
  128. struct cx23885_fh {
  129. struct cx23885_dev *dev;
  130. enum v4l2_buf_type type;
  131. int radio;
  132. u32 resources;
  133. /* video overlay */
  134. struct v4l2_window win;
  135. struct v4l2_clip *clips;
  136. unsigned int nclips;
  137. /* video capture */
  138. struct cx23885_fmt *fmt;
  139. unsigned int width, height;
  140. /* vbi capture */
  141. struct videobuf_queue vidq;
  142. struct videobuf_queue vbiq;
  143. /* MPEG Encoder specifics ONLY */
  144. struct videobuf_queue mpegq;
  145. atomic_t v4l_reading;
  146. };
  147. enum cx23885_itype {
  148. CX23885_VMUX_COMPOSITE1 = 1,
  149. CX23885_VMUX_COMPOSITE2,
  150. CX23885_VMUX_COMPOSITE3,
  151. CX23885_VMUX_COMPOSITE4,
  152. CX23885_VMUX_SVIDEO,
  153. CX23885_VMUX_COMPONENT,
  154. CX23885_VMUX_TELEVISION,
  155. CX23885_VMUX_CABLE,
  156. CX23885_VMUX_DVB,
  157. CX23885_VMUX_DEBUG,
  158. CX23885_RADIO,
  159. };
  160. enum cx23885_src_sel_type {
  161. CX23885_SRC_SEL_EXT_656_VIDEO = 0,
  162. CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
  163. };
  164. /* buffer for one video frame */
  165. struct cx23885_buffer {
  166. /* common v4l buffer stuff -- must be first */
  167. struct videobuf_buffer vb;
  168. /* cx23885 specific */
  169. unsigned int bpl;
  170. struct btcx_riscmem risc;
  171. struct cx23885_fmt *fmt;
  172. u32 count;
  173. };
  174. struct cx23885_input {
  175. enum cx23885_itype type;
  176. unsigned int vmux;
  177. unsigned int amux;
  178. u32 gpio0, gpio1, gpio2, gpio3;
  179. };
  180. typedef enum {
  181. CX23885_MPEG_UNDEFINED = 0,
  182. CX23885_MPEG_DVB,
  183. CX23885_ANALOG_VIDEO,
  184. CX23885_MPEG_ENCODER,
  185. } port_t;
  186. struct cx23885_board {
  187. char *name;
  188. port_t porta, portb, portc;
  189. int num_fds_portb, num_fds_portc;
  190. unsigned int tuner_type;
  191. unsigned int radio_type;
  192. unsigned char tuner_addr;
  193. unsigned char radio_addr;
  194. unsigned int tuner_bus;
  195. /* Vendors can and do run the PCIe bridge at different
  196. * clock rates, driven physically by crystals on the PCBs.
  197. * The core has to accommodate this. This allows the user
  198. * to add new boards with new frequencys. The value is
  199. * expressed in Hz.
  200. *
  201. * The core framework will default this value based on
  202. * current designs, but it can vary.
  203. */
  204. u32 clk_freq;
  205. struct cx23885_input input[MAX_CX23885_INPUT];
  206. int ci_type; /* for NetUP */
  207. /* Force bottom field first during DMA (888 workaround) */
  208. u32 force_bff;
  209. };
  210. struct cx23885_subid {
  211. u16 subvendor;
  212. u16 subdevice;
  213. u32 card;
  214. };
  215. struct cx23885_i2c {
  216. struct cx23885_dev *dev;
  217. int nr;
  218. /* i2c i/o */
  219. struct i2c_adapter i2c_adap;
  220. struct i2c_client i2c_client;
  221. u32 i2c_rc;
  222. /* 885 registers used for raw addess */
  223. u32 i2c_period;
  224. u32 reg_ctrl;
  225. u32 reg_stat;
  226. u32 reg_addr;
  227. u32 reg_rdata;
  228. u32 reg_wdata;
  229. };
  230. struct cx23885_dmaqueue {
  231. struct list_head active;
  232. struct list_head queued;
  233. struct timer_list timeout;
  234. struct btcx_riscmem stopper;
  235. u32 count;
  236. };
  237. struct cx23885_tsport {
  238. struct cx23885_dev *dev;
  239. int nr;
  240. int sram_chno;
  241. struct videobuf_dvb_frontends frontends;
  242. /* dma queues */
  243. struct cx23885_dmaqueue mpegq;
  244. u32 ts_packet_size;
  245. u32 ts_packet_count;
  246. int width;
  247. int height;
  248. spinlock_t slock;
  249. /* registers */
  250. u32 reg_gpcnt;
  251. u32 reg_gpcnt_ctl;
  252. u32 reg_dma_ctl;
  253. u32 reg_lngth;
  254. u32 reg_hw_sop_ctrl;
  255. u32 reg_gen_ctrl;
  256. u32 reg_bd_pkt_status;
  257. u32 reg_sop_status;
  258. u32 reg_fifo_ovfl_stat;
  259. u32 reg_vld_misc;
  260. u32 reg_ts_clk_en;
  261. u32 reg_ts_int_msk;
  262. u32 reg_ts_int_stat;
  263. u32 reg_src_sel;
  264. /* Default register vals */
  265. int pci_irqmask;
  266. u32 dma_ctl_val;
  267. u32 ts_int_msk_val;
  268. u32 gen_ctrl_val;
  269. u32 ts_clk_en_val;
  270. u32 src_sel_val;
  271. u32 vld_misc_val;
  272. u32 hw_sop_ctrl_val;
  273. /* Allow a single tsport to have multiple frontends */
  274. u32 num_frontends;
  275. void (*gate_ctrl)(struct cx23885_tsport *port, int open);
  276. void *port_priv;
  277. /* Workaround for a temp dvb_frontend that the tuner can attached to */
  278. struct dvb_frontend analog_fe;
  279. };
  280. struct cx23885_kernel_ir {
  281. struct cx23885_dev *cx;
  282. char *name;
  283. char *phys;
  284. struct rc_dev *rc;
  285. };
  286. struct cx23885_audio_buffer {
  287. unsigned int bpl;
  288. struct btcx_riscmem risc;
  289. struct videobuf_dmabuf dma;
  290. };
  291. struct cx23885_audio_dev {
  292. struct cx23885_dev *dev;
  293. struct pci_dev *pci;
  294. struct snd_card *card;
  295. spinlock_t lock;
  296. atomic_t count;
  297. unsigned int dma_size;
  298. unsigned int period_size;
  299. unsigned int num_periods;
  300. struct videobuf_dmabuf *dma_risc;
  301. struct cx23885_audio_buffer *buf;
  302. struct snd_pcm_substream *substream;
  303. };
  304. struct cx23885_dev {
  305. atomic_t refcount;
  306. struct v4l2_device v4l2_dev;
  307. /* pci stuff */
  308. struct pci_dev *pci;
  309. unsigned char pci_rev, pci_lat;
  310. int pci_bus, pci_slot;
  311. u32 __iomem *lmmio;
  312. u8 __iomem *bmmio;
  313. int pci_irqmask;
  314. spinlock_t pci_irqmask_lock; /* protects mask reg too */
  315. int hwrevision;
  316. /* This valud is board specific and is used to configure the
  317. * AV core so we see nice clean and stable video and audio. */
  318. u32 clk_freq;
  319. /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
  320. struct cx23885_i2c i2c_bus[3];
  321. int nr;
  322. struct mutex lock;
  323. struct mutex gpio_lock;
  324. /* board details */
  325. unsigned int board;
  326. char name[32];
  327. struct cx23885_tsport ts1, ts2;
  328. /* sram configuration */
  329. struct sram_channel *sram_channels;
  330. enum {
  331. CX23885_BRIDGE_UNDEFINED = 0,
  332. CX23885_BRIDGE_885 = 885,
  333. CX23885_BRIDGE_887 = 887,
  334. CX23885_BRIDGE_888 = 888,
  335. } bridge;
  336. /* Analog video */
  337. u32 resources;
  338. unsigned int input;
  339. unsigned int audinput; /* Selectable audio input */
  340. u32 tvaudio;
  341. v4l2_std_id tvnorm;
  342. unsigned int tuner_type;
  343. unsigned char tuner_addr;
  344. unsigned int tuner_bus;
  345. unsigned int radio_type;
  346. unsigned char radio_addr;
  347. unsigned int has_radio;
  348. struct v4l2_subdev *sd_cx25840;
  349. struct work_struct cx25840_work;
  350. /* Infrared */
  351. struct v4l2_subdev *sd_ir;
  352. struct work_struct ir_rx_work;
  353. unsigned long ir_rx_notifications;
  354. struct work_struct ir_tx_work;
  355. unsigned long ir_tx_notifications;
  356. struct cx23885_kernel_ir *kernel_ir;
  357. atomic_t ir_input_stopping;
  358. /* V4l */
  359. u32 freq;
  360. struct video_device *video_dev;
  361. struct video_device *vbi_dev;
  362. struct video_device *radio_dev;
  363. struct cx23885_dmaqueue vidq;
  364. struct cx23885_dmaqueue vbiq;
  365. spinlock_t slock;
  366. /* MPEG Encoder ONLY settings */
  367. u32 cx23417_mailbox;
  368. struct cx2341x_mpeg_params mpeg_params;
  369. struct video_device *v4l_device;
  370. atomic_t v4l_reader_count;
  371. struct cx23885_tvnorm encodernorm;
  372. /* Analog raw audio */
  373. struct cx23885_audio_dev *audio_dev;
  374. };
  375. static inline struct cx23885_dev *to_cx23885(struct v4l2_device *v4l2_dev)
  376. {
  377. return container_of(v4l2_dev, struct cx23885_dev, v4l2_dev);
  378. }
  379. #define call_all(dev, o, f, args...) \
  380. v4l2_device_call_all(&dev->v4l2_dev, 0, o, f, ##args)
  381. #define CX23885_HW_888_IR (1 << 0)
  382. #define CX23885_HW_AV_CORE (1 << 1)
  383. #define call_hw(dev, grpid, o, f, args...) \
  384. v4l2_device_call_all(&dev->v4l2_dev, grpid, o, f, ##args)
  385. extern struct v4l2_subdev *cx23885_find_hw(struct cx23885_dev *dev, u32 hw);
  386. #define SRAM_CH01 0 /* Video A */
  387. #define SRAM_CH02 1 /* VBI A */
  388. #define SRAM_CH03 2 /* Video B */
  389. #define SRAM_CH04 3 /* Transport via B */
  390. #define SRAM_CH05 4 /* VBI B */
  391. #define SRAM_CH06 5 /* Video C */
  392. #define SRAM_CH07 6 /* Transport via C */
  393. #define SRAM_CH08 7 /* Audio Internal A */
  394. #define SRAM_CH09 8 /* Audio Internal B */
  395. #define SRAM_CH10 9 /* Audio External */
  396. #define SRAM_CH11 10 /* COMB_3D_N */
  397. #define SRAM_CH12 11 /* Comb 3D N1 */
  398. #define SRAM_CH13 12 /* Comb 3D N2 */
  399. #define SRAM_CH14 13 /* MOE Vid */
  400. #define SRAM_CH15 14 /* MOE RSLT */
  401. struct sram_channel {
  402. char *name;
  403. u32 cmds_start;
  404. u32 ctrl_start;
  405. u32 cdt;
  406. u32 fifo_start;
  407. u32 fifo_size;
  408. u32 ptr1_reg;
  409. u32 ptr2_reg;
  410. u32 cnt1_reg;
  411. u32 cnt2_reg;
  412. u32 jumponly;
  413. };
  414. /* ----------------------------------------------------------- */
  415. #define cx_read(reg) readl(dev->lmmio + ((reg)>>2))
  416. #define cx_write(reg, value) writel((value), dev->lmmio + ((reg)>>2))
  417. #define cx_andor(reg, mask, value) \
  418. writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
  419. ((value) & (mask)), dev->lmmio+((reg)>>2))
  420. #define cx_set(reg, bit) cx_andor((reg), (bit), (bit))
  421. #define cx_clear(reg, bit) cx_andor((reg), (bit), 0)
  422. /* ----------------------------------------------------------- */
  423. /* cx23885-core.c */
  424. extern int cx23885_sram_channel_setup(struct cx23885_dev *dev,
  425. struct sram_channel *ch,
  426. unsigned int bpl, u32 risc);
  427. extern void cx23885_sram_channel_dump(struct cx23885_dev *dev,
  428. struct sram_channel *ch);
  429. extern int cx23885_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
  430. u32 reg, u32 mask, u32 value);
  431. extern int cx23885_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
  432. struct scatterlist *sglist,
  433. unsigned int top_offset, unsigned int bottom_offset,
  434. unsigned int bpl, unsigned int padding, unsigned int lines);
  435. extern int cx23885_risc_vbibuffer(struct pci_dev *pci,
  436. struct btcx_riscmem *risc, struct scatterlist *sglist,
  437. unsigned int top_offset, unsigned int bottom_offset,
  438. unsigned int bpl, unsigned int padding, unsigned int lines);
  439. void cx23885_cancel_buffers(struct cx23885_tsport *port);
  440. extern int cx23885_restart_queue(struct cx23885_tsport *port,
  441. struct cx23885_dmaqueue *q);
  442. extern void cx23885_wakeup(struct cx23885_tsport *port,
  443. struct cx23885_dmaqueue *q, u32 count);
  444. extern void cx23885_gpio_set(struct cx23885_dev *dev, u32 mask);
  445. extern void cx23885_gpio_clear(struct cx23885_dev *dev, u32 mask);
  446. extern u32 cx23885_gpio_get(struct cx23885_dev *dev, u32 mask);
  447. extern void cx23885_gpio_enable(struct cx23885_dev *dev, u32 mask,
  448. int asoutput);
  449. extern void cx23885_irq_add_enable(struct cx23885_dev *dev, u32 mask);
  450. extern void cx23885_irq_enable(struct cx23885_dev *dev, u32 mask);
  451. extern void cx23885_irq_disable(struct cx23885_dev *dev, u32 mask);
  452. extern void cx23885_irq_remove(struct cx23885_dev *dev, u32 mask);
  453. /* ----------------------------------------------------------- */
  454. /* cx23885-cards.c */
  455. extern struct cx23885_board cx23885_boards[];
  456. extern const unsigned int cx23885_bcount;
  457. extern struct cx23885_subid cx23885_subids[];
  458. extern const unsigned int cx23885_idcount;
  459. extern int cx23885_tuner_callback(void *priv, int component,
  460. int command, int arg);
  461. extern void cx23885_card_list(struct cx23885_dev *dev);
  462. extern int cx23885_ir_init(struct cx23885_dev *dev);
  463. extern void cx23885_ir_pci_int_enable(struct cx23885_dev *dev);
  464. extern void cx23885_ir_fini(struct cx23885_dev *dev);
  465. extern void cx23885_gpio_setup(struct cx23885_dev *dev);
  466. extern void cx23885_card_setup(struct cx23885_dev *dev);
  467. extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev);
  468. extern int cx23885_dvb_register(struct cx23885_tsport *port);
  469. extern int cx23885_dvb_unregister(struct cx23885_tsport *port);
  470. extern int cx23885_buf_prepare(struct videobuf_queue *q,
  471. struct cx23885_tsport *port,
  472. struct cx23885_buffer *buf,
  473. enum v4l2_field field);
  474. extern void cx23885_buf_queue(struct cx23885_tsport *port,
  475. struct cx23885_buffer *buf);
  476. extern void cx23885_free_buffer(struct videobuf_queue *q,
  477. struct cx23885_buffer *buf);
  478. /* ----------------------------------------------------------- */
  479. /* cx23885-video.c */
  480. /* Video */
  481. extern int cx23885_video_register(struct cx23885_dev *dev);
  482. extern void cx23885_video_unregister(struct cx23885_dev *dev);
  483. extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status);
  484. extern void cx23885_video_wakeup(struct cx23885_dev *dev,
  485. struct cx23885_dmaqueue *q, u32 count);
  486. int cx23885_enum_input(struct cx23885_dev *dev, struct v4l2_input *i);
  487. int cx23885_set_input(struct file *file, void *priv, unsigned int i);
  488. int cx23885_get_input(struct file *file, void *priv, unsigned int *i);
  489. int cx23885_set_frequency(struct file *file, void *priv, struct v4l2_frequency *f);
  490. int cx23885_set_control(struct cx23885_dev *dev, struct v4l2_control *ctl);
  491. int cx23885_get_control(struct cx23885_dev *dev, struct v4l2_control *ctl);
  492. int cx23885_set_tvnorm(struct cx23885_dev *dev, v4l2_std_id norm);
  493. /* ----------------------------------------------------------- */
  494. /* cx23885-vbi.c */
  495. extern int cx23885_vbi_fmt(struct file *file, void *priv,
  496. struct v4l2_format *f);
  497. extern void cx23885_vbi_timeout(unsigned long data);
  498. extern struct videobuf_queue_ops cx23885_vbi_qops;
  499. extern int cx23885_restart_vbi_queue(struct cx23885_dev *dev,
  500. struct cx23885_dmaqueue *q);
  501. extern int cx23885_vbi_irq(struct cx23885_dev *dev, u32 status);
  502. /* cx23885-i2c.c */
  503. extern int cx23885_i2c_register(struct cx23885_i2c *bus);
  504. extern int cx23885_i2c_unregister(struct cx23885_i2c *bus);
  505. extern void cx23885_av_clk(struct cx23885_dev *dev, int enable);
  506. /* ----------------------------------------------------------- */
  507. /* cx23885-417.c */
  508. extern int cx23885_417_register(struct cx23885_dev *dev);
  509. extern void cx23885_417_unregister(struct cx23885_dev *dev);
  510. extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status);
  511. extern void cx23885_417_check_encoder(struct cx23885_dev *dev);
  512. extern void cx23885_mc417_init(struct cx23885_dev *dev);
  513. extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value);
  514. extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value);
  515. extern int mc417_register_read(struct cx23885_dev *dev,
  516. u16 address, u32 *value);
  517. extern int mc417_register_write(struct cx23885_dev *dev,
  518. u16 address, u32 value);
  519. extern void mc417_gpio_set(struct cx23885_dev *dev, u32 mask);
  520. extern void mc417_gpio_clear(struct cx23885_dev *dev, u32 mask);
  521. extern void mc417_gpio_enable(struct cx23885_dev *dev, u32 mask, int asoutput);
  522. /* ----------------------------------------------------------- */
  523. /* cx23885-alsa.c */
  524. extern struct cx23885_audio_dev *cx23885_audio_register(
  525. struct cx23885_dev *dev);
  526. extern void cx23885_audio_unregister(struct cx23885_dev *dev);
  527. extern int cx23885_audio_irq(struct cx23885_dev *dev, u32 status, u32 mask);
  528. extern int cx23885_risc_databuffer(struct pci_dev *pci,
  529. struct btcx_riscmem *risc,
  530. struct scatterlist *sglist,
  531. unsigned int bpl,
  532. unsigned int lines,
  533. unsigned int lpi);
  534. /* ----------------------------------------------------------- */
  535. /* tv norms */
  536. static inline unsigned int norm_maxw(v4l2_std_id norm)
  537. {
  538. return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 720 : 768;
  539. }
  540. static inline unsigned int norm_maxh(v4l2_std_id norm)
  541. {
  542. return (norm & V4L2_STD_625_50) ? 576 : 480;
  543. }
  544. static inline unsigned int norm_swidth(v4l2_std_id norm)
  545. {
  546. return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 754 : 922;
  547. }