ad5421.c 13 KB

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  1. /*
  2. * AD5421 Digital to analog converters driver
  3. *
  4. * Copyright 2011 Analog Devices Inc.
  5. *
  6. * Licensed under the GPL-2.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/delay.h>
  10. #include <linux/err.h>
  11. #include <linux/module.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/kernel.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/slab.h>
  16. #include <linux/sysfs.h>
  17. #include <linux/iio/iio.h>
  18. #include <linux/iio/sysfs.h>
  19. #include <linux/iio/events.h>
  20. #include <linux/iio/dac/ad5421.h>
  21. #define AD5421_REG_DAC_DATA 0x1
  22. #define AD5421_REG_CTRL 0x2
  23. #define AD5421_REG_OFFSET 0x3
  24. #define AD5421_REG_GAIN 0x4
  25. /* load dac and fault shared the same register number. Writing to it will cause
  26. * a dac load command, reading from it will return the fault status register */
  27. #define AD5421_REG_LOAD_DAC 0x5
  28. #define AD5421_REG_FAULT 0x5
  29. #define AD5421_REG_FORCE_ALARM_CURRENT 0x6
  30. #define AD5421_REG_RESET 0x7
  31. #define AD5421_REG_START_CONVERSION 0x8
  32. #define AD5421_REG_NOOP 0x9
  33. #define AD5421_CTRL_WATCHDOG_DISABLE BIT(12)
  34. #define AD5421_CTRL_AUTO_FAULT_READBACK BIT(11)
  35. #define AD5421_CTRL_MIN_CURRENT BIT(9)
  36. #define AD5421_CTRL_ADC_SOURCE_TEMP BIT(8)
  37. #define AD5421_CTRL_ADC_ENABLE BIT(7)
  38. #define AD5421_CTRL_PWR_DOWN_INT_VREF BIT(6)
  39. #define AD5421_FAULT_SPI BIT(15)
  40. #define AD5421_FAULT_PEC BIT(14)
  41. #define AD5421_FAULT_OVER_CURRENT BIT(13)
  42. #define AD5421_FAULT_UNDER_CURRENT BIT(12)
  43. #define AD5421_FAULT_TEMP_OVER_140 BIT(11)
  44. #define AD5421_FAULT_TEMP_OVER_100 BIT(10)
  45. #define AD5421_FAULT_UNDER_VOLTAGE_6V BIT(9)
  46. #define AD5421_FAULT_UNDER_VOLTAGE_12V BIT(8)
  47. /* These bits will cause the fault pin to go high */
  48. #define AD5421_FAULT_TRIGGER_IRQ \
  49. (AD5421_FAULT_SPI | AD5421_FAULT_PEC | AD5421_FAULT_OVER_CURRENT | \
  50. AD5421_FAULT_UNDER_CURRENT | AD5421_FAULT_TEMP_OVER_140)
  51. /**
  52. * struct ad5421_state - driver instance specific data
  53. * @spi: spi_device
  54. * @ctrl: control register cache
  55. * @current_range: current range which the device is configured for
  56. * @data: spi transfer buffers
  57. * @fault_mask: software masking of events
  58. */
  59. struct ad5421_state {
  60. struct spi_device *spi;
  61. unsigned int ctrl;
  62. enum ad5421_current_range current_range;
  63. unsigned int fault_mask;
  64. /*
  65. * DMA (thus cache coherency maintenance) requires the
  66. * transfer buffers to live in their own cache lines.
  67. */
  68. union {
  69. u32 d32;
  70. u8 d8[4];
  71. } data[2] ____cacheline_aligned;
  72. };
  73. static const struct iio_chan_spec ad5421_channels[] = {
  74. {
  75. .type = IIO_CURRENT,
  76. .indexed = 1,
  77. .output = 1,
  78. .channel = 0,
  79. .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
  80. IIO_CHAN_INFO_SCALE_SHARED_BIT |
  81. IIO_CHAN_INFO_OFFSET_SHARED_BIT |
  82. IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT |
  83. IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT,
  84. .scan_type = IIO_ST('u', 16, 16, 0),
  85. .event_mask = IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING) |
  86. IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING),
  87. },
  88. {
  89. .type = IIO_TEMP,
  90. .channel = -1,
  91. .event_mask = IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING),
  92. },
  93. };
  94. static int ad5421_write_unlocked(struct iio_dev *indio_dev,
  95. unsigned int reg, unsigned int val)
  96. {
  97. struct ad5421_state *st = iio_priv(indio_dev);
  98. st->data[0].d32 = cpu_to_be32((reg << 16) | val);
  99. return spi_write(st->spi, &st->data[0].d8[1], 3);
  100. }
  101. static int ad5421_write(struct iio_dev *indio_dev, unsigned int reg,
  102. unsigned int val)
  103. {
  104. int ret;
  105. mutex_lock(&indio_dev->mlock);
  106. ret = ad5421_write_unlocked(indio_dev, reg, val);
  107. mutex_unlock(&indio_dev->mlock);
  108. return ret;
  109. }
  110. static int ad5421_read(struct iio_dev *indio_dev, unsigned int reg)
  111. {
  112. struct ad5421_state *st = iio_priv(indio_dev);
  113. int ret;
  114. struct spi_transfer t[] = {
  115. {
  116. .tx_buf = &st->data[0].d8[1],
  117. .len = 3,
  118. .cs_change = 1,
  119. }, {
  120. .rx_buf = &st->data[1].d8[1],
  121. .len = 3,
  122. },
  123. };
  124. mutex_lock(&indio_dev->mlock);
  125. st->data[0].d32 = cpu_to_be32((1 << 23) | (reg << 16));
  126. ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t));
  127. if (ret >= 0)
  128. ret = be32_to_cpu(st->data[1].d32) & 0xffff;
  129. mutex_unlock(&indio_dev->mlock);
  130. return ret;
  131. }
  132. static int ad5421_update_ctrl(struct iio_dev *indio_dev, unsigned int set,
  133. unsigned int clr)
  134. {
  135. struct ad5421_state *st = iio_priv(indio_dev);
  136. unsigned int ret;
  137. mutex_lock(&indio_dev->mlock);
  138. st->ctrl &= ~clr;
  139. st->ctrl |= set;
  140. ret = ad5421_write_unlocked(indio_dev, AD5421_REG_CTRL, st->ctrl);
  141. mutex_unlock(&indio_dev->mlock);
  142. return ret;
  143. }
  144. static irqreturn_t ad5421_fault_handler(int irq, void *data)
  145. {
  146. struct iio_dev *indio_dev = data;
  147. struct ad5421_state *st = iio_priv(indio_dev);
  148. unsigned int fault;
  149. unsigned int old_fault = 0;
  150. unsigned int events;
  151. fault = ad5421_read(indio_dev, AD5421_REG_FAULT);
  152. if (!fault)
  153. return IRQ_NONE;
  154. /* If we had a fault, this might mean that the DAC has lost its state
  155. * and has been reset. Make sure that the control register actually
  156. * contains what we expect it to contain. Otherwise the watchdog might
  157. * be enabled and we get watchdog timeout faults, which will render the
  158. * DAC unusable. */
  159. ad5421_update_ctrl(indio_dev, 0, 0);
  160. /* The fault pin stays high as long as a fault condition is present and
  161. * it is not possible to mask fault conditions. For certain fault
  162. * conditions for example like over-temperature it takes some time
  163. * until the fault condition disappears. If we would exit the interrupt
  164. * handler immediately after handling the event it would be entered
  165. * again instantly. Thus we fall back to polling in case we detect that
  166. * a interrupt condition is still present.
  167. */
  168. do {
  169. /* 0xffff is a invalid value for the register and will only be
  170. * read if there has been a communication error */
  171. if (fault == 0xffff)
  172. fault = 0;
  173. /* we are only interested in new events */
  174. events = (old_fault ^ fault) & fault;
  175. events &= st->fault_mask;
  176. if (events & AD5421_FAULT_OVER_CURRENT) {
  177. iio_push_event(indio_dev,
  178. IIO_UNMOD_EVENT_CODE(IIO_CURRENT,
  179. 0,
  180. IIO_EV_TYPE_THRESH,
  181. IIO_EV_DIR_RISING),
  182. iio_get_time_ns());
  183. }
  184. if (events & AD5421_FAULT_UNDER_CURRENT) {
  185. iio_push_event(indio_dev,
  186. IIO_UNMOD_EVENT_CODE(IIO_CURRENT,
  187. 0,
  188. IIO_EV_TYPE_THRESH,
  189. IIO_EV_DIR_FALLING),
  190. iio_get_time_ns());
  191. }
  192. if (events & AD5421_FAULT_TEMP_OVER_140) {
  193. iio_push_event(indio_dev,
  194. IIO_UNMOD_EVENT_CODE(IIO_TEMP,
  195. 0,
  196. IIO_EV_TYPE_MAG,
  197. IIO_EV_DIR_RISING),
  198. iio_get_time_ns());
  199. }
  200. old_fault = fault;
  201. fault = ad5421_read(indio_dev, AD5421_REG_FAULT);
  202. /* still active? go to sleep for some time */
  203. if (fault & AD5421_FAULT_TRIGGER_IRQ)
  204. msleep(1000);
  205. } while (fault & AD5421_FAULT_TRIGGER_IRQ);
  206. return IRQ_HANDLED;
  207. }
  208. static void ad5421_get_current_min_max(struct ad5421_state *st,
  209. unsigned int *min, unsigned int *max)
  210. {
  211. /* The current range is configured using external pins, which are
  212. * usually hard-wired and not run-time switchable. */
  213. switch (st->current_range) {
  214. case AD5421_CURRENT_RANGE_4mA_20mA:
  215. *min = 4000;
  216. *max = 20000;
  217. break;
  218. case AD5421_CURRENT_RANGE_3mA8_21mA:
  219. *min = 3800;
  220. *max = 21000;
  221. break;
  222. case AD5421_CURRENT_RANGE_3mA2_24mA:
  223. *min = 3200;
  224. *max = 24000;
  225. break;
  226. default:
  227. *min = 0;
  228. *max = 1;
  229. break;
  230. }
  231. }
  232. static inline unsigned int ad5421_get_offset(struct ad5421_state *st)
  233. {
  234. unsigned int min, max;
  235. ad5421_get_current_min_max(st, &min, &max);
  236. return (min * (1 << 16)) / (max - min);
  237. }
  238. static inline unsigned int ad5421_get_scale(struct ad5421_state *st)
  239. {
  240. unsigned int min, max;
  241. ad5421_get_current_min_max(st, &min, &max);
  242. return ((max - min) * 1000) / (1 << 16);
  243. }
  244. static int ad5421_read_raw(struct iio_dev *indio_dev,
  245. struct iio_chan_spec const *chan, int *val, int *val2, long m)
  246. {
  247. struct ad5421_state *st = iio_priv(indio_dev);
  248. int ret;
  249. if (chan->type != IIO_CURRENT)
  250. return -EINVAL;
  251. switch (m) {
  252. case IIO_CHAN_INFO_RAW:
  253. ret = ad5421_read(indio_dev, AD5421_REG_DAC_DATA);
  254. if (ret < 0)
  255. return ret;
  256. *val = ret;
  257. return IIO_VAL_INT;
  258. case IIO_CHAN_INFO_SCALE:
  259. *val = 0;
  260. *val2 = ad5421_get_scale(st);
  261. return IIO_VAL_INT_PLUS_MICRO;
  262. case IIO_CHAN_INFO_OFFSET:
  263. *val = ad5421_get_offset(st);
  264. return IIO_VAL_INT;
  265. case IIO_CHAN_INFO_CALIBBIAS:
  266. ret = ad5421_read(indio_dev, AD5421_REG_OFFSET);
  267. if (ret < 0)
  268. return ret;
  269. *val = ret - 32768;
  270. return IIO_VAL_INT;
  271. case IIO_CHAN_INFO_CALIBSCALE:
  272. ret = ad5421_read(indio_dev, AD5421_REG_GAIN);
  273. if (ret < 0)
  274. return ret;
  275. *val = ret;
  276. return IIO_VAL_INT;
  277. }
  278. return -EINVAL;
  279. }
  280. static int ad5421_write_raw(struct iio_dev *indio_dev,
  281. struct iio_chan_spec const *chan, int val, int val2, long mask)
  282. {
  283. const unsigned int max_val = 1 << 16;
  284. switch (mask) {
  285. case IIO_CHAN_INFO_RAW:
  286. if (val >= max_val || val < 0)
  287. return -EINVAL;
  288. return ad5421_write(indio_dev, AD5421_REG_DAC_DATA, val);
  289. case IIO_CHAN_INFO_CALIBBIAS:
  290. val += 32768;
  291. if (val >= max_val || val < 0)
  292. return -EINVAL;
  293. return ad5421_write(indio_dev, AD5421_REG_OFFSET, val);
  294. case IIO_CHAN_INFO_CALIBSCALE:
  295. if (val >= max_val || val < 0)
  296. return -EINVAL;
  297. return ad5421_write(indio_dev, AD5421_REG_GAIN, val);
  298. default:
  299. break;
  300. }
  301. return -EINVAL;
  302. }
  303. static int ad5421_write_event_config(struct iio_dev *indio_dev,
  304. u64 event_code, int state)
  305. {
  306. struct ad5421_state *st = iio_priv(indio_dev);
  307. unsigned int mask;
  308. switch (IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(event_code)) {
  309. case IIO_CURRENT:
  310. if (IIO_EVENT_CODE_EXTRACT_DIR(event_code) ==
  311. IIO_EV_DIR_RISING)
  312. mask = AD5421_FAULT_OVER_CURRENT;
  313. else
  314. mask = AD5421_FAULT_UNDER_CURRENT;
  315. break;
  316. case IIO_TEMP:
  317. mask = AD5421_FAULT_TEMP_OVER_140;
  318. break;
  319. default:
  320. return -EINVAL;
  321. }
  322. mutex_lock(&indio_dev->mlock);
  323. if (state)
  324. st->fault_mask |= mask;
  325. else
  326. st->fault_mask &= ~mask;
  327. mutex_unlock(&indio_dev->mlock);
  328. return 0;
  329. }
  330. static int ad5421_read_event_config(struct iio_dev *indio_dev,
  331. u64 event_code)
  332. {
  333. struct ad5421_state *st = iio_priv(indio_dev);
  334. unsigned int mask;
  335. switch (IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(event_code)) {
  336. case IIO_CURRENT:
  337. if (IIO_EVENT_CODE_EXTRACT_DIR(event_code) ==
  338. IIO_EV_DIR_RISING)
  339. mask = AD5421_FAULT_OVER_CURRENT;
  340. else
  341. mask = AD5421_FAULT_UNDER_CURRENT;
  342. break;
  343. case IIO_TEMP:
  344. mask = AD5421_FAULT_TEMP_OVER_140;
  345. break;
  346. default:
  347. return -EINVAL;
  348. }
  349. return (bool)(st->fault_mask & mask);
  350. }
  351. static int ad5421_read_event_value(struct iio_dev *indio_dev, u64 event_code,
  352. int *val)
  353. {
  354. int ret;
  355. switch (IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(event_code)) {
  356. case IIO_CURRENT:
  357. ret = ad5421_read(indio_dev, AD5421_REG_DAC_DATA);
  358. if (ret < 0)
  359. return ret;
  360. *val = ret;
  361. break;
  362. case IIO_TEMP:
  363. *val = 140000;
  364. break;
  365. default:
  366. return -EINVAL;
  367. }
  368. return 0;
  369. }
  370. static const struct iio_info ad5421_info = {
  371. .read_raw = ad5421_read_raw,
  372. .write_raw = ad5421_write_raw,
  373. .read_event_config = ad5421_read_event_config,
  374. .write_event_config = ad5421_write_event_config,
  375. .read_event_value = ad5421_read_event_value,
  376. .driver_module = THIS_MODULE,
  377. };
  378. static int ad5421_probe(struct spi_device *spi)
  379. {
  380. struct ad5421_platform_data *pdata = dev_get_platdata(&spi->dev);
  381. struct iio_dev *indio_dev;
  382. struct ad5421_state *st;
  383. int ret;
  384. indio_dev = iio_device_alloc(sizeof(*st));
  385. if (indio_dev == NULL) {
  386. dev_err(&spi->dev, "Failed to allocate iio device\n");
  387. return -ENOMEM;
  388. }
  389. st = iio_priv(indio_dev);
  390. spi_set_drvdata(spi, indio_dev);
  391. st->spi = spi;
  392. indio_dev->dev.parent = &spi->dev;
  393. indio_dev->name = "ad5421";
  394. indio_dev->info = &ad5421_info;
  395. indio_dev->modes = INDIO_DIRECT_MODE;
  396. indio_dev->channels = ad5421_channels;
  397. indio_dev->num_channels = ARRAY_SIZE(ad5421_channels);
  398. st->ctrl = AD5421_CTRL_WATCHDOG_DISABLE |
  399. AD5421_CTRL_AUTO_FAULT_READBACK;
  400. if (pdata) {
  401. st->current_range = pdata->current_range;
  402. if (pdata->external_vref)
  403. st->ctrl |= AD5421_CTRL_PWR_DOWN_INT_VREF;
  404. } else {
  405. st->current_range = AD5421_CURRENT_RANGE_4mA_20mA;
  406. }
  407. /* write initial ctrl register value */
  408. ad5421_update_ctrl(indio_dev, 0, 0);
  409. if (spi->irq) {
  410. ret = request_threaded_irq(spi->irq,
  411. NULL,
  412. ad5421_fault_handler,
  413. IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
  414. "ad5421 fault",
  415. indio_dev);
  416. if (ret)
  417. goto error_free;
  418. }
  419. ret = iio_device_register(indio_dev);
  420. if (ret) {
  421. dev_err(&spi->dev, "Failed to register iio device: %d\n", ret);
  422. goto error_free_irq;
  423. }
  424. return 0;
  425. error_free_irq:
  426. if (spi->irq)
  427. free_irq(spi->irq, indio_dev);
  428. error_free:
  429. iio_device_free(indio_dev);
  430. return ret;
  431. }
  432. static int ad5421_remove(struct spi_device *spi)
  433. {
  434. struct iio_dev *indio_dev = spi_get_drvdata(spi);
  435. iio_device_unregister(indio_dev);
  436. if (spi->irq)
  437. free_irq(spi->irq, indio_dev);
  438. iio_device_free(indio_dev);
  439. return 0;
  440. }
  441. static struct spi_driver ad5421_driver = {
  442. .driver = {
  443. .name = "ad5421",
  444. .owner = THIS_MODULE,
  445. },
  446. .probe = ad5421_probe,
  447. .remove = ad5421_remove,
  448. };
  449. module_spi_driver(ad5421_driver);
  450. MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
  451. MODULE_DESCRIPTION("Analog Devices AD5421 DAC");
  452. MODULE_LICENSE("GPL v2");
  453. MODULE_ALIAS("spi:ad5421");