ad5064.c 16 KB

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  1. /*
  2. * AD5024, AD5025, AD5044, AD5045, AD5064, AD5064-1, AD5065, AD5628, AD5629R,
  3. * AD5648, AD5666, AD5668, AD5669R Digital to analog converters driver
  4. *
  5. * Copyright 2011 Analog Devices Inc.
  6. *
  7. * Licensed under the GPL-2.
  8. */
  9. #include <linux/device.h>
  10. #include <linux/err.h>
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/i2c.h>
  15. #include <linux/slab.h>
  16. #include <linux/sysfs.h>
  17. #include <linux/regulator/consumer.h>
  18. #include <asm/unaligned.h>
  19. #include <linux/iio/iio.h>
  20. #include <linux/iio/sysfs.h>
  21. #define AD5064_MAX_DAC_CHANNELS 8
  22. #define AD5064_MAX_VREFS 4
  23. #define AD5064_ADDR(x) ((x) << 20)
  24. #define AD5064_CMD(x) ((x) << 24)
  25. #define AD5064_ADDR_DAC(chan) (chan)
  26. #define AD5064_ADDR_ALL_DAC 0xF
  27. #define AD5064_CMD_WRITE_INPUT_N 0x0
  28. #define AD5064_CMD_UPDATE_DAC_N 0x1
  29. #define AD5064_CMD_WRITE_INPUT_N_UPDATE_ALL 0x2
  30. #define AD5064_CMD_WRITE_INPUT_N_UPDATE_N 0x3
  31. #define AD5064_CMD_POWERDOWN_DAC 0x4
  32. #define AD5064_CMD_CLEAR 0x5
  33. #define AD5064_CMD_LDAC_MASK 0x6
  34. #define AD5064_CMD_RESET 0x7
  35. #define AD5064_CMD_CONFIG 0x8
  36. #define AD5064_CONFIG_DAISY_CHAIN_ENABLE BIT(1)
  37. #define AD5064_CONFIG_INT_VREF_ENABLE BIT(0)
  38. #define AD5064_LDAC_PWRDN_NONE 0x0
  39. #define AD5064_LDAC_PWRDN_1K 0x1
  40. #define AD5064_LDAC_PWRDN_100K 0x2
  41. #define AD5064_LDAC_PWRDN_3STATE 0x3
  42. /**
  43. * struct ad5064_chip_info - chip specific information
  44. * @shared_vref: whether the vref supply is shared between channels
  45. * @internal_vref: internal reference voltage. 0 if the chip has no internal
  46. * vref.
  47. * @channel: channel specification
  48. * @num_channels: number of channels
  49. */
  50. struct ad5064_chip_info {
  51. bool shared_vref;
  52. unsigned long internal_vref;
  53. const struct iio_chan_spec *channels;
  54. unsigned int num_channels;
  55. };
  56. struct ad5064_state;
  57. typedef int (*ad5064_write_func)(struct ad5064_state *st, unsigned int cmd,
  58. unsigned int addr, unsigned int val);
  59. /**
  60. * struct ad5064_state - driver instance specific data
  61. * @dev: the device for this driver instance
  62. * @chip_info: chip model specific constants, available modes etc
  63. * @vref_reg: vref supply regulators
  64. * @pwr_down: whether channel is powered down
  65. * @pwr_down_mode: channel's current power down mode
  66. * @dac_cache: current DAC raw value (chip does not support readback)
  67. * @use_internal_vref: set to true if the internal reference voltage should be
  68. * used.
  69. * @write: register write callback
  70. * @data: i2c/spi transfer buffers
  71. */
  72. struct ad5064_state {
  73. struct device *dev;
  74. const struct ad5064_chip_info *chip_info;
  75. struct regulator_bulk_data vref_reg[AD5064_MAX_VREFS];
  76. bool pwr_down[AD5064_MAX_DAC_CHANNELS];
  77. u8 pwr_down_mode[AD5064_MAX_DAC_CHANNELS];
  78. unsigned int dac_cache[AD5064_MAX_DAC_CHANNELS];
  79. bool use_internal_vref;
  80. ad5064_write_func write;
  81. /*
  82. * DMA (thus cache coherency maintenance) requires the
  83. * transfer buffers to live in their own cache lines.
  84. */
  85. union {
  86. u8 i2c[3];
  87. __be32 spi;
  88. } data ____cacheline_aligned;
  89. };
  90. enum ad5064_type {
  91. ID_AD5024,
  92. ID_AD5025,
  93. ID_AD5044,
  94. ID_AD5045,
  95. ID_AD5064,
  96. ID_AD5064_1,
  97. ID_AD5065,
  98. ID_AD5628_1,
  99. ID_AD5628_2,
  100. ID_AD5648_1,
  101. ID_AD5648_2,
  102. ID_AD5666_1,
  103. ID_AD5666_2,
  104. ID_AD5668_1,
  105. ID_AD5668_2,
  106. };
  107. static int ad5064_write(struct ad5064_state *st, unsigned int cmd,
  108. unsigned int addr, unsigned int val, unsigned int shift)
  109. {
  110. val <<= shift;
  111. return st->write(st, cmd, addr, val);
  112. }
  113. static int ad5064_sync_powerdown_mode(struct ad5064_state *st,
  114. unsigned int channel)
  115. {
  116. unsigned int val;
  117. int ret;
  118. val = (0x1 << channel);
  119. if (st->pwr_down[channel])
  120. val |= st->pwr_down_mode[channel] << 8;
  121. ret = ad5064_write(st, AD5064_CMD_POWERDOWN_DAC, 0, val, 0);
  122. return ret;
  123. }
  124. static const char * const ad5064_powerdown_modes[] = {
  125. "1kohm_to_gnd",
  126. "100kohm_to_gnd",
  127. "three_state",
  128. };
  129. static int ad5064_get_powerdown_mode(struct iio_dev *indio_dev,
  130. const struct iio_chan_spec *chan)
  131. {
  132. struct ad5064_state *st = iio_priv(indio_dev);
  133. return st->pwr_down_mode[chan->channel] - 1;
  134. }
  135. static int ad5064_set_powerdown_mode(struct iio_dev *indio_dev,
  136. const struct iio_chan_spec *chan, unsigned int mode)
  137. {
  138. struct ad5064_state *st = iio_priv(indio_dev);
  139. int ret;
  140. mutex_lock(&indio_dev->mlock);
  141. st->pwr_down_mode[chan->channel] = mode + 1;
  142. ret = ad5064_sync_powerdown_mode(st, chan->channel);
  143. mutex_unlock(&indio_dev->mlock);
  144. return ret;
  145. }
  146. static const struct iio_enum ad5064_powerdown_mode_enum = {
  147. .items = ad5064_powerdown_modes,
  148. .num_items = ARRAY_SIZE(ad5064_powerdown_modes),
  149. .get = ad5064_get_powerdown_mode,
  150. .set = ad5064_set_powerdown_mode,
  151. };
  152. static ssize_t ad5064_read_dac_powerdown(struct iio_dev *indio_dev,
  153. uintptr_t private, const struct iio_chan_spec *chan, char *buf)
  154. {
  155. struct ad5064_state *st = iio_priv(indio_dev);
  156. return sprintf(buf, "%d\n", st->pwr_down[chan->channel]);
  157. }
  158. static ssize_t ad5064_write_dac_powerdown(struct iio_dev *indio_dev,
  159. uintptr_t private, const struct iio_chan_spec *chan, const char *buf,
  160. size_t len)
  161. {
  162. struct ad5064_state *st = iio_priv(indio_dev);
  163. bool pwr_down;
  164. int ret;
  165. ret = strtobool(buf, &pwr_down);
  166. if (ret)
  167. return ret;
  168. mutex_lock(&indio_dev->mlock);
  169. st->pwr_down[chan->channel] = pwr_down;
  170. ret = ad5064_sync_powerdown_mode(st, chan->channel);
  171. mutex_unlock(&indio_dev->mlock);
  172. return ret ? ret : len;
  173. }
  174. static int ad5064_get_vref(struct ad5064_state *st,
  175. struct iio_chan_spec const *chan)
  176. {
  177. unsigned int i;
  178. if (st->use_internal_vref)
  179. return st->chip_info->internal_vref;
  180. i = st->chip_info->shared_vref ? 0 : chan->channel;
  181. return regulator_get_voltage(st->vref_reg[i].consumer);
  182. }
  183. static int ad5064_read_raw(struct iio_dev *indio_dev,
  184. struct iio_chan_spec const *chan,
  185. int *val,
  186. int *val2,
  187. long m)
  188. {
  189. struct ad5064_state *st = iio_priv(indio_dev);
  190. int scale_uv;
  191. switch (m) {
  192. case IIO_CHAN_INFO_RAW:
  193. *val = st->dac_cache[chan->channel];
  194. return IIO_VAL_INT;
  195. case IIO_CHAN_INFO_SCALE:
  196. scale_uv = ad5064_get_vref(st, chan);
  197. if (scale_uv < 0)
  198. return scale_uv;
  199. scale_uv = (scale_uv * 100) >> chan->scan_type.realbits;
  200. *val = scale_uv / 100000;
  201. *val2 = (scale_uv % 100000) * 10;
  202. return IIO_VAL_INT_PLUS_MICRO;
  203. default:
  204. break;
  205. }
  206. return -EINVAL;
  207. }
  208. static int ad5064_write_raw(struct iio_dev *indio_dev,
  209. struct iio_chan_spec const *chan, int val, int val2, long mask)
  210. {
  211. struct ad5064_state *st = iio_priv(indio_dev);
  212. int ret;
  213. switch (mask) {
  214. case IIO_CHAN_INFO_RAW:
  215. if (val > (1 << chan->scan_type.realbits) || val < 0)
  216. return -EINVAL;
  217. mutex_lock(&indio_dev->mlock);
  218. ret = ad5064_write(st, AD5064_CMD_WRITE_INPUT_N_UPDATE_N,
  219. chan->address, val, chan->scan_type.shift);
  220. if (ret == 0)
  221. st->dac_cache[chan->channel] = val;
  222. mutex_unlock(&indio_dev->mlock);
  223. break;
  224. default:
  225. ret = -EINVAL;
  226. }
  227. return ret;
  228. }
  229. static const struct iio_info ad5064_info = {
  230. .read_raw = ad5064_read_raw,
  231. .write_raw = ad5064_write_raw,
  232. .driver_module = THIS_MODULE,
  233. };
  234. static const struct iio_chan_spec_ext_info ad5064_ext_info[] = {
  235. {
  236. .name = "powerdown",
  237. .read = ad5064_read_dac_powerdown,
  238. .write = ad5064_write_dac_powerdown,
  239. },
  240. IIO_ENUM("powerdown_mode", false, &ad5064_powerdown_mode_enum),
  241. IIO_ENUM_AVAILABLE("powerdown_mode", &ad5064_powerdown_mode_enum),
  242. { },
  243. };
  244. #define AD5064_CHANNEL(chan, bits) { \
  245. .type = IIO_VOLTAGE, \
  246. .indexed = 1, \
  247. .output = 1, \
  248. .channel = (chan), \
  249. .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \
  250. IIO_CHAN_INFO_SCALE_SEPARATE_BIT, \
  251. .address = AD5064_ADDR_DAC(chan), \
  252. .scan_type = IIO_ST('u', (bits), 16, 20 - (bits)), \
  253. .ext_info = ad5064_ext_info, \
  254. }
  255. #define DECLARE_AD5064_CHANNELS(name, bits) \
  256. const struct iio_chan_spec name[] = { \
  257. AD5064_CHANNEL(0, bits), \
  258. AD5064_CHANNEL(1, bits), \
  259. AD5064_CHANNEL(2, bits), \
  260. AD5064_CHANNEL(3, bits), \
  261. AD5064_CHANNEL(4, bits), \
  262. AD5064_CHANNEL(5, bits), \
  263. AD5064_CHANNEL(6, bits), \
  264. AD5064_CHANNEL(7, bits), \
  265. }
  266. static DECLARE_AD5064_CHANNELS(ad5024_channels, 12);
  267. static DECLARE_AD5064_CHANNELS(ad5044_channels, 14);
  268. static DECLARE_AD5064_CHANNELS(ad5064_channels, 16);
  269. static const struct ad5064_chip_info ad5064_chip_info_tbl[] = {
  270. [ID_AD5024] = {
  271. .shared_vref = false,
  272. .channels = ad5024_channels,
  273. .num_channels = 4,
  274. },
  275. [ID_AD5025] = {
  276. .shared_vref = false,
  277. .channels = ad5024_channels,
  278. .num_channels = 2,
  279. },
  280. [ID_AD5044] = {
  281. .shared_vref = false,
  282. .channels = ad5044_channels,
  283. .num_channels = 4,
  284. },
  285. [ID_AD5045] = {
  286. .shared_vref = false,
  287. .channels = ad5044_channels,
  288. .num_channels = 2,
  289. },
  290. [ID_AD5064] = {
  291. .shared_vref = false,
  292. .channels = ad5064_channels,
  293. .num_channels = 4,
  294. },
  295. [ID_AD5064_1] = {
  296. .shared_vref = true,
  297. .channels = ad5064_channels,
  298. .num_channels = 4,
  299. },
  300. [ID_AD5065] = {
  301. .shared_vref = false,
  302. .channels = ad5064_channels,
  303. .num_channels = 2,
  304. },
  305. [ID_AD5628_1] = {
  306. .shared_vref = true,
  307. .internal_vref = 2500000,
  308. .channels = ad5024_channels,
  309. .num_channels = 8,
  310. },
  311. [ID_AD5628_2] = {
  312. .shared_vref = true,
  313. .internal_vref = 5000000,
  314. .channels = ad5024_channels,
  315. .num_channels = 8,
  316. },
  317. [ID_AD5648_1] = {
  318. .shared_vref = true,
  319. .internal_vref = 2500000,
  320. .channels = ad5044_channels,
  321. .num_channels = 8,
  322. },
  323. [ID_AD5648_2] = {
  324. .shared_vref = true,
  325. .internal_vref = 5000000,
  326. .channels = ad5044_channels,
  327. .num_channels = 8,
  328. },
  329. [ID_AD5666_1] = {
  330. .shared_vref = true,
  331. .internal_vref = 2500000,
  332. .channels = ad5064_channels,
  333. .num_channels = 4,
  334. },
  335. [ID_AD5666_2] = {
  336. .shared_vref = true,
  337. .internal_vref = 5000000,
  338. .channels = ad5064_channels,
  339. .num_channels = 4,
  340. },
  341. [ID_AD5668_1] = {
  342. .shared_vref = true,
  343. .internal_vref = 2500000,
  344. .channels = ad5064_channels,
  345. .num_channels = 8,
  346. },
  347. [ID_AD5668_2] = {
  348. .shared_vref = true,
  349. .internal_vref = 5000000,
  350. .channels = ad5064_channels,
  351. .num_channels = 8,
  352. },
  353. };
  354. static inline unsigned int ad5064_num_vref(struct ad5064_state *st)
  355. {
  356. return st->chip_info->shared_vref ? 1 : st->chip_info->num_channels;
  357. }
  358. static const char * const ad5064_vref_names[] = {
  359. "vrefA",
  360. "vrefB",
  361. "vrefC",
  362. "vrefD",
  363. };
  364. static const char * const ad5064_vref_name(struct ad5064_state *st,
  365. unsigned int vref)
  366. {
  367. return st->chip_info->shared_vref ? "vref" : ad5064_vref_names[vref];
  368. }
  369. static int ad5064_probe(struct device *dev, enum ad5064_type type,
  370. const char *name, ad5064_write_func write)
  371. {
  372. struct iio_dev *indio_dev;
  373. struct ad5064_state *st;
  374. unsigned int i;
  375. int ret;
  376. indio_dev = iio_device_alloc(sizeof(*st));
  377. if (indio_dev == NULL)
  378. return -ENOMEM;
  379. st = iio_priv(indio_dev);
  380. dev_set_drvdata(dev, indio_dev);
  381. st->chip_info = &ad5064_chip_info_tbl[type];
  382. st->dev = dev;
  383. st->write = write;
  384. for (i = 0; i < ad5064_num_vref(st); ++i)
  385. st->vref_reg[i].supply = ad5064_vref_name(st, i);
  386. ret = regulator_bulk_get(dev, ad5064_num_vref(st),
  387. st->vref_reg);
  388. if (ret) {
  389. if (!st->chip_info->internal_vref)
  390. goto error_free;
  391. st->use_internal_vref = true;
  392. ret = ad5064_write(st, AD5064_CMD_CONFIG, 0,
  393. AD5064_CONFIG_INT_VREF_ENABLE, 0);
  394. if (ret) {
  395. dev_err(dev, "Failed to enable internal vref: %d\n",
  396. ret);
  397. goto error_free;
  398. }
  399. } else {
  400. ret = regulator_bulk_enable(ad5064_num_vref(st), st->vref_reg);
  401. if (ret)
  402. goto error_free_reg;
  403. }
  404. for (i = 0; i < st->chip_info->num_channels; ++i) {
  405. st->pwr_down_mode[i] = AD5064_LDAC_PWRDN_1K;
  406. st->dac_cache[i] = 0x8000;
  407. }
  408. indio_dev->dev.parent = dev;
  409. indio_dev->name = name;
  410. indio_dev->info = &ad5064_info;
  411. indio_dev->modes = INDIO_DIRECT_MODE;
  412. indio_dev->channels = st->chip_info->channels;
  413. indio_dev->num_channels = st->chip_info->num_channels;
  414. ret = iio_device_register(indio_dev);
  415. if (ret)
  416. goto error_disable_reg;
  417. return 0;
  418. error_disable_reg:
  419. if (!st->use_internal_vref)
  420. regulator_bulk_disable(ad5064_num_vref(st), st->vref_reg);
  421. error_free_reg:
  422. if (!st->use_internal_vref)
  423. regulator_bulk_free(ad5064_num_vref(st), st->vref_reg);
  424. error_free:
  425. iio_device_free(indio_dev);
  426. return ret;
  427. }
  428. static int ad5064_remove(struct device *dev)
  429. {
  430. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  431. struct ad5064_state *st = iio_priv(indio_dev);
  432. iio_device_unregister(indio_dev);
  433. if (!st->use_internal_vref) {
  434. regulator_bulk_disable(ad5064_num_vref(st), st->vref_reg);
  435. regulator_bulk_free(ad5064_num_vref(st), st->vref_reg);
  436. }
  437. iio_device_free(indio_dev);
  438. return 0;
  439. }
  440. #if IS_ENABLED(CONFIG_SPI_MASTER)
  441. static int ad5064_spi_write(struct ad5064_state *st, unsigned int cmd,
  442. unsigned int addr, unsigned int val)
  443. {
  444. struct spi_device *spi = to_spi_device(st->dev);
  445. st->data.spi = cpu_to_be32(AD5064_CMD(cmd) | AD5064_ADDR(addr) | val);
  446. return spi_write(spi, &st->data.spi, sizeof(st->data.spi));
  447. }
  448. static int ad5064_spi_probe(struct spi_device *spi)
  449. {
  450. const struct spi_device_id *id = spi_get_device_id(spi);
  451. return ad5064_probe(&spi->dev, id->driver_data, id->name,
  452. ad5064_spi_write);
  453. }
  454. static int ad5064_spi_remove(struct spi_device *spi)
  455. {
  456. return ad5064_remove(&spi->dev);
  457. }
  458. static const struct spi_device_id ad5064_spi_ids[] = {
  459. {"ad5024", ID_AD5024},
  460. {"ad5025", ID_AD5025},
  461. {"ad5044", ID_AD5044},
  462. {"ad5045", ID_AD5045},
  463. {"ad5064", ID_AD5064},
  464. {"ad5064-1", ID_AD5064_1},
  465. {"ad5065", ID_AD5065},
  466. {"ad5628-1", ID_AD5628_1},
  467. {"ad5628-2", ID_AD5628_2},
  468. {"ad5648-1", ID_AD5648_1},
  469. {"ad5648-2", ID_AD5648_2},
  470. {"ad5666-1", ID_AD5666_1},
  471. {"ad5666-2", ID_AD5666_2},
  472. {"ad5668-1", ID_AD5668_1},
  473. {"ad5668-2", ID_AD5668_2},
  474. {"ad5668-3", ID_AD5668_2}, /* similar enough to ad5668-2 */
  475. {}
  476. };
  477. MODULE_DEVICE_TABLE(spi, ad5064_spi_ids);
  478. static struct spi_driver ad5064_spi_driver = {
  479. .driver = {
  480. .name = "ad5064",
  481. .owner = THIS_MODULE,
  482. },
  483. .probe = ad5064_spi_probe,
  484. .remove = ad5064_spi_remove,
  485. .id_table = ad5064_spi_ids,
  486. };
  487. static int __init ad5064_spi_register_driver(void)
  488. {
  489. return spi_register_driver(&ad5064_spi_driver);
  490. }
  491. static void ad5064_spi_unregister_driver(void)
  492. {
  493. spi_unregister_driver(&ad5064_spi_driver);
  494. }
  495. #else
  496. static inline int ad5064_spi_register_driver(void) { return 0; }
  497. static inline void ad5064_spi_unregister_driver(void) { }
  498. #endif
  499. #if IS_ENABLED(CONFIG_I2C)
  500. static int ad5064_i2c_write(struct ad5064_state *st, unsigned int cmd,
  501. unsigned int addr, unsigned int val)
  502. {
  503. struct i2c_client *i2c = to_i2c_client(st->dev);
  504. st->data.i2c[0] = (cmd << 4) | addr;
  505. put_unaligned_be16(val, &st->data.i2c[1]);
  506. return i2c_master_send(i2c, st->data.i2c, 3);
  507. }
  508. static int ad5064_i2c_probe(struct i2c_client *i2c,
  509. const struct i2c_device_id *id)
  510. {
  511. return ad5064_probe(&i2c->dev, id->driver_data, id->name,
  512. ad5064_i2c_write);
  513. }
  514. static int ad5064_i2c_remove(struct i2c_client *i2c)
  515. {
  516. return ad5064_remove(&i2c->dev);
  517. }
  518. static const struct i2c_device_id ad5064_i2c_ids[] = {
  519. {"ad5629-1", ID_AD5628_1},
  520. {"ad5629-2", ID_AD5628_2},
  521. {"ad5629-3", ID_AD5628_2}, /* similar enough to ad5629-2 */
  522. {"ad5669-1", ID_AD5668_1},
  523. {"ad5669-2", ID_AD5668_2},
  524. {"ad5669-3", ID_AD5668_2}, /* similar enough to ad5669-2 */
  525. {}
  526. };
  527. MODULE_DEVICE_TABLE(i2c, ad5064_i2c_ids);
  528. static struct i2c_driver ad5064_i2c_driver = {
  529. .driver = {
  530. .name = "ad5064",
  531. .owner = THIS_MODULE,
  532. },
  533. .probe = ad5064_i2c_probe,
  534. .remove = ad5064_i2c_remove,
  535. .id_table = ad5064_i2c_ids,
  536. };
  537. static int __init ad5064_i2c_register_driver(void)
  538. {
  539. return i2c_add_driver(&ad5064_i2c_driver);
  540. }
  541. static void __exit ad5064_i2c_unregister_driver(void)
  542. {
  543. i2c_del_driver(&ad5064_i2c_driver);
  544. }
  545. #else
  546. static inline int ad5064_i2c_register_driver(void) { return 0; }
  547. static inline void ad5064_i2c_unregister_driver(void) { }
  548. #endif
  549. static int __init ad5064_init(void)
  550. {
  551. int ret;
  552. ret = ad5064_spi_register_driver();
  553. if (ret)
  554. return ret;
  555. ret = ad5064_i2c_register_driver();
  556. if (ret) {
  557. ad5064_spi_unregister_driver();
  558. return ret;
  559. }
  560. return 0;
  561. }
  562. module_init(ad5064_init);
  563. static void __exit ad5064_exit(void)
  564. {
  565. ad5064_i2c_unregister_driver();
  566. ad5064_spi_unregister_driver();
  567. }
  568. module_exit(ad5064_exit);
  569. MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
  570. MODULE_DESCRIPTION("Analog Devices AD5024 and similar multi-channel DACs");
  571. MODULE_LICENSE("GPL v2");