processor_idle.c 31 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247
  1. /*
  2. * processor_idle - idle state submodule to the ACPI processor driver
  3. *
  4. * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
  5. * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
  6. * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
  7. * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
  8. * - Added processor hotplug support
  9. * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
  10. * - Added support for C3 on SMP
  11. *
  12. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or (at
  17. * your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful, but
  20. * WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  22. * General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License along
  25. * with this program; if not, write to the Free Software Foundation, Inc.,
  26. * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  27. *
  28. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  29. */
  30. #include <linux/module.h>
  31. #include <linux/acpi.h>
  32. #include <linux/dmi.h>
  33. #include <linux/sched.h> /* need_resched() */
  34. #include <linux/clockchips.h>
  35. #include <linux/cpuidle.h>
  36. /*
  37. * Include the apic definitions for x86 to have the APIC timer related defines
  38. * available also for UP (on SMP it gets magically included via linux/smp.h).
  39. * asm/acpi.h is not an option, as it would require more include magic. Also
  40. * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
  41. */
  42. #ifdef CONFIG_X86
  43. #include <asm/apic.h>
  44. #endif
  45. #include <acpi/acpi_bus.h>
  46. #include <acpi/processor.h>
  47. #define PREFIX "ACPI: "
  48. #define ACPI_PROCESSOR_CLASS "processor"
  49. #define _COMPONENT ACPI_PROCESSOR_COMPONENT
  50. ACPI_MODULE_NAME("processor_idle");
  51. static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
  52. module_param(max_cstate, uint, 0000);
  53. static unsigned int nocst __read_mostly;
  54. module_param(nocst, uint, 0000);
  55. static int bm_check_disable __read_mostly;
  56. module_param(bm_check_disable, uint, 0000);
  57. static unsigned int latency_factor __read_mostly = 2;
  58. module_param(latency_factor, uint, 0644);
  59. static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device);
  60. static struct acpi_processor_cx *acpi_cstate[CPUIDLE_STATE_MAX];
  61. static int disabled_by_idle_boot_param(void)
  62. {
  63. return boot_option_idle_override == IDLE_POLL ||
  64. boot_option_idle_override == IDLE_HALT;
  65. }
  66. /*
  67. * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
  68. * For now disable this. Probably a bug somewhere else.
  69. *
  70. * To skip this limit, boot/load with a large max_cstate limit.
  71. */
  72. static int set_max_cstate(const struct dmi_system_id *id)
  73. {
  74. if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
  75. return 0;
  76. printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
  77. " Override with \"processor.max_cstate=%d\"\n", id->ident,
  78. (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
  79. max_cstate = (long)id->driver_data;
  80. return 0;
  81. }
  82. /* Actually this shouldn't be __cpuinitdata, would be better to fix the
  83. callers to only run once -AK */
  84. static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
  85. { set_max_cstate, "Clevo 5600D", {
  86. DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
  87. DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
  88. (void *)2},
  89. { set_max_cstate, "Pavilion zv5000", {
  90. DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
  91. DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
  92. (void *)1},
  93. { set_max_cstate, "Asus L8400B", {
  94. DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
  95. DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
  96. (void *)1},
  97. {},
  98. };
  99. /*
  100. * Callers should disable interrupts before the call and enable
  101. * interrupts after return.
  102. */
  103. static void acpi_safe_halt(void)
  104. {
  105. current_thread_info()->status &= ~TS_POLLING;
  106. /*
  107. * TS_POLLING-cleared state must be visible before we
  108. * test NEED_RESCHED:
  109. */
  110. smp_mb();
  111. if (!need_resched()) {
  112. safe_halt();
  113. local_irq_disable();
  114. }
  115. current_thread_info()->status |= TS_POLLING;
  116. }
  117. #ifdef ARCH_APICTIMER_STOPS_ON_C3
  118. /*
  119. * Some BIOS implementations switch to C3 in the published C2 state.
  120. * This seems to be a common problem on AMD boxen, but other vendors
  121. * are affected too. We pick the most conservative approach: we assume
  122. * that the local APIC stops in both C2 and C3.
  123. */
  124. static void lapic_timer_check_state(int state, struct acpi_processor *pr,
  125. struct acpi_processor_cx *cx)
  126. {
  127. struct acpi_processor_power *pwr = &pr->power;
  128. u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
  129. if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
  130. return;
  131. if (amd_e400_c1e_detected)
  132. type = ACPI_STATE_C1;
  133. /*
  134. * Check, if one of the previous states already marked the lapic
  135. * unstable
  136. */
  137. if (pwr->timer_broadcast_on_state < state)
  138. return;
  139. if (cx->type >= type)
  140. pr->power.timer_broadcast_on_state = state;
  141. }
  142. static void __lapic_timer_propagate_broadcast(void *arg)
  143. {
  144. struct acpi_processor *pr = (struct acpi_processor *) arg;
  145. unsigned long reason;
  146. reason = pr->power.timer_broadcast_on_state < INT_MAX ?
  147. CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
  148. clockevents_notify(reason, &pr->id);
  149. }
  150. static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
  151. {
  152. smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
  153. (void *)pr, 1);
  154. }
  155. /* Power(C) State timer broadcast control */
  156. static void lapic_timer_state_broadcast(struct acpi_processor *pr,
  157. struct acpi_processor_cx *cx,
  158. int broadcast)
  159. {
  160. int state = cx - pr->power.states;
  161. if (state >= pr->power.timer_broadcast_on_state) {
  162. unsigned long reason;
  163. reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
  164. CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
  165. clockevents_notify(reason, &pr->id);
  166. }
  167. }
  168. #else
  169. static void lapic_timer_check_state(int state, struct acpi_processor *pr,
  170. struct acpi_processor_cx *cstate) { }
  171. static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
  172. static void lapic_timer_state_broadcast(struct acpi_processor *pr,
  173. struct acpi_processor_cx *cx,
  174. int broadcast)
  175. {
  176. }
  177. #endif
  178. static u32 saved_bm_rld;
  179. static void acpi_idle_bm_rld_save(void)
  180. {
  181. acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld);
  182. }
  183. static void acpi_idle_bm_rld_restore(void)
  184. {
  185. u32 resumed_bm_rld;
  186. acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld);
  187. if (resumed_bm_rld != saved_bm_rld)
  188. acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld);
  189. }
  190. int acpi_processor_suspend(struct device *dev)
  191. {
  192. acpi_idle_bm_rld_save();
  193. return 0;
  194. }
  195. int acpi_processor_resume(struct device *dev)
  196. {
  197. acpi_idle_bm_rld_restore();
  198. return 0;
  199. }
  200. #if defined(CONFIG_X86)
  201. static void tsc_check_state(int state)
  202. {
  203. switch (boot_cpu_data.x86_vendor) {
  204. case X86_VENDOR_AMD:
  205. case X86_VENDOR_INTEL:
  206. /*
  207. * AMD Fam10h TSC will tick in all
  208. * C/P/S0/S1 states when this bit is set.
  209. */
  210. if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
  211. return;
  212. /*FALL THROUGH*/
  213. default:
  214. /* TSC could halt in idle, so notify users */
  215. if (state > ACPI_STATE_C1)
  216. mark_tsc_unstable("TSC halts in idle");
  217. }
  218. }
  219. #else
  220. static void tsc_check_state(int state) { return; }
  221. #endif
  222. static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
  223. {
  224. if (!pr)
  225. return -EINVAL;
  226. if (!pr->pblk)
  227. return -ENODEV;
  228. /* if info is obtained from pblk/fadt, type equals state */
  229. pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
  230. pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
  231. #ifndef CONFIG_HOTPLUG_CPU
  232. /*
  233. * Check for P_LVL2_UP flag before entering C2 and above on
  234. * an SMP system.
  235. */
  236. if ((num_online_cpus() > 1) &&
  237. !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
  238. return -ENODEV;
  239. #endif
  240. /* determine C2 and C3 address from pblk */
  241. pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
  242. pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
  243. /* determine latencies from FADT */
  244. pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency;
  245. pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency;
  246. /*
  247. * FADT specified C2 latency must be less than or equal to
  248. * 100 microseconds.
  249. */
  250. if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
  251. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  252. "C2 latency too large [%d]\n", acpi_gbl_FADT.c2_latency));
  253. /* invalidate C2 */
  254. pr->power.states[ACPI_STATE_C2].address = 0;
  255. }
  256. /*
  257. * FADT supplied C3 latency must be less than or equal to
  258. * 1000 microseconds.
  259. */
  260. if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
  261. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  262. "C3 latency too large [%d]\n", acpi_gbl_FADT.c3_latency));
  263. /* invalidate C3 */
  264. pr->power.states[ACPI_STATE_C3].address = 0;
  265. }
  266. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  267. "lvl2[0x%08x] lvl3[0x%08x]\n",
  268. pr->power.states[ACPI_STATE_C2].address,
  269. pr->power.states[ACPI_STATE_C3].address));
  270. return 0;
  271. }
  272. static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
  273. {
  274. if (!pr->power.states[ACPI_STATE_C1].valid) {
  275. /* set the first C-State to C1 */
  276. /* all processors need to support C1 */
  277. pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
  278. pr->power.states[ACPI_STATE_C1].valid = 1;
  279. pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
  280. }
  281. /* the C0 state only exists as a filler in our array */
  282. pr->power.states[ACPI_STATE_C0].valid = 1;
  283. return 0;
  284. }
  285. static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
  286. {
  287. acpi_status status = 0;
  288. u64 count;
  289. int current_count;
  290. int i;
  291. struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
  292. union acpi_object *cst;
  293. if (nocst)
  294. return -ENODEV;
  295. current_count = 0;
  296. status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
  297. if (ACPI_FAILURE(status)) {
  298. ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
  299. return -ENODEV;
  300. }
  301. cst = buffer.pointer;
  302. /* There must be at least 2 elements */
  303. if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
  304. printk(KERN_ERR PREFIX "not enough elements in _CST\n");
  305. status = -EFAULT;
  306. goto end;
  307. }
  308. count = cst->package.elements[0].integer.value;
  309. /* Validate number of power states. */
  310. if (count < 1 || count != cst->package.count - 1) {
  311. printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
  312. status = -EFAULT;
  313. goto end;
  314. }
  315. /* Tell driver that at least _CST is supported. */
  316. pr->flags.has_cst = 1;
  317. for (i = 1; i <= count; i++) {
  318. union acpi_object *element;
  319. union acpi_object *obj;
  320. struct acpi_power_register *reg;
  321. struct acpi_processor_cx cx;
  322. memset(&cx, 0, sizeof(cx));
  323. element = &(cst->package.elements[i]);
  324. if (element->type != ACPI_TYPE_PACKAGE)
  325. continue;
  326. if (element->package.count != 4)
  327. continue;
  328. obj = &(element->package.elements[0]);
  329. if (obj->type != ACPI_TYPE_BUFFER)
  330. continue;
  331. reg = (struct acpi_power_register *)obj->buffer.pointer;
  332. if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
  333. (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
  334. continue;
  335. /* There should be an easy way to extract an integer... */
  336. obj = &(element->package.elements[1]);
  337. if (obj->type != ACPI_TYPE_INTEGER)
  338. continue;
  339. cx.type = obj->integer.value;
  340. /*
  341. * Some buggy BIOSes won't list C1 in _CST -
  342. * Let acpi_processor_get_power_info_default() handle them later
  343. */
  344. if (i == 1 && cx.type != ACPI_STATE_C1)
  345. current_count++;
  346. cx.address = reg->address;
  347. cx.index = current_count + 1;
  348. cx.entry_method = ACPI_CSTATE_SYSTEMIO;
  349. if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
  350. if (acpi_processor_ffh_cstate_probe
  351. (pr->id, &cx, reg) == 0) {
  352. cx.entry_method = ACPI_CSTATE_FFH;
  353. } else if (cx.type == ACPI_STATE_C1) {
  354. /*
  355. * C1 is a special case where FIXED_HARDWARE
  356. * can be handled in non-MWAIT way as well.
  357. * In that case, save this _CST entry info.
  358. * Otherwise, ignore this info and continue.
  359. */
  360. cx.entry_method = ACPI_CSTATE_HALT;
  361. snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
  362. } else {
  363. continue;
  364. }
  365. if (cx.type == ACPI_STATE_C1 &&
  366. (boot_option_idle_override == IDLE_NOMWAIT)) {
  367. /*
  368. * In most cases the C1 space_id obtained from
  369. * _CST object is FIXED_HARDWARE access mode.
  370. * But when the option of idle=halt is added,
  371. * the entry_method type should be changed from
  372. * CSTATE_FFH to CSTATE_HALT.
  373. * When the option of idle=nomwait is added,
  374. * the C1 entry_method type should be
  375. * CSTATE_HALT.
  376. */
  377. cx.entry_method = ACPI_CSTATE_HALT;
  378. snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
  379. }
  380. } else {
  381. snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x",
  382. cx.address);
  383. }
  384. if (cx.type == ACPI_STATE_C1) {
  385. cx.valid = 1;
  386. }
  387. obj = &(element->package.elements[2]);
  388. if (obj->type != ACPI_TYPE_INTEGER)
  389. continue;
  390. cx.latency = obj->integer.value;
  391. obj = &(element->package.elements[3]);
  392. if (obj->type != ACPI_TYPE_INTEGER)
  393. continue;
  394. current_count++;
  395. memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
  396. /*
  397. * We support total ACPI_PROCESSOR_MAX_POWER - 1
  398. * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
  399. */
  400. if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
  401. printk(KERN_WARNING
  402. "Limiting number of power states to max (%d)\n",
  403. ACPI_PROCESSOR_MAX_POWER);
  404. printk(KERN_WARNING
  405. "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
  406. break;
  407. }
  408. }
  409. ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
  410. current_count));
  411. /* Validate number of power states discovered */
  412. if (current_count < 2)
  413. status = -EFAULT;
  414. end:
  415. kfree(buffer.pointer);
  416. return status;
  417. }
  418. static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
  419. struct acpi_processor_cx *cx)
  420. {
  421. static int bm_check_flag = -1;
  422. static int bm_control_flag = -1;
  423. if (!cx->address)
  424. return;
  425. /*
  426. * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
  427. * DMA transfers are used by any ISA device to avoid livelock.
  428. * Note that we could disable Type-F DMA (as recommended by
  429. * the erratum), but this is known to disrupt certain ISA
  430. * devices thus we take the conservative approach.
  431. */
  432. else if (errata.piix4.fdma) {
  433. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  434. "C3 not supported on PIIX4 with Type-F DMA\n"));
  435. return;
  436. }
  437. /* All the logic here assumes flags.bm_check is same across all CPUs */
  438. if (bm_check_flag == -1) {
  439. /* Determine whether bm_check is needed based on CPU */
  440. acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
  441. bm_check_flag = pr->flags.bm_check;
  442. bm_control_flag = pr->flags.bm_control;
  443. } else {
  444. pr->flags.bm_check = bm_check_flag;
  445. pr->flags.bm_control = bm_control_flag;
  446. }
  447. if (pr->flags.bm_check) {
  448. if (!pr->flags.bm_control) {
  449. if (pr->flags.has_cst != 1) {
  450. /* bus mastering control is necessary */
  451. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  452. "C3 support requires BM control\n"));
  453. return;
  454. } else {
  455. /* Here we enter C3 without bus mastering */
  456. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  457. "C3 support without BM control\n"));
  458. }
  459. }
  460. } else {
  461. /*
  462. * WBINVD should be set in fadt, for C3 state to be
  463. * supported on when bm_check is not required.
  464. */
  465. if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
  466. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  467. "Cache invalidation should work properly"
  468. " for C3 to be enabled on SMP systems\n"));
  469. return;
  470. }
  471. }
  472. /*
  473. * Otherwise we've met all of our C3 requirements.
  474. * Normalize the C3 latency to expidite policy. Enable
  475. * checking of bus mastering status (bm_check) so we can
  476. * use this in our C3 policy
  477. */
  478. cx->valid = 1;
  479. /*
  480. * On older chipsets, BM_RLD needs to be set
  481. * in order for Bus Master activity to wake the
  482. * system from C3. Newer chipsets handle DMA
  483. * during C3 automatically and BM_RLD is a NOP.
  484. * In either case, the proper way to
  485. * handle BM_RLD is to set it and leave it set.
  486. */
  487. acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
  488. return;
  489. }
  490. static int acpi_processor_power_verify(struct acpi_processor *pr)
  491. {
  492. unsigned int i;
  493. unsigned int working = 0;
  494. pr->power.timer_broadcast_on_state = INT_MAX;
  495. for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
  496. struct acpi_processor_cx *cx = &pr->power.states[i];
  497. switch (cx->type) {
  498. case ACPI_STATE_C1:
  499. cx->valid = 1;
  500. break;
  501. case ACPI_STATE_C2:
  502. if (!cx->address)
  503. break;
  504. cx->valid = 1;
  505. break;
  506. case ACPI_STATE_C3:
  507. acpi_processor_power_verify_c3(pr, cx);
  508. break;
  509. }
  510. if (!cx->valid)
  511. continue;
  512. lapic_timer_check_state(i, pr, cx);
  513. tsc_check_state(cx->type);
  514. working++;
  515. }
  516. lapic_timer_propagate_broadcast(pr);
  517. return (working);
  518. }
  519. static int acpi_processor_get_power_info(struct acpi_processor *pr)
  520. {
  521. unsigned int i;
  522. int result;
  523. /* NOTE: the idle thread may not be running while calling
  524. * this function */
  525. /* Zero initialize all the C-states info. */
  526. memset(pr->power.states, 0, sizeof(pr->power.states));
  527. result = acpi_processor_get_power_info_cst(pr);
  528. if (result == -ENODEV)
  529. result = acpi_processor_get_power_info_fadt(pr);
  530. if (result)
  531. return result;
  532. acpi_processor_get_power_info_default(pr);
  533. pr->power.count = acpi_processor_power_verify(pr);
  534. /*
  535. * if one state of type C2 or C3 is available, mark this
  536. * CPU as being "idle manageable"
  537. */
  538. for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
  539. if (pr->power.states[i].valid) {
  540. pr->power.count = i;
  541. if (pr->power.states[i].type >= ACPI_STATE_C2)
  542. pr->flags.power = 1;
  543. }
  544. }
  545. return 0;
  546. }
  547. /**
  548. * acpi_idle_bm_check - checks if bus master activity was detected
  549. */
  550. static int acpi_idle_bm_check(void)
  551. {
  552. u32 bm_status = 0;
  553. if (bm_check_disable)
  554. return 0;
  555. acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
  556. if (bm_status)
  557. acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
  558. /*
  559. * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
  560. * the true state of bus mastering activity; forcing us to
  561. * manually check the BMIDEA bit of each IDE channel.
  562. */
  563. else if (errata.piix4.bmisx) {
  564. if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
  565. || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
  566. bm_status = 1;
  567. }
  568. return bm_status;
  569. }
  570. /**
  571. * acpi_idle_do_entry - a helper function that does C2 and C3 type entry
  572. * @cx: cstate data
  573. *
  574. * Caller disables interrupt before call and enables interrupt after return.
  575. */
  576. static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx)
  577. {
  578. /* Don't trace irqs off for idle */
  579. stop_critical_timings();
  580. if (cx->entry_method == ACPI_CSTATE_FFH) {
  581. /* Call into architectural FFH based C-state */
  582. acpi_processor_ffh_cstate_enter(cx);
  583. } else if (cx->entry_method == ACPI_CSTATE_HALT) {
  584. acpi_safe_halt();
  585. } else {
  586. /* IO port based C-state */
  587. inb(cx->address);
  588. /* Dummy wait op - must do something useless after P_LVL2 read
  589. because chipsets cannot guarantee that STPCLK# signal
  590. gets asserted in time to freeze execution properly. */
  591. inl(acpi_gbl_FADT.xpm_timer_block.address);
  592. }
  593. start_critical_timings();
  594. }
  595. /**
  596. * acpi_idle_enter_c1 - enters an ACPI C1 state-type
  597. * @dev: the target CPU
  598. * @drv: cpuidle driver containing cpuidle state info
  599. * @index: index of target state
  600. *
  601. * This is equivalent to the HALT instruction.
  602. */
  603. static int acpi_idle_enter_c1(struct cpuidle_device *dev,
  604. struct cpuidle_driver *drv, int index)
  605. {
  606. struct acpi_processor *pr;
  607. struct acpi_processor_cx *cx = acpi_cstate[index];
  608. pr = __this_cpu_read(processors);
  609. if (unlikely(!pr))
  610. return -EINVAL;
  611. lapic_timer_state_broadcast(pr, cx, 1);
  612. acpi_idle_do_entry(cx);
  613. lapic_timer_state_broadcast(pr, cx, 0);
  614. return index;
  615. }
  616. /**
  617. * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining)
  618. * @dev: the target CPU
  619. * @index: the index of suggested state
  620. */
  621. static int acpi_idle_play_dead(struct cpuidle_device *dev, int index)
  622. {
  623. struct acpi_processor_cx *cx = acpi_cstate[index];
  624. ACPI_FLUSH_CPU_CACHE();
  625. while (1) {
  626. if (cx->entry_method == ACPI_CSTATE_HALT)
  627. safe_halt();
  628. else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) {
  629. inb(cx->address);
  630. /* See comment in acpi_idle_do_entry() */
  631. inl(acpi_gbl_FADT.xpm_timer_block.address);
  632. } else
  633. return -ENODEV;
  634. }
  635. /* Never reached */
  636. return 0;
  637. }
  638. /**
  639. * acpi_idle_enter_simple - enters an ACPI state without BM handling
  640. * @dev: the target CPU
  641. * @drv: cpuidle driver with cpuidle state information
  642. * @index: the index of suggested state
  643. */
  644. static int acpi_idle_enter_simple(struct cpuidle_device *dev,
  645. struct cpuidle_driver *drv, int index)
  646. {
  647. struct acpi_processor *pr;
  648. struct acpi_processor_cx *cx = acpi_cstate[index];
  649. pr = __this_cpu_read(processors);
  650. if (unlikely(!pr))
  651. return -EINVAL;
  652. if (cx->entry_method != ACPI_CSTATE_FFH) {
  653. current_thread_info()->status &= ~TS_POLLING;
  654. /*
  655. * TS_POLLING-cleared state must be visible before we test
  656. * NEED_RESCHED:
  657. */
  658. smp_mb();
  659. if (unlikely(need_resched())) {
  660. current_thread_info()->status |= TS_POLLING;
  661. return -EINVAL;
  662. }
  663. }
  664. /*
  665. * Must be done before busmaster disable as we might need to
  666. * access HPET !
  667. */
  668. lapic_timer_state_broadcast(pr, cx, 1);
  669. if (cx->type == ACPI_STATE_C3)
  670. ACPI_FLUSH_CPU_CACHE();
  671. /* Tell the scheduler that we are going deep-idle: */
  672. sched_clock_idle_sleep_event();
  673. acpi_idle_do_entry(cx);
  674. sched_clock_idle_wakeup_event(0);
  675. if (cx->entry_method != ACPI_CSTATE_FFH)
  676. current_thread_info()->status |= TS_POLLING;
  677. lapic_timer_state_broadcast(pr, cx, 0);
  678. return index;
  679. }
  680. static int c3_cpu_count;
  681. static DEFINE_RAW_SPINLOCK(c3_lock);
  682. /**
  683. * acpi_idle_enter_bm - enters C3 with proper BM handling
  684. * @dev: the target CPU
  685. * @drv: cpuidle driver containing state data
  686. * @index: the index of suggested state
  687. *
  688. * If BM is detected, the deepest non-C3 idle state is entered instead.
  689. */
  690. static int acpi_idle_enter_bm(struct cpuidle_device *dev,
  691. struct cpuidle_driver *drv, int index)
  692. {
  693. struct acpi_processor *pr;
  694. struct acpi_processor_cx *cx = acpi_cstate[index];
  695. pr = __this_cpu_read(processors);
  696. if (unlikely(!pr))
  697. return -EINVAL;
  698. if (!cx->bm_sts_skip && acpi_idle_bm_check()) {
  699. if (drv->safe_state_index >= 0) {
  700. return drv->states[drv->safe_state_index].enter(dev,
  701. drv, drv->safe_state_index);
  702. } else {
  703. acpi_safe_halt();
  704. return -EBUSY;
  705. }
  706. }
  707. if (cx->entry_method != ACPI_CSTATE_FFH) {
  708. current_thread_info()->status &= ~TS_POLLING;
  709. /*
  710. * TS_POLLING-cleared state must be visible before we test
  711. * NEED_RESCHED:
  712. */
  713. smp_mb();
  714. if (unlikely(need_resched())) {
  715. current_thread_info()->status |= TS_POLLING;
  716. return -EINVAL;
  717. }
  718. }
  719. acpi_unlazy_tlb(smp_processor_id());
  720. /* Tell the scheduler that we are going deep-idle: */
  721. sched_clock_idle_sleep_event();
  722. /*
  723. * Must be done before busmaster disable as we might need to
  724. * access HPET !
  725. */
  726. lapic_timer_state_broadcast(pr, cx, 1);
  727. /*
  728. * disable bus master
  729. * bm_check implies we need ARB_DIS
  730. * !bm_check implies we need cache flush
  731. * bm_control implies whether we can do ARB_DIS
  732. *
  733. * That leaves a case where bm_check is set and bm_control is
  734. * not set. In that case we cannot do much, we enter C3
  735. * without doing anything.
  736. */
  737. if (pr->flags.bm_check && pr->flags.bm_control) {
  738. raw_spin_lock(&c3_lock);
  739. c3_cpu_count++;
  740. /* Disable bus master arbitration when all CPUs are in C3 */
  741. if (c3_cpu_count == num_online_cpus())
  742. acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
  743. raw_spin_unlock(&c3_lock);
  744. } else if (!pr->flags.bm_check) {
  745. ACPI_FLUSH_CPU_CACHE();
  746. }
  747. acpi_idle_do_entry(cx);
  748. /* Re-enable bus master arbitration */
  749. if (pr->flags.bm_check && pr->flags.bm_control) {
  750. raw_spin_lock(&c3_lock);
  751. acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
  752. c3_cpu_count--;
  753. raw_spin_unlock(&c3_lock);
  754. }
  755. sched_clock_idle_wakeup_event(0);
  756. if (cx->entry_method != ACPI_CSTATE_FFH)
  757. current_thread_info()->status |= TS_POLLING;
  758. lapic_timer_state_broadcast(pr, cx, 0);
  759. return index;
  760. }
  761. struct cpuidle_driver acpi_idle_driver = {
  762. .name = "acpi_idle",
  763. .owner = THIS_MODULE,
  764. .en_core_tk_irqen = 1,
  765. };
  766. /**
  767. * acpi_processor_setup_cpuidle_cx - prepares and configures CPUIDLE
  768. * device i.e. per-cpu data
  769. *
  770. * @pr: the ACPI processor
  771. * @dev : the cpuidle device
  772. */
  773. static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr,
  774. struct cpuidle_device *dev)
  775. {
  776. int i, count = CPUIDLE_DRIVER_STATE_START;
  777. struct acpi_processor_cx *cx;
  778. if (!pr->flags.power_setup_done)
  779. return -EINVAL;
  780. if (pr->flags.power == 0) {
  781. return -EINVAL;
  782. }
  783. if (!dev)
  784. return -EINVAL;
  785. dev->cpu = pr->id;
  786. if (max_cstate == 0)
  787. max_cstate = 1;
  788. for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
  789. cx = &pr->power.states[i];
  790. if (!cx->valid)
  791. continue;
  792. #ifdef CONFIG_HOTPLUG_CPU
  793. if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
  794. !pr->flags.has_cst &&
  795. !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
  796. continue;
  797. #endif
  798. acpi_cstate[count] = cx;
  799. count++;
  800. if (count == CPUIDLE_STATE_MAX)
  801. break;
  802. }
  803. dev->state_count = count;
  804. if (!count)
  805. return -EINVAL;
  806. return 0;
  807. }
  808. /**
  809. * acpi_processor_setup_cpuidle states- prepares and configures cpuidle
  810. * global state data i.e. idle routines
  811. *
  812. * @pr: the ACPI processor
  813. */
  814. static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr)
  815. {
  816. int i, count = CPUIDLE_DRIVER_STATE_START;
  817. struct acpi_processor_cx *cx;
  818. struct cpuidle_state *state;
  819. struct cpuidle_driver *drv = &acpi_idle_driver;
  820. if (!pr->flags.power_setup_done)
  821. return -EINVAL;
  822. if (pr->flags.power == 0)
  823. return -EINVAL;
  824. drv->safe_state_index = -1;
  825. for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
  826. drv->states[i].name[0] = '\0';
  827. drv->states[i].desc[0] = '\0';
  828. }
  829. if (max_cstate == 0)
  830. max_cstate = 1;
  831. for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
  832. cx = &pr->power.states[i];
  833. if (!cx->valid)
  834. continue;
  835. #ifdef CONFIG_HOTPLUG_CPU
  836. if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
  837. !pr->flags.has_cst &&
  838. !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
  839. continue;
  840. #endif
  841. state = &drv->states[count];
  842. snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
  843. strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
  844. state->exit_latency = cx->latency;
  845. state->target_residency = cx->latency * latency_factor;
  846. state->flags = 0;
  847. switch (cx->type) {
  848. case ACPI_STATE_C1:
  849. if (cx->entry_method == ACPI_CSTATE_FFH)
  850. state->flags |= CPUIDLE_FLAG_TIME_VALID;
  851. state->enter = acpi_idle_enter_c1;
  852. state->enter_dead = acpi_idle_play_dead;
  853. drv->safe_state_index = count;
  854. break;
  855. case ACPI_STATE_C2:
  856. state->flags |= CPUIDLE_FLAG_TIME_VALID;
  857. state->enter = acpi_idle_enter_simple;
  858. state->enter_dead = acpi_idle_play_dead;
  859. drv->safe_state_index = count;
  860. break;
  861. case ACPI_STATE_C3:
  862. state->flags |= CPUIDLE_FLAG_TIME_VALID;
  863. state->enter = pr->flags.bm_check ?
  864. acpi_idle_enter_bm :
  865. acpi_idle_enter_simple;
  866. break;
  867. }
  868. count++;
  869. if (count == CPUIDLE_STATE_MAX)
  870. break;
  871. }
  872. drv->state_count = count;
  873. if (!count)
  874. return -EINVAL;
  875. return 0;
  876. }
  877. int acpi_processor_hotplug(struct acpi_processor *pr)
  878. {
  879. int ret = 0;
  880. struct cpuidle_device *dev;
  881. if (disabled_by_idle_boot_param())
  882. return 0;
  883. if (!pr)
  884. return -EINVAL;
  885. if (nocst) {
  886. return -ENODEV;
  887. }
  888. if (!pr->flags.power_setup_done)
  889. return -ENODEV;
  890. dev = per_cpu(acpi_cpuidle_device, pr->id);
  891. cpuidle_pause_and_lock();
  892. cpuidle_disable_device(dev);
  893. acpi_processor_get_power_info(pr);
  894. if (pr->flags.power) {
  895. acpi_processor_setup_cpuidle_cx(pr, dev);
  896. ret = cpuidle_enable_device(dev);
  897. }
  898. cpuidle_resume_and_unlock();
  899. return ret;
  900. }
  901. int acpi_processor_cst_has_changed(struct acpi_processor *pr)
  902. {
  903. int cpu;
  904. struct acpi_processor *_pr;
  905. struct cpuidle_device *dev;
  906. if (disabled_by_idle_boot_param())
  907. return 0;
  908. if (!pr)
  909. return -EINVAL;
  910. if (nocst)
  911. return -ENODEV;
  912. if (!pr->flags.power_setup_done)
  913. return -ENODEV;
  914. /*
  915. * FIXME: Design the ACPI notification to make it once per
  916. * system instead of once per-cpu. This condition is a hack
  917. * to make the code that updates C-States be called once.
  918. */
  919. if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) {
  920. cpuidle_pause_and_lock();
  921. /* Protect against cpu-hotplug */
  922. get_online_cpus();
  923. /* Disable all cpuidle devices */
  924. for_each_online_cpu(cpu) {
  925. _pr = per_cpu(processors, cpu);
  926. if (!_pr || !_pr->flags.power_setup_done)
  927. continue;
  928. dev = per_cpu(acpi_cpuidle_device, cpu);
  929. cpuidle_disable_device(dev);
  930. }
  931. /* Populate Updated C-state information */
  932. acpi_processor_get_power_info(pr);
  933. acpi_processor_setup_cpuidle_states(pr);
  934. /* Enable all cpuidle devices */
  935. for_each_online_cpu(cpu) {
  936. _pr = per_cpu(processors, cpu);
  937. if (!_pr || !_pr->flags.power_setup_done)
  938. continue;
  939. acpi_processor_get_power_info(_pr);
  940. if (_pr->flags.power) {
  941. dev = per_cpu(acpi_cpuidle_device, cpu);
  942. acpi_processor_setup_cpuidle_cx(_pr, dev);
  943. cpuidle_enable_device(dev);
  944. }
  945. }
  946. put_online_cpus();
  947. cpuidle_resume_and_unlock();
  948. }
  949. return 0;
  950. }
  951. static int acpi_processor_registered;
  952. int __cpuinit acpi_processor_power_init(struct acpi_processor *pr)
  953. {
  954. acpi_status status = 0;
  955. int retval;
  956. struct cpuidle_device *dev;
  957. static int first_run;
  958. if (disabled_by_idle_boot_param())
  959. return 0;
  960. if (!first_run) {
  961. dmi_check_system(processor_power_dmi_table);
  962. max_cstate = acpi_processor_cstate_check(max_cstate);
  963. if (max_cstate < ACPI_C_STATES_MAX)
  964. printk(KERN_NOTICE
  965. "ACPI: processor limited to max C-state %d\n",
  966. max_cstate);
  967. first_run++;
  968. }
  969. if (!pr)
  970. return -EINVAL;
  971. if (acpi_gbl_FADT.cst_control && !nocst) {
  972. status =
  973. acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
  974. if (ACPI_FAILURE(status)) {
  975. ACPI_EXCEPTION((AE_INFO, status,
  976. "Notifying BIOS of _CST ability failed"));
  977. }
  978. }
  979. acpi_processor_get_power_info(pr);
  980. pr->flags.power_setup_done = 1;
  981. /*
  982. * Install the idle handler if processor power management is supported.
  983. * Note that we use previously set idle handler will be used on
  984. * platforms that only support C1.
  985. */
  986. if (pr->flags.power) {
  987. /* Register acpi_idle_driver if not already registered */
  988. if (!acpi_processor_registered) {
  989. acpi_processor_setup_cpuidle_states(pr);
  990. retval = cpuidle_register_driver(&acpi_idle_driver);
  991. if (retval)
  992. return retval;
  993. printk(KERN_DEBUG "ACPI: %s registered with cpuidle\n",
  994. acpi_idle_driver.name);
  995. }
  996. dev = kzalloc(sizeof(*dev), GFP_KERNEL);
  997. if (!dev)
  998. return -ENOMEM;
  999. per_cpu(acpi_cpuidle_device, pr->id) = dev;
  1000. acpi_processor_setup_cpuidle_cx(pr, dev);
  1001. /* Register per-cpu cpuidle_device. Cpuidle driver
  1002. * must already be registered before registering device
  1003. */
  1004. retval = cpuidle_register_device(dev);
  1005. if (retval) {
  1006. if (acpi_processor_registered == 0)
  1007. cpuidle_unregister_driver(&acpi_idle_driver);
  1008. return retval;
  1009. }
  1010. acpi_processor_registered++;
  1011. }
  1012. return 0;
  1013. }
  1014. int acpi_processor_power_exit(struct acpi_processor *pr)
  1015. {
  1016. struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id);
  1017. if (disabled_by_idle_boot_param())
  1018. return 0;
  1019. if (pr->flags.power) {
  1020. cpuidle_unregister_device(dev);
  1021. acpi_processor_registered--;
  1022. if (acpi_processor_registered == 0)
  1023. cpuidle_unregister_driver(&acpi_idle_driver);
  1024. }
  1025. pr->flags.power_setup_done = 0;
  1026. return 0;
  1027. }