Kconfig 9.9 KB

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  1. menu "Platform support"
  2. source "arch/powerpc/platforms/powernv/Kconfig"
  3. source "arch/powerpc/platforms/pseries/Kconfig"
  4. source "arch/powerpc/platforms/chrp/Kconfig"
  5. source "arch/powerpc/platforms/512x/Kconfig"
  6. source "arch/powerpc/platforms/52xx/Kconfig"
  7. source "arch/powerpc/platforms/powermac/Kconfig"
  8. source "arch/powerpc/platforms/prep/Kconfig"
  9. source "arch/powerpc/platforms/maple/Kconfig"
  10. source "arch/powerpc/platforms/pasemi/Kconfig"
  11. source "arch/powerpc/platforms/ps3/Kconfig"
  12. source "arch/powerpc/platforms/cell/Kconfig"
  13. source "arch/powerpc/platforms/8xx/Kconfig"
  14. source "arch/powerpc/platforms/82xx/Kconfig"
  15. source "arch/powerpc/platforms/83xx/Kconfig"
  16. source "arch/powerpc/platforms/85xx/Kconfig"
  17. source "arch/powerpc/platforms/86xx/Kconfig"
  18. source "arch/powerpc/platforms/embedded6xx/Kconfig"
  19. source "arch/powerpc/platforms/44x/Kconfig"
  20. source "arch/powerpc/platforms/40x/Kconfig"
  21. source "arch/powerpc/platforms/amigaone/Kconfig"
  22. source "arch/powerpc/platforms/wsp/Kconfig"
  23. config KVM_GUEST
  24. bool "KVM Guest support"
  25. default n
  26. select EPAPR_PARAVIRT
  27. ---help---
  28. This option enables various optimizations for running under the KVM
  29. hypervisor. Overhead for the kernel when not running inside KVM should
  30. be minimal.
  31. In case of doubt, say Y
  32. config EPAPR_PARAVIRT
  33. bool "ePAPR para-virtualization support"
  34. default n
  35. help
  36. Enables ePAPR para-virtualization support for guests.
  37. In case of doubt, say Y
  38. config PPC_NATIVE
  39. bool
  40. depends on 6xx || PPC64
  41. help
  42. Support for running natively on the hardware, i.e. without
  43. a hypervisor. This option is not user-selectable but should
  44. be selected by all platforms that need it.
  45. config PPC_OF_BOOT_TRAMPOLINE
  46. bool "Support booting from Open Firmware or yaboot"
  47. depends on 6xx || PPC64
  48. default y
  49. help
  50. Support from booting from Open Firmware or yaboot using an
  51. Open Firmware client interface. This enables the kernel to
  52. communicate with open firmware to retrieve system information
  53. such as the device tree.
  54. In case of doubt, say Y
  55. config UDBG_RTAS_CONSOLE
  56. bool "RTAS based debug console"
  57. depends on PPC_RTAS
  58. default n
  59. config PPC_SMP_MUXED_IPI
  60. bool
  61. help
  62. Select this opton if your platform supports SMP and your
  63. interrupt controller provides less than 4 interrupts to each
  64. cpu. This will enable the generic code to multiplex the 4
  65. messages on to one ipi.
  66. config PPC_UDBG_BEAT
  67. bool "BEAT based debug console"
  68. depends on PPC_CELLEB
  69. default n
  70. config IPIC
  71. bool
  72. default n
  73. config MPIC
  74. bool
  75. default n
  76. config PPC_EPAPR_HV_PIC
  77. bool
  78. default n
  79. select EPAPR_PARAVIRT
  80. config MPIC_WEIRD
  81. bool
  82. default n
  83. config MPIC_MSGR
  84. bool "MPIC message register support"
  85. depends on MPIC
  86. default n
  87. help
  88. Enables support for the MPIC message registers. These
  89. registers are used for inter-processor communication.
  90. config PPC_I8259
  91. bool
  92. default n
  93. config U3_DART
  94. bool
  95. depends on PPC64
  96. default n
  97. config PPC_RTAS
  98. bool
  99. default n
  100. config RTAS_ERROR_LOGGING
  101. bool
  102. depends on PPC_RTAS
  103. default n
  104. config PPC_RTAS_DAEMON
  105. bool
  106. depends on PPC_RTAS
  107. default n
  108. config RTAS_PROC
  109. bool "Proc interface to RTAS"
  110. depends on PPC_RTAS
  111. default y
  112. config RTAS_FLASH
  113. tristate "Firmware flash interface"
  114. depends on PPC64 && RTAS_PROC
  115. config MMIO_NVRAM
  116. bool
  117. default n
  118. config MPIC_U3_HT_IRQS
  119. bool
  120. default n
  121. config MPIC_BROKEN_REGREAD
  122. bool
  123. depends on MPIC
  124. help
  125. This option enables a MPIC driver workaround for some chips
  126. that have a bug that causes some interrupt source information
  127. to not read back properly. It is safe to use on other chips as
  128. well, but enabling it uses about 8KB of memory to keep copies
  129. of the register contents in software.
  130. config IBMVIO
  131. depends on PPC_PSERIES
  132. bool
  133. default y
  134. config IBMEBUS
  135. depends on PPC_PSERIES
  136. bool "Support for GX bus based adapters"
  137. help
  138. Bus device driver for GX bus based adapters.
  139. config PPC_MPC106
  140. bool
  141. default n
  142. config PPC_970_NAP
  143. bool
  144. default n
  145. config PPC_P7_NAP
  146. bool
  147. default n
  148. config PPC_INDIRECT_IO
  149. bool
  150. select GENERIC_IOMAP
  151. config PPC_INDIRECT_PIO
  152. bool
  153. select PPC_INDIRECT_IO
  154. config PPC_INDIRECT_MMIO
  155. bool
  156. select PPC_INDIRECT_IO
  157. config PPC_IO_WORKAROUNDS
  158. bool
  159. source "drivers/cpufreq/Kconfig"
  160. menu "CPU Frequency drivers"
  161. depends on CPU_FREQ
  162. config CPU_FREQ_PMAC
  163. bool "Support for Apple PowerBooks"
  164. depends on ADB_PMU && PPC32
  165. select CPU_FREQ_TABLE
  166. help
  167. This adds support for frequency switching on Apple PowerBooks,
  168. this currently includes some models of iBook & Titanium
  169. PowerBook.
  170. config CPU_FREQ_PMAC64
  171. bool "Support for some Apple G5s"
  172. depends on PPC_PMAC && PPC64
  173. select CPU_FREQ_TABLE
  174. help
  175. This adds support for frequency switching on Apple iMac G5,
  176. and some of the more recent desktop G5 machines as well.
  177. config PPC_PASEMI_CPUFREQ
  178. bool "Support for PA Semi PWRficient"
  179. depends on PPC_PASEMI
  180. default y
  181. select CPU_FREQ_TABLE
  182. help
  183. This adds the support for frequency switching on PA Semi
  184. PWRficient processors.
  185. endmenu
  186. menu "CPUIdle driver"
  187. source "drivers/cpuidle/Kconfig"
  188. endmenu
  189. config PPC601_SYNC_FIX
  190. bool "Workarounds for PPC601 bugs"
  191. depends on 6xx && (PPC_PREP || PPC_PMAC)
  192. help
  193. Some versions of the PPC601 (the first PowerPC chip) have bugs which
  194. mean that extra synchronization instructions are required near
  195. certain instructions, typically those that make major changes to the
  196. CPU state. These extra instructions reduce performance slightly.
  197. If you say N here, these extra instructions will not be included,
  198. resulting in a kernel which will run faster but may not run at all
  199. on some systems with the PPC601 chip.
  200. If in doubt, say Y here.
  201. config TAU
  202. bool "On-chip CPU temperature sensor support"
  203. depends on 6xx
  204. help
  205. G3 and G4 processors have an on-chip temperature sensor called the
  206. 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
  207. temperature within 2-4 degrees Celsius. This option shows the current
  208. on-die temperature in /proc/cpuinfo if the cpu supports it.
  209. Unfortunately, on some chip revisions, this sensor is very inaccurate
  210. and in many cases, does not work at all, so don't assume the cpu
  211. temp is actually what /proc/cpuinfo says it is.
  212. config TAU_INT
  213. bool "Interrupt driven TAU driver (DANGEROUS)"
  214. depends on TAU
  215. ---help---
  216. The TAU supports an interrupt driven mode which causes an interrupt
  217. whenever the temperature goes out of range. This is the fastest way
  218. to get notified the temp has exceeded a range. With this option off,
  219. a timer is used to re-check the temperature periodically.
  220. However, on some cpus it appears that the TAU interrupt hardware
  221. is buggy and can cause a situation which would lead unexplained hard
  222. lockups.
  223. Unless you are extending the TAU driver, or enjoy kernel/hardware
  224. debugging, leave this option off.
  225. config TAU_AVERAGE
  226. bool "Average high and low temp"
  227. depends on TAU
  228. ---help---
  229. The TAU hardware can compare the temperature to an upper and lower
  230. bound. The default behavior is to show both the upper and lower
  231. bound in /proc/cpuinfo. If the range is large, the temperature is
  232. either changing a lot, or the TAU hardware is broken (likely on some
  233. G4's). If the range is small (around 4 degrees), the temperature is
  234. relatively stable. If you say Y here, a single temperature value,
  235. halfway between the upper and lower bounds, will be reported in
  236. /proc/cpuinfo.
  237. If in doubt, say N here.
  238. config QUICC_ENGINE
  239. bool "Freescale QUICC Engine (QE) Support"
  240. depends on FSL_SOC && PPC32
  241. select PPC_LIB_RHEAP
  242. select CRC32
  243. help
  244. The QUICC Engine (QE) is a new generation of communications
  245. coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
  246. Selecting this option means that you wish to build a kernel
  247. for a machine with a QE coprocessor.
  248. config QE_GPIO
  249. bool "QE GPIO support"
  250. depends on QUICC_ENGINE
  251. select GENERIC_GPIO
  252. select ARCH_REQUIRE_GPIOLIB
  253. help
  254. Say Y here if you're going to use hardware that connects to the
  255. QE GPIOs.
  256. config CPM2
  257. bool "Enable support for the CPM2 (Communications Processor Module)"
  258. depends on (FSL_SOC_BOOKE && PPC32) || 8260
  259. select CPM
  260. select PPC_LIB_RHEAP
  261. select PPC_PCI_CHOICE
  262. select ARCH_REQUIRE_GPIOLIB
  263. select GENERIC_GPIO
  264. help
  265. The CPM2 (Communications Processor Module) is a coprocessor on
  266. embedded CPUs made by Freescale. Selecting this option means that
  267. you wish to build a kernel for a machine with a CPM2 coprocessor
  268. on it (826x, 827x, 8560).
  269. config AXON_RAM
  270. tristate "Axon DDR2 memory device driver"
  271. depends on PPC_IBM_CELL_BLADE && BLOCK
  272. default m
  273. help
  274. It registers one block device per Axon's DDR2 memory bank found
  275. on a system. Block devices are called axonram?, their major and
  276. minor numbers are available in /proc/devices, /proc/partitions or
  277. in /sys/block/axonram?/dev.
  278. config FSL_ULI1575
  279. bool
  280. default n
  281. select GENERIC_ISA_DMA
  282. help
  283. Supports for the ULI1575 PCIe south bridge that exists on some
  284. Freescale reference boards. The boards all use the ULI in pretty
  285. much the same way.
  286. config CPM
  287. bool
  288. select PPC_CLOCK
  289. config OF_RTC
  290. bool
  291. help
  292. Uses information from the OF or flattened device tree to instantiate
  293. platform devices for direct mapped RTC chips like the DS1742 or DS1743.
  294. config SIMPLE_GPIO
  295. bool "Support for simple, memory-mapped GPIO controllers"
  296. depends on PPC
  297. select GENERIC_GPIO
  298. select ARCH_REQUIRE_GPIOLIB
  299. help
  300. Say Y here to support simple, memory-mapped GPIO controllers.
  301. These are usually BCSRs used to control board's switches, LEDs,
  302. chip-selects, Ethernet/USB PHY's power and various other small
  303. on-board peripherals.
  304. config MCU_MPC8349EMITX
  305. bool "MPC8349E-mITX MCU driver"
  306. depends on I2C=y && PPC_83xx
  307. select GENERIC_GPIO
  308. select ARCH_REQUIRE_GPIOLIB
  309. help
  310. Say Y here to enable soft power-off functionality on the Freescale
  311. boards with the MPC8349E-mITX-compatible MCU chips. This driver will
  312. also register MCU GPIOs with the generic GPIO API, so you'll able
  313. to use MCU pins as GPIOs.
  314. config XILINX_PCI
  315. bool "Xilinx PCI host bridge support"
  316. depends on PCI && XILINX_VIRTEX
  317. endmenu