stamp.c 21 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/mtd/mtd.h>
  11. #include <linux/mtd/partitions.h>
  12. #include <linux/mtd/physmap.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/spi/flash.h>
  15. #include <linux/spi/mmc_spi.h>
  16. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  17. #include <linux/usb/isp1362.h>
  18. #endif
  19. #include <linux/irq.h>
  20. #include <linux/i2c.h>
  21. #include <asm/dma.h>
  22. #include <asm/bfin5xx_spi.h>
  23. #include <asm/reboot.h>
  24. #include <asm/portmux.h>
  25. #include <asm/dpmc.h>
  26. /*
  27. * Name the Board for the /proc/cpuinfo
  28. */
  29. const char bfin_board_name[] = "ADI BF533-STAMP";
  30. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  31. static struct platform_device rtc_device = {
  32. .name = "rtc-bfin",
  33. .id = -1,
  34. };
  35. #endif
  36. /*
  37. * Driver needs to know address, irq and flag pin.
  38. */
  39. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  40. #include <linux/smc91x.h>
  41. static struct smc91x_platdata smc91x_info = {
  42. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  43. .leda = RPC_LED_100_10,
  44. .ledb = RPC_LED_TX_RX,
  45. };
  46. static struct resource smc91x_resources[] = {
  47. {
  48. .name = "smc91x-regs",
  49. .start = 0x20300300,
  50. .end = 0x20300300 + 16,
  51. .flags = IORESOURCE_MEM,
  52. }, {
  53. .start = IRQ_PF7,
  54. .end = IRQ_PF7,
  55. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  56. },
  57. };
  58. static struct platform_device smc91x_device = {
  59. .name = "smc91x",
  60. .id = 0,
  61. .num_resources = ARRAY_SIZE(smc91x_resources),
  62. .resource = smc91x_resources,
  63. .dev = {
  64. .platform_data = &smc91x_info,
  65. },
  66. };
  67. #endif
  68. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  69. static struct resource net2272_bfin_resources[] = {
  70. {
  71. .start = 0x20300000,
  72. .end = 0x20300000 + 0x100,
  73. .flags = IORESOURCE_MEM,
  74. }, {
  75. .start = 1,
  76. .flags = IORESOURCE_BUS,
  77. }, {
  78. .start = IRQ_PF10,
  79. .end = IRQ_PF10,
  80. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  81. },
  82. };
  83. static struct platform_device net2272_bfin_device = {
  84. .name = "net2272",
  85. .id = -1,
  86. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  87. .resource = net2272_bfin_resources,
  88. };
  89. #endif
  90. #if defined(CONFIG_MTD_BFIN_ASYNC) || defined(CONFIG_MTD_BFIN_ASYNC_MODULE)
  91. static struct mtd_partition stamp_partitions[] = {
  92. {
  93. .name = "bootloader(nor)",
  94. .size = 0x40000,
  95. .offset = 0,
  96. }, {
  97. .name = "linux kernel(nor)",
  98. .size = 0x180000,
  99. .offset = MTDPART_OFS_APPEND,
  100. }, {
  101. .name = "file system(nor)",
  102. .size = MTDPART_SIZ_FULL,
  103. .offset = MTDPART_OFS_APPEND,
  104. }
  105. };
  106. static struct physmap_flash_data stamp_flash_data = {
  107. .width = 2,
  108. .parts = stamp_partitions,
  109. .nr_parts = ARRAY_SIZE(stamp_partitions),
  110. };
  111. static struct resource stamp_flash_resource[] = {
  112. {
  113. .name = "cfi_probe",
  114. .start = 0x20000000,
  115. .end = 0x203fffff,
  116. .flags = IORESOURCE_MEM,
  117. }, {
  118. .start = 0x7BB07BB0, /* AMBCTL0 setting when accessing flash */
  119. .end = 0x7BB07BB0, /* AMBCTL1 setting when accessing flash */
  120. .flags = IORESOURCE_MEM,
  121. }, {
  122. .start = GPIO_PF0,
  123. .flags = IORESOURCE_IRQ,
  124. }
  125. };
  126. static struct platform_device stamp_flash_device = {
  127. .name = "bfin-async-flash",
  128. .id = 0,
  129. .dev = {
  130. .platform_data = &stamp_flash_data,
  131. },
  132. .num_resources = ARRAY_SIZE(stamp_flash_resource),
  133. .resource = stamp_flash_resource,
  134. };
  135. #endif
  136. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  137. static struct mtd_partition bfin_spi_flash_partitions[] = {
  138. {
  139. .name = "bootloader(spi)",
  140. .size = 0x00040000,
  141. .offset = 0,
  142. .mask_flags = MTD_CAP_ROM
  143. }, {
  144. .name = "linux kernel(spi)",
  145. .size = 0x180000,
  146. .offset = MTDPART_OFS_APPEND,
  147. }, {
  148. .name = "file system(spi)",
  149. .size = MTDPART_SIZ_FULL,
  150. .offset = MTDPART_OFS_APPEND,
  151. }
  152. };
  153. static struct flash_platform_data bfin_spi_flash_data = {
  154. .name = "m25p80",
  155. .parts = bfin_spi_flash_partitions,
  156. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  157. .type = "m25p64",
  158. };
  159. /* SPI flash chip (m25p64) */
  160. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  161. .enable_dma = 0, /* use dma transfer with this chip*/
  162. };
  163. #endif
  164. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  165. #define MMC_SPI_CARD_DETECT_INT IRQ_PF5
  166. static int bfin_mmc_spi_init(struct device *dev,
  167. irqreturn_t (*detect_int)(int, void *), void *data)
  168. {
  169. return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
  170. IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
  171. "mmc-spi-detect", data);
  172. }
  173. static void bfin_mmc_spi_exit(struct device *dev, void *data)
  174. {
  175. free_irq(MMC_SPI_CARD_DETECT_INT, data);
  176. }
  177. static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
  178. .init = bfin_mmc_spi_init,
  179. .exit = bfin_mmc_spi_exit,
  180. .detect_delay = 100, /* msecs */
  181. };
  182. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  183. .enable_dma = 0,
  184. .pio_interrupt = 0,
  185. };
  186. #endif
  187. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  188. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  189. {
  190. /* the modalias must be the same as spi device driver name */
  191. .modalias = "m25p80", /* Name of spi_driver for this device */
  192. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  193. .bus_num = 0, /* Framework bus number */
  194. .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
  195. .platform_data = &bfin_spi_flash_data,
  196. .controller_data = &spi_flash_chip_info,
  197. .mode = SPI_MODE_3,
  198. },
  199. #endif
  200. #if defined(CONFIG_SND_BF5XX_SOC_AD1836) || \
  201. defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
  202. {
  203. .modalias = "ad1836",
  204. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  205. .bus_num = 0,
  206. .chip_select = 4,
  207. .platform_data = "ad1836", /* only includes chip name for the moment */
  208. .mode = SPI_MODE_3,
  209. },
  210. #endif
  211. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  212. {
  213. .modalias = "spidev",
  214. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  215. .bus_num = 0,
  216. .chip_select = 1,
  217. },
  218. #endif
  219. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  220. {
  221. .modalias = "mmc_spi",
  222. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  223. .bus_num = 0,
  224. .chip_select = 4,
  225. .platform_data = &bfin_mmc_spi_pdata,
  226. .controller_data = &mmc_spi_chip_info,
  227. .mode = SPI_MODE_3,
  228. },
  229. #endif
  230. };
  231. #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
  232. /* SPI (0) */
  233. static struct resource bfin_spi0_resource[] = {
  234. [0] = {
  235. .start = SPI0_REGBASE,
  236. .end = SPI0_REGBASE + 0xFF,
  237. .flags = IORESOURCE_MEM,
  238. },
  239. [1] = {
  240. .start = CH_SPI,
  241. .end = CH_SPI,
  242. .flags = IORESOURCE_DMA,
  243. },
  244. [2] = {
  245. .start = IRQ_SPI,
  246. .end = IRQ_SPI,
  247. .flags = IORESOURCE_IRQ,
  248. }
  249. };
  250. /* SPI controller data */
  251. static struct bfin5xx_spi_master bfin_spi0_info = {
  252. .num_chipselect = 8,
  253. .enable_dma = 1, /* master has the ability to do dma transfer */
  254. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  255. };
  256. static struct platform_device bfin_spi0_device = {
  257. .name = "bfin-spi",
  258. .id = 0, /* Bus number */
  259. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  260. .resource = bfin_spi0_resource,
  261. .dev = {
  262. .platform_data = &bfin_spi0_info, /* Passed to driver */
  263. },
  264. };
  265. #endif /* spi master and devices */
  266. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  267. #ifdef CONFIG_SERIAL_BFIN_UART0
  268. static struct resource bfin_uart0_resources[] = {
  269. {
  270. .start = BFIN_UART_THR,
  271. .end = BFIN_UART_GCTL+2,
  272. .flags = IORESOURCE_MEM,
  273. },
  274. {
  275. .start = IRQ_UART0_TX,
  276. .end = IRQ_UART0_TX,
  277. .flags = IORESOURCE_IRQ,
  278. },
  279. {
  280. .start = IRQ_UART0_RX,
  281. .end = IRQ_UART0_RX,
  282. .flags = IORESOURCE_IRQ,
  283. },
  284. {
  285. .start = IRQ_UART0_ERROR,
  286. .end = IRQ_UART0_ERROR,
  287. .flags = IORESOURCE_IRQ,
  288. },
  289. {
  290. .start = CH_UART0_TX,
  291. .end = CH_UART0_TX,
  292. .flags = IORESOURCE_DMA,
  293. },
  294. {
  295. .start = CH_UART0_RX,
  296. .end = CH_UART0_RX,
  297. .flags = IORESOURCE_DMA,
  298. },
  299. };
  300. static unsigned short bfin_uart0_peripherals[] = {
  301. P_UART0_TX, P_UART0_RX, 0
  302. };
  303. static struct platform_device bfin_uart0_device = {
  304. .name = "bfin-uart",
  305. .id = 0,
  306. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  307. .resource = bfin_uart0_resources,
  308. .dev = {
  309. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  310. },
  311. };
  312. #endif
  313. #endif
  314. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  315. #ifdef CONFIG_BFIN_SIR0
  316. static struct resource bfin_sir0_resources[] = {
  317. {
  318. .start = 0xFFC00400,
  319. .end = 0xFFC004FF,
  320. .flags = IORESOURCE_MEM,
  321. },
  322. {
  323. .start = IRQ_UART0_RX,
  324. .end = IRQ_UART0_RX+1,
  325. .flags = IORESOURCE_IRQ,
  326. },
  327. {
  328. .start = CH_UART0_RX,
  329. .end = CH_UART0_RX+1,
  330. .flags = IORESOURCE_DMA,
  331. },
  332. };
  333. static struct platform_device bfin_sir0_device = {
  334. .name = "bfin_sir",
  335. .id = 0,
  336. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  337. .resource = bfin_sir0_resources,
  338. };
  339. #endif
  340. #endif
  341. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  342. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  343. static struct resource bfin_sport0_uart_resources[] = {
  344. {
  345. .start = SPORT0_TCR1,
  346. .end = SPORT0_MRCS3+4,
  347. .flags = IORESOURCE_MEM,
  348. },
  349. {
  350. .start = IRQ_SPORT0_RX,
  351. .end = IRQ_SPORT0_RX+1,
  352. .flags = IORESOURCE_IRQ,
  353. },
  354. {
  355. .start = IRQ_SPORT0_ERROR,
  356. .end = IRQ_SPORT0_ERROR,
  357. .flags = IORESOURCE_IRQ,
  358. },
  359. };
  360. static unsigned short bfin_sport0_peripherals[] = {
  361. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  362. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
  363. };
  364. static struct platform_device bfin_sport0_uart_device = {
  365. .name = "bfin-sport-uart",
  366. .id = 0,
  367. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  368. .resource = bfin_sport0_uart_resources,
  369. .dev = {
  370. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  371. },
  372. };
  373. #endif
  374. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  375. static struct resource bfin_sport1_uart_resources[] = {
  376. {
  377. .start = SPORT1_TCR1,
  378. .end = SPORT1_MRCS3+4,
  379. .flags = IORESOURCE_MEM,
  380. },
  381. {
  382. .start = IRQ_SPORT1_RX,
  383. .end = IRQ_SPORT1_RX+1,
  384. .flags = IORESOURCE_IRQ,
  385. },
  386. {
  387. .start = IRQ_SPORT1_ERROR,
  388. .end = IRQ_SPORT1_ERROR,
  389. .flags = IORESOURCE_IRQ,
  390. },
  391. };
  392. static unsigned short bfin_sport1_peripherals[] = {
  393. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  394. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  395. };
  396. static struct platform_device bfin_sport1_uart_device = {
  397. .name = "bfin-sport-uart",
  398. .id = 1,
  399. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  400. .resource = bfin_sport1_uart_resources,
  401. .dev = {
  402. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  403. },
  404. };
  405. #endif
  406. #endif
  407. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  408. #include <linux/input.h>
  409. #include <linux/gpio_keys.h>
  410. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  411. {BTN_0, GPIO_PF5, 0, "gpio-keys: BTN0"},
  412. {BTN_1, GPIO_PF6, 0, "gpio-keys: BTN1"},
  413. {BTN_2, GPIO_PF8, 0, "gpio-keys: BTN2"},
  414. };
  415. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  416. .buttons = bfin_gpio_keys_table,
  417. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  418. };
  419. static struct platform_device bfin_device_gpiokeys = {
  420. .name = "gpio-keys",
  421. .dev = {
  422. .platform_data = &bfin_gpio_keys_data,
  423. },
  424. };
  425. #endif
  426. #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
  427. #include <linux/i2c-gpio.h>
  428. static struct i2c_gpio_platform_data i2c_gpio_data = {
  429. .sda_pin = GPIO_PF2,
  430. .scl_pin = GPIO_PF3,
  431. .sda_is_open_drain = 0,
  432. .scl_is_open_drain = 0,
  433. .udelay = 10,
  434. };
  435. static struct platform_device i2c_gpio_device = {
  436. .name = "i2c-gpio",
  437. .id = 0,
  438. .dev = {
  439. .platform_data = &i2c_gpio_data,
  440. },
  441. };
  442. #endif
  443. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  444. #if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE)
  445. {
  446. I2C_BOARD_INFO("ad7142_joystick", 0x2C),
  447. .irq = 39,
  448. },
  449. #endif
  450. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  451. {
  452. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  453. },
  454. #endif
  455. #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
  456. {
  457. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  458. .irq = 39,
  459. },
  460. #endif
  461. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  462. {
  463. I2C_BOARD_INFO("bfin-adv7393", 0x2B),
  464. },
  465. #endif
  466. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  467. {
  468. I2C_BOARD_INFO("ad5252", 0x2f),
  469. },
  470. #endif
  471. };
  472. static const unsigned int cclk_vlev_datasheet[] =
  473. {
  474. VRPAIR(VLEV_085, 250000000),
  475. VRPAIR(VLEV_090, 376000000),
  476. VRPAIR(VLEV_095, 426000000),
  477. VRPAIR(VLEV_100, 426000000),
  478. VRPAIR(VLEV_105, 476000000),
  479. VRPAIR(VLEV_110, 476000000),
  480. VRPAIR(VLEV_115, 476000000),
  481. VRPAIR(VLEV_120, 600000000),
  482. VRPAIR(VLEV_125, 600000000),
  483. VRPAIR(VLEV_130, 600000000),
  484. };
  485. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  486. .tuple_tab = cclk_vlev_datasheet,
  487. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  488. .vr_settling_time = 25 /* us */,
  489. };
  490. static struct platform_device bfin_dpmc = {
  491. .name = "bfin dpmc",
  492. .dev = {
  493. .platform_data = &bfin_dmpc_vreg_data,
  494. },
  495. };
  496. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \
  497. defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE) \
  498. || defined(CONFIG_SND_BF5XX_AC97) || \
  499. defined(CONFIG_SND_BF5XX_AC97_MODULE)
  500. #include <asm/bfin_sport.h>
  501. #define SPORT_REQ(x) \
  502. [x] = {P_SPORT##x##_TFS, P_SPORT##x##_DTPRI, P_SPORT##x##_TSCLK, \
  503. P_SPORT##x##_RFS, P_SPORT##x##_DRPRI, P_SPORT##x##_RSCLK, 0}
  504. static const u16 bfin_snd_pin[][7] = {
  505. SPORT_REQ(0),
  506. SPORT_REQ(1),
  507. };
  508. static struct bfin_snd_platform_data bfin_snd_data[] = {
  509. {
  510. .pin_req = &bfin_snd_pin[0][0],
  511. },
  512. {
  513. .pin_req = &bfin_snd_pin[1][0],
  514. },
  515. };
  516. #define BFIN_SND_RES(x) \
  517. [x] = { \
  518. { \
  519. .start = SPORT##x##_TCR1, \
  520. .end = SPORT##x##_TCR1, \
  521. .flags = IORESOURCE_MEM \
  522. }, \
  523. { \
  524. .start = CH_SPORT##x##_RX, \
  525. .end = CH_SPORT##x##_RX, \
  526. .flags = IORESOURCE_DMA, \
  527. }, \
  528. { \
  529. .start = CH_SPORT##x##_TX, \
  530. .end = CH_SPORT##x##_TX, \
  531. .flags = IORESOURCE_DMA, \
  532. }, \
  533. { \
  534. .start = IRQ_SPORT##x##_ERROR, \
  535. .end = IRQ_SPORT##x##_ERROR, \
  536. .flags = IORESOURCE_IRQ, \
  537. } \
  538. }
  539. static struct resource bfin_snd_resources[][4] = {
  540. BFIN_SND_RES(0),
  541. BFIN_SND_RES(1),
  542. };
  543. #endif
  544. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  545. static struct platform_device bfin_i2s_pcm = {
  546. .name = "bfin-i2s-pcm-audio",
  547. .id = -1,
  548. };
  549. #endif
  550. #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
  551. static struct platform_device bfin_tdm_pcm = {
  552. .name = "bfin-tdm-pcm-audio",
  553. .id = -1,
  554. };
  555. #endif
  556. #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
  557. static struct platform_device bfin_ac97_pcm = {
  558. .name = "bfin-ac97-pcm-audio",
  559. .id = -1,
  560. };
  561. #endif
  562. #if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
  563. || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
  564. static const char * const ad1836_link[] = {
  565. "bfin-tdm.0",
  566. "spi0.4",
  567. };
  568. static struct platform_device bfin_ad1836_machine = {
  569. .name = "bfin-snd-ad1836",
  570. .id = -1,
  571. .dev = {
  572. .platform_data = (void *)ad1836_link,
  573. },
  574. };
  575. #endif
  576. #if defined(CONFIG_SND_BF5XX_SOC_AD73311) || \
  577. defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE)
  578. static const unsigned ad73311_gpio[] = {
  579. GPIO_PF4,
  580. };
  581. static struct platform_device bfin_ad73311_machine = {
  582. .name = "bfin-snd-ad73311",
  583. .id = 1,
  584. .dev = {
  585. .platform_data = (void *)ad73311_gpio,
  586. },
  587. };
  588. #endif
  589. #if defined(CONFIG_SND_SOC_AD73311) || defined(CONFIG_SND_SOC_AD73311_MODULE)
  590. static struct platform_device bfin_ad73311_codec_device = {
  591. .name = "ad73311",
  592. .id = -1,
  593. };
  594. #endif
  595. #if defined(CONFIG_SND_SOC_AD74111) || defined(CONFIG_SND_SOC_AD74111_MODULE)
  596. static struct platform_device bfin_ad74111_codec_device = {
  597. .name = "ad74111",
  598. .id = -1,
  599. };
  600. #endif
  601. #if defined(CONFIG_SND_BF5XX_SOC_I2S) || \
  602. defined(CONFIG_SND_BF5XX_SOC_I2S_MODULE)
  603. static struct platform_device bfin_i2s = {
  604. .name = "bfin-i2s",
  605. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  606. .num_resources =
  607. ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
  608. .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
  609. .dev = {
  610. .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
  611. },
  612. };
  613. #endif
  614. #if defined(CONFIG_SND_BF5XX_SOC_TDM) || \
  615. defined(CONFIG_SND_BF5XX_SOC_TDM_MODULE)
  616. static struct platform_device bfin_tdm = {
  617. .name = "bfin-tdm",
  618. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  619. .num_resources =
  620. ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
  621. .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
  622. .dev = {
  623. .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
  624. },
  625. };
  626. #endif
  627. #if defined(CONFIG_SND_BF5XX_SOC_AC97) || \
  628. defined(CONFIG_SND_BF5XX_SOC_AC97_MODULE)
  629. static struct platform_device bfin_ac97 = {
  630. .name = "bfin-ac97",
  631. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  632. .num_resources =
  633. ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
  634. .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
  635. .dev = {
  636. .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
  637. },
  638. };
  639. #endif
  640. static struct platform_device *stamp_devices[] __initdata = {
  641. &bfin_dpmc,
  642. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  643. &rtc_device,
  644. #endif
  645. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  646. &smc91x_device,
  647. #endif
  648. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  649. &net2272_bfin_device,
  650. #endif
  651. #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
  652. &bfin_spi0_device,
  653. #endif
  654. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  655. #ifdef CONFIG_SERIAL_BFIN_UART0
  656. &bfin_uart0_device,
  657. #endif
  658. #endif
  659. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  660. #ifdef CONFIG_BFIN_SIR0
  661. &bfin_sir0_device,
  662. #endif
  663. #endif
  664. #if defined(CONFIG_SERIAL_BFIN_SPORT) || \
  665. defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  666. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  667. &bfin_sport0_uart_device,
  668. #endif
  669. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  670. &bfin_sport1_uart_device,
  671. #endif
  672. #endif
  673. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  674. &bfin_device_gpiokeys,
  675. #endif
  676. #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
  677. &i2c_gpio_device,
  678. #endif
  679. #if defined(CONFIG_MTD_BFIN_ASYNC) || defined(CONFIG_MTD_BFIN_ASYNC_MODULE)
  680. &stamp_flash_device,
  681. #endif
  682. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  683. &bfin_i2s_pcm,
  684. #endif
  685. #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
  686. &bfin_tdm_pcm,
  687. #endif
  688. #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
  689. &bfin_ac97_pcm,
  690. #endif
  691. #if defined(CONFIG_SND_BF5XX_SOC_AD1836) || \
  692. defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
  693. &bfin_ad1836_machine,
  694. #endif
  695. #if defined(CONFIG_SND_BF5XX_SOC_AD73311) || \
  696. defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE)
  697. &bfin_ad73311_machine,
  698. #endif
  699. #if defined(CONFIG_SND_SOC_AD73311) || defined(CONFIG_SND_SOC_AD73311_MODULE)
  700. &bfin_ad73311_codec_device,
  701. #endif
  702. #if defined(CONFIG_SND_SOC_AD74111) || defined(CONFIG_SND_SOC_AD74111_MODULE)
  703. &bfin_ad74111_codec_device,
  704. #endif
  705. #if defined(CONFIG_SND_BF5XX_SOC_I2S) || \
  706. defined(CONFIG_SND_BF5XX_SOC_I2S_MODULE)
  707. &bfin_i2s,
  708. #endif
  709. #if defined(CONFIG_SND_BF5XX_SOC_TDM) || \
  710. defined(CONFIG_SND_BF5XX_SOC_TDM_MODULE)
  711. &bfin_tdm,
  712. #endif
  713. #if defined(CONFIG_SND_BF5XX_SOC_AC97) || \
  714. defined(CONFIG_SND_BF5XX_SOC_AC97_MODULE)
  715. &bfin_ac97,
  716. #endif
  717. };
  718. static int __init net2272_init(void)
  719. {
  720. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  721. int ret;
  722. /* Set PF0 to 0, PF1 to 1 make /AMS3 work properly */
  723. ret = gpio_request(GPIO_PF0, "net2272");
  724. if (ret)
  725. return ret;
  726. ret = gpio_request(GPIO_PF1, "net2272");
  727. if (ret) {
  728. gpio_free(GPIO_PF0);
  729. return ret;
  730. }
  731. ret = gpio_request(GPIO_PF11, "net2272");
  732. if (ret) {
  733. gpio_free(GPIO_PF0);
  734. gpio_free(GPIO_PF1);
  735. return ret;
  736. }
  737. gpio_direction_output(GPIO_PF0, 0);
  738. gpio_direction_output(GPIO_PF1, 1);
  739. /* Reset the USB chip */
  740. gpio_direction_output(GPIO_PF11, 0);
  741. mdelay(2);
  742. gpio_set_value(GPIO_PF11, 1);
  743. #endif
  744. return 0;
  745. }
  746. static int __init stamp_init(void)
  747. {
  748. int ret;
  749. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  750. i2c_register_board_info(0, bfin_i2c_board_info,
  751. ARRAY_SIZE(bfin_i2c_board_info));
  752. ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  753. if (ret < 0)
  754. return ret;
  755. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  756. /*
  757. * setup BF533_STAMP CPLD to route AMS3 to Ethernet MAC.
  758. * the bfin-async-map driver takes care of flipping between
  759. * flash and ethernet when necessary.
  760. */
  761. ret = gpio_request(GPIO_PF0, "enet_cpld");
  762. if (!ret) {
  763. gpio_direction_output(GPIO_PF0, 1);
  764. gpio_free(GPIO_PF0);
  765. }
  766. #endif
  767. if (net2272_init())
  768. pr_warning("unable to configure net2272; it probably won't work\n");
  769. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  770. return 0;
  771. }
  772. arch_initcall(stamp_init);
  773. static struct platform_device *stamp_early_devices[] __initdata = {
  774. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  775. #ifdef CONFIG_SERIAL_BFIN_UART0
  776. &bfin_uart0_device,
  777. #endif
  778. #endif
  779. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  780. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  781. &bfin_sport0_uart_device,
  782. #endif
  783. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  784. &bfin_sport1_uart_device,
  785. #endif
  786. #endif
  787. };
  788. void __init native_machine_early_platform_add_devices(void)
  789. {
  790. printk(KERN_INFO "register early platform devices\n");
  791. early_platform_add_devices(stamp_early_devices,
  792. ARRAY_SIZE(stamp_early_devices));
  793. }
  794. void native_machine_restart(char *cmd)
  795. {
  796. /* workaround pull up on cpld / flash pin not being strong enough */
  797. gpio_request(GPIO_PF0, "flash_cpld");
  798. gpio_direction_output(GPIO_PF0, 0);
  799. }