tcm-bf518.c 17 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/etherdevice.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/mtd/mtd.h>
  12. #include <linux/mtd/partitions.h>
  13. #include <linux/mtd/physmap.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/spi/flash.h>
  16. #include <linux/i2c.h>
  17. #include <linux/irq.h>
  18. #include <linux/interrupt.h>
  19. #include <asm/dma.h>
  20. #include <asm/bfin5xx_spi.h>
  21. #include <asm/reboot.h>
  22. #include <asm/portmux.h>
  23. #include <asm/dpmc.h>
  24. #include <asm/bfin_sdh.h>
  25. #include <linux/spi/ad7877.h>
  26. #include <net/dsa.h>
  27. /*
  28. * Name the Board for the /proc/cpuinfo
  29. */
  30. const char bfin_board_name[] = "Bluetechnix TCM-BF518";
  31. /*
  32. * Driver needs to know address, irq and flag pin.
  33. */
  34. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  35. static struct mtd_partition tcm_partitions[] = {
  36. {
  37. .name = "bootloader(nor)",
  38. .size = 0x40000,
  39. .offset = 0,
  40. },
  41. {
  42. .name = "linux(nor)",
  43. .size = 0x1C0000,
  44. .offset = MTDPART_OFS_APPEND,
  45. }
  46. };
  47. static struct physmap_flash_data tcm_flash_data = {
  48. .width = 2,
  49. .parts = tcm_partitions,
  50. .nr_parts = ARRAY_SIZE(tcm_partitions),
  51. };
  52. static struct resource tcm_flash_resource = {
  53. .start = 0x20000000,
  54. .end = 0x201fffff,
  55. .flags = IORESOURCE_MEM,
  56. };
  57. static struct platform_device tcm_flash_device = {
  58. .name = "physmap-flash",
  59. .id = 0,
  60. .dev = {
  61. .platform_data = &tcm_flash_data,
  62. },
  63. .num_resources = 1,
  64. .resource = &tcm_flash_resource,
  65. };
  66. #endif
  67. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  68. static struct platform_device rtc_device = {
  69. .name = "rtc-bfin",
  70. .id = -1,
  71. };
  72. #endif
  73. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  74. #include <linux/bfin_mac.h>
  75. static const unsigned short bfin_mac_peripherals[] = P_MII0;
  76. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  77. {
  78. .addr = 1,
  79. .irq = IRQ_MAC_PHYINT,
  80. },
  81. };
  82. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  83. .phydev_number = 1,
  84. .phydev_data = bfin_phydev_data,
  85. .phy_mode = PHY_INTERFACE_MODE_MII,
  86. .mac_peripherals = bfin_mac_peripherals,
  87. };
  88. static struct platform_device bfin_mii_bus = {
  89. .name = "bfin_mii_bus",
  90. .dev = {
  91. .platform_data = &bfin_mii_bus_data,
  92. }
  93. };
  94. static struct platform_device bfin_mac_device = {
  95. .name = "bfin_mac",
  96. .dev = {
  97. .platform_data = &bfin_mii_bus,
  98. }
  99. };
  100. #endif
  101. #if defined(CONFIG_MTD_M25P80) \
  102. || defined(CONFIG_MTD_M25P80_MODULE)
  103. static struct mtd_partition bfin_spi_flash_partitions[] = {
  104. {
  105. .name = "bootloader(spi)",
  106. .size = 0x00040000,
  107. .offset = 0,
  108. .mask_flags = MTD_CAP_ROM
  109. }, {
  110. .name = "linux kernel(spi)",
  111. .size = MTDPART_SIZ_FULL,
  112. .offset = MTDPART_OFS_APPEND,
  113. }
  114. };
  115. static struct flash_platform_data bfin_spi_flash_data = {
  116. .name = "m25p80",
  117. .parts = bfin_spi_flash_partitions,
  118. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  119. .type = "m25p16",
  120. };
  121. /* SPI flash chip (m25p64) */
  122. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  123. .enable_dma = 0, /* use dma transfer with this chip*/
  124. };
  125. #endif
  126. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  127. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  128. .enable_dma = 0,
  129. };
  130. #endif
  131. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  132. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  133. .model = 7877,
  134. .vref_delay_usecs = 50, /* internal, no capacitor */
  135. .x_plate_ohms = 419,
  136. .y_plate_ohms = 486,
  137. .pressure_max = 1000,
  138. .pressure_min = 0,
  139. .stopacq_polarity = 1,
  140. .first_conversion_delay = 3,
  141. .acquisition_time = 1,
  142. .averaging = 1,
  143. .pen_down_acc_interval = 1,
  144. };
  145. #endif
  146. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  147. #if defined(CONFIG_MTD_M25P80) \
  148. || defined(CONFIG_MTD_M25P80_MODULE)
  149. {
  150. /* the modalias must be the same as spi device driver name */
  151. .modalias = "m25p80", /* Name of spi_driver for this device */
  152. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  153. .bus_num = 0, /* Framework bus number */
  154. .chip_select = 2, /* SPI0_SSEL2 */
  155. .platform_data = &bfin_spi_flash_data,
  156. .controller_data = &spi_flash_chip_info,
  157. .mode = SPI_MODE_3,
  158. },
  159. #endif
  160. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  161. {
  162. .modalias = "mmc_spi",
  163. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  164. .bus_num = 0,
  165. .chip_select = 5,
  166. .controller_data = &mmc_spi_chip_info,
  167. .mode = SPI_MODE_3,
  168. },
  169. #endif
  170. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  171. {
  172. .modalias = "ad7877",
  173. .platform_data = &bfin_ad7877_ts_info,
  174. .irq = IRQ_PF8,
  175. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  176. .bus_num = 0,
  177. .chip_select = 2,
  178. },
  179. #endif
  180. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  181. && defined(CONFIG_SND_SOC_WM8731_SPI)
  182. {
  183. .modalias = "wm8731",
  184. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  185. .bus_num = 0,
  186. .chip_select = 5,
  187. .mode = SPI_MODE_0,
  188. },
  189. #endif
  190. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  191. {
  192. .modalias = "spidev",
  193. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  194. .bus_num = 0,
  195. .chip_select = 1,
  196. },
  197. #endif
  198. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  199. {
  200. .modalias = "bfin-lq035q1-spi",
  201. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  202. .bus_num = 0,
  203. .chip_select = 1,
  204. .mode = SPI_CPHA | SPI_CPOL,
  205. },
  206. #endif
  207. };
  208. /* SPI controller data */
  209. #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
  210. /* SPI (0) */
  211. static struct bfin5xx_spi_master bfin_spi0_info = {
  212. .num_chipselect = 6,
  213. .enable_dma = 1, /* master has the ability to do dma transfer */
  214. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  215. };
  216. static struct resource bfin_spi0_resource[] = {
  217. [0] = {
  218. .start = SPI0_REGBASE,
  219. .end = SPI0_REGBASE + 0xFF,
  220. .flags = IORESOURCE_MEM,
  221. },
  222. [1] = {
  223. .start = CH_SPI0,
  224. .end = CH_SPI0,
  225. .flags = IORESOURCE_DMA,
  226. },
  227. [2] = {
  228. .start = IRQ_SPI0,
  229. .end = IRQ_SPI0,
  230. .flags = IORESOURCE_IRQ,
  231. },
  232. };
  233. static struct platform_device bfin_spi0_device = {
  234. .name = "bfin-spi",
  235. .id = 0, /* Bus number */
  236. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  237. .resource = bfin_spi0_resource,
  238. .dev = {
  239. .platform_data = &bfin_spi0_info, /* Passed to driver */
  240. },
  241. };
  242. /* SPI (1) */
  243. static struct bfin5xx_spi_master bfin_spi1_info = {
  244. .num_chipselect = 6,
  245. .enable_dma = 1, /* master has the ability to do dma transfer */
  246. .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
  247. };
  248. static struct resource bfin_spi1_resource[] = {
  249. [0] = {
  250. .start = SPI1_REGBASE,
  251. .end = SPI1_REGBASE + 0xFF,
  252. .flags = IORESOURCE_MEM,
  253. },
  254. [1] = {
  255. .start = CH_SPI1,
  256. .end = CH_SPI1,
  257. .flags = IORESOURCE_DMA,
  258. },
  259. [2] = {
  260. .start = IRQ_SPI1,
  261. .end = IRQ_SPI1,
  262. .flags = IORESOURCE_IRQ,
  263. },
  264. };
  265. static struct platform_device bfin_spi1_device = {
  266. .name = "bfin-spi",
  267. .id = 1, /* Bus number */
  268. .num_resources = ARRAY_SIZE(bfin_spi1_resource),
  269. .resource = bfin_spi1_resource,
  270. .dev = {
  271. .platform_data = &bfin_spi1_info, /* Passed to driver */
  272. },
  273. };
  274. #endif /* spi master and devices */
  275. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  276. #ifdef CONFIG_SERIAL_BFIN_UART0
  277. static struct resource bfin_uart0_resources[] = {
  278. {
  279. .start = UART0_THR,
  280. .end = UART0_GCTL+2,
  281. .flags = IORESOURCE_MEM,
  282. },
  283. {
  284. .start = IRQ_UART0_TX,
  285. .end = IRQ_UART0_TX,
  286. .flags = IORESOURCE_IRQ,
  287. },
  288. {
  289. .start = IRQ_UART0_RX,
  290. .end = IRQ_UART0_RX,
  291. .flags = IORESOURCE_IRQ,
  292. },
  293. {
  294. .start = IRQ_UART0_ERROR,
  295. .end = IRQ_UART0_ERROR,
  296. .flags = IORESOURCE_IRQ,
  297. },
  298. {
  299. .start = CH_UART0_TX,
  300. .end = CH_UART0_TX,
  301. .flags = IORESOURCE_DMA,
  302. },
  303. {
  304. .start = CH_UART0_RX,
  305. .end = CH_UART0_RX,
  306. .flags = IORESOURCE_DMA,
  307. },
  308. };
  309. static unsigned short bfin_uart0_peripherals[] = {
  310. P_UART0_TX, P_UART0_RX, 0
  311. };
  312. static struct platform_device bfin_uart0_device = {
  313. .name = "bfin-uart",
  314. .id = 0,
  315. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  316. .resource = bfin_uart0_resources,
  317. .dev = {
  318. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  319. },
  320. };
  321. #endif
  322. #ifdef CONFIG_SERIAL_BFIN_UART1
  323. static struct resource bfin_uart1_resources[] = {
  324. {
  325. .start = UART1_THR,
  326. .end = UART1_GCTL+2,
  327. .flags = IORESOURCE_MEM,
  328. },
  329. {
  330. .start = IRQ_UART1_TX,
  331. .end = IRQ_UART1_TX,
  332. .flags = IORESOURCE_IRQ,
  333. },
  334. {
  335. .start = IRQ_UART1_RX,
  336. .end = IRQ_UART1_RX,
  337. .flags = IORESOURCE_IRQ,
  338. },
  339. {
  340. .start = IRQ_UART1_ERROR,
  341. .end = IRQ_UART1_ERROR,
  342. .flags = IORESOURCE_IRQ,
  343. },
  344. {
  345. .start = CH_UART1_TX,
  346. .end = CH_UART1_TX,
  347. .flags = IORESOURCE_DMA,
  348. },
  349. {
  350. .start = CH_UART1_RX,
  351. .end = CH_UART1_RX,
  352. .flags = IORESOURCE_DMA,
  353. },
  354. };
  355. static unsigned short bfin_uart1_peripherals[] = {
  356. P_UART1_TX, P_UART1_RX, 0
  357. };
  358. static struct platform_device bfin_uart1_device = {
  359. .name = "bfin-uart",
  360. .id = 1,
  361. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  362. .resource = bfin_uart1_resources,
  363. .dev = {
  364. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  365. },
  366. };
  367. #endif
  368. #endif
  369. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  370. #ifdef CONFIG_BFIN_SIR0
  371. static struct resource bfin_sir0_resources[] = {
  372. {
  373. .start = 0xFFC00400,
  374. .end = 0xFFC004FF,
  375. .flags = IORESOURCE_MEM,
  376. },
  377. {
  378. .start = IRQ_UART0_RX,
  379. .end = IRQ_UART0_RX+1,
  380. .flags = IORESOURCE_IRQ,
  381. },
  382. {
  383. .start = CH_UART0_RX,
  384. .end = CH_UART0_RX+1,
  385. .flags = IORESOURCE_DMA,
  386. },
  387. };
  388. static struct platform_device bfin_sir0_device = {
  389. .name = "bfin_sir",
  390. .id = 0,
  391. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  392. .resource = bfin_sir0_resources,
  393. };
  394. #endif
  395. #ifdef CONFIG_BFIN_SIR1
  396. static struct resource bfin_sir1_resources[] = {
  397. {
  398. .start = 0xFFC02000,
  399. .end = 0xFFC020FF,
  400. .flags = IORESOURCE_MEM,
  401. },
  402. {
  403. .start = IRQ_UART1_RX,
  404. .end = IRQ_UART1_RX+1,
  405. .flags = IORESOURCE_IRQ,
  406. },
  407. {
  408. .start = CH_UART1_RX,
  409. .end = CH_UART1_RX+1,
  410. .flags = IORESOURCE_DMA,
  411. },
  412. };
  413. static struct platform_device bfin_sir1_device = {
  414. .name = "bfin_sir",
  415. .id = 1,
  416. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  417. .resource = bfin_sir1_resources,
  418. };
  419. #endif
  420. #endif
  421. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  422. static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
  423. static struct resource bfin_twi0_resource[] = {
  424. [0] = {
  425. .start = TWI0_REGBASE,
  426. .end = TWI0_REGBASE,
  427. .flags = IORESOURCE_MEM,
  428. },
  429. [1] = {
  430. .start = IRQ_TWI,
  431. .end = IRQ_TWI,
  432. .flags = IORESOURCE_IRQ,
  433. },
  434. };
  435. static struct platform_device i2c_bfin_twi_device = {
  436. .name = "i2c-bfin-twi",
  437. .id = 0,
  438. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  439. .resource = bfin_twi0_resource,
  440. .dev = {
  441. .platform_data = &bfin_twi0_pins,
  442. },
  443. };
  444. #endif
  445. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  446. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  447. {
  448. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  449. },
  450. #endif
  451. #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
  452. {
  453. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  454. .irq = IRQ_PF8,
  455. },
  456. #endif
  457. };
  458. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  459. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  460. static struct resource bfin_sport0_uart_resources[] = {
  461. {
  462. .start = SPORT0_TCR1,
  463. .end = SPORT0_MRCS3+4,
  464. .flags = IORESOURCE_MEM,
  465. },
  466. {
  467. .start = IRQ_SPORT0_RX,
  468. .end = IRQ_SPORT0_RX+1,
  469. .flags = IORESOURCE_IRQ,
  470. },
  471. {
  472. .start = IRQ_SPORT0_ERROR,
  473. .end = IRQ_SPORT0_ERROR,
  474. .flags = IORESOURCE_IRQ,
  475. },
  476. };
  477. static unsigned short bfin_sport0_peripherals[] = {
  478. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  479. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
  480. };
  481. static struct platform_device bfin_sport0_uart_device = {
  482. .name = "bfin-sport-uart",
  483. .id = 0,
  484. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  485. .resource = bfin_sport0_uart_resources,
  486. .dev = {
  487. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  488. },
  489. };
  490. #endif
  491. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  492. static struct resource bfin_sport1_uart_resources[] = {
  493. {
  494. .start = SPORT1_TCR1,
  495. .end = SPORT1_MRCS3+4,
  496. .flags = IORESOURCE_MEM,
  497. },
  498. {
  499. .start = IRQ_SPORT1_RX,
  500. .end = IRQ_SPORT1_RX+1,
  501. .flags = IORESOURCE_IRQ,
  502. },
  503. {
  504. .start = IRQ_SPORT1_ERROR,
  505. .end = IRQ_SPORT1_ERROR,
  506. .flags = IORESOURCE_IRQ,
  507. },
  508. };
  509. static unsigned short bfin_sport1_peripherals[] = {
  510. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  511. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  512. };
  513. static struct platform_device bfin_sport1_uart_device = {
  514. .name = "bfin-sport-uart",
  515. .id = 1,
  516. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  517. .resource = bfin_sport1_uart_resources,
  518. .dev = {
  519. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  520. },
  521. };
  522. #endif
  523. #endif
  524. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  525. #include <linux/input.h>
  526. #include <linux/gpio_keys.h>
  527. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  528. {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
  529. {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
  530. };
  531. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  532. .buttons = bfin_gpio_keys_table,
  533. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  534. };
  535. static struct platform_device bfin_device_gpiokeys = {
  536. .name = "gpio-keys",
  537. .dev = {
  538. .platform_data = &bfin_gpio_keys_data,
  539. },
  540. };
  541. #endif
  542. #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
  543. static struct bfin_sd_host bfin_sdh_data = {
  544. .dma_chan = CH_RSI,
  545. .irq_int0 = IRQ_RSI_INT0,
  546. .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
  547. };
  548. static struct platform_device bf51x_sdh_device = {
  549. .name = "bfin-sdh",
  550. .id = 0,
  551. .dev = {
  552. .platform_data = &bfin_sdh_data,
  553. },
  554. };
  555. #endif
  556. static const unsigned int cclk_vlev_datasheet[] =
  557. {
  558. VRPAIR(VLEV_100, 400000000),
  559. VRPAIR(VLEV_105, 426000000),
  560. VRPAIR(VLEV_110, 500000000),
  561. VRPAIR(VLEV_115, 533000000),
  562. VRPAIR(VLEV_120, 600000000),
  563. };
  564. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  565. .tuple_tab = cclk_vlev_datasheet,
  566. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  567. .vr_settling_time = 25 /* us */,
  568. };
  569. static struct platform_device bfin_dpmc = {
  570. .name = "bfin dpmc",
  571. .dev = {
  572. .platform_data = &bfin_dmpc_vreg_data,
  573. },
  574. };
  575. static struct platform_device *tcm_devices[] __initdata = {
  576. &bfin_dpmc,
  577. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  578. &rtc_device,
  579. #endif
  580. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  581. &bfin_mii_bus,
  582. &bfin_mac_device,
  583. #endif
  584. #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
  585. &bfin_spi0_device,
  586. &bfin_spi1_device,
  587. #endif
  588. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  589. #ifdef CONFIG_SERIAL_BFIN_UART0
  590. &bfin_uart0_device,
  591. #endif
  592. #ifdef CONFIG_SERIAL_BFIN_UART1
  593. &bfin_uart1_device,
  594. #endif
  595. #endif
  596. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  597. #ifdef CONFIG_BFIN_SIR0
  598. &bfin_sir0_device,
  599. #endif
  600. #ifdef CONFIG_BFIN_SIR1
  601. &bfin_sir1_device,
  602. #endif
  603. #endif
  604. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  605. &i2c_bfin_twi_device,
  606. #endif
  607. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  608. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  609. &bfin_sport0_uart_device,
  610. #endif
  611. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  612. &bfin_sport1_uart_device,
  613. #endif
  614. #endif
  615. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  616. &bfin_device_gpiokeys,
  617. #endif
  618. #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
  619. &bf51x_sdh_device,
  620. #endif
  621. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  622. &tcm_flash_device,
  623. #endif
  624. };
  625. static int __init tcm_init(void)
  626. {
  627. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  628. i2c_register_board_info(0, bfin_i2c_board_info,
  629. ARRAY_SIZE(bfin_i2c_board_info));
  630. platform_add_devices(tcm_devices, ARRAY_SIZE(tcm_devices));
  631. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  632. return 0;
  633. }
  634. arch_initcall(tcm_init);
  635. static struct platform_device *tcm_early_devices[] __initdata = {
  636. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  637. #ifdef CONFIG_SERIAL_BFIN_UART0
  638. &bfin_uart0_device,
  639. #endif
  640. #ifdef CONFIG_SERIAL_BFIN_UART1
  641. &bfin_uart1_device,
  642. #endif
  643. #endif
  644. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  645. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  646. &bfin_sport0_uart_device,
  647. #endif
  648. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  649. &bfin_sport1_uart_device,
  650. #endif
  651. #endif
  652. };
  653. void __init native_machine_early_platform_add_devices(void)
  654. {
  655. printk(KERN_INFO "register early platform devices\n");
  656. early_platform_add_devices(tcm_early_devices,
  657. ARRAY_SIZE(tcm_early_devices));
  658. }
  659. void native_machine_restart(char *cmd)
  660. {
  661. /* workaround reboot hang when booting from SPI */
  662. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  663. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  664. }
  665. int bfin_get_ether_addr(char *addr)
  666. {
  667. return 1;
  668. }
  669. EXPORT_SYMBOL(bfin_get_ether_addr);