s5p-time.c 8.6 KB

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  1. /*
  2. * Copyright (c) 2011 Samsung Electronics Co., Ltd.
  3. * http://www.samsung.com/
  4. *
  5. * S5P - Common hr-timer support
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/interrupt.h>
  12. #include <linux/irq.h>
  13. #include <linux/err.h>
  14. #include <linux/clk.h>
  15. #include <linux/clockchips.h>
  16. #include <linux/platform_device.h>
  17. #include <asm/smp_twd.h>
  18. #include <asm/mach/time.h>
  19. #include <asm/mach/arch.h>
  20. #include <asm/mach/map.h>
  21. #include <asm/sched_clock.h>
  22. #include <mach/map.h>
  23. #include <plat/devs.h>
  24. #include <plat/regs-timer.h>
  25. #include <plat/s5p-time.h>
  26. static struct clk *tin_event;
  27. static struct clk *tin_source;
  28. static struct clk *tdiv_event;
  29. static struct clk *tdiv_source;
  30. static struct clk *timerclk;
  31. static struct s5p_timer_source timer_source;
  32. static unsigned long clock_count_per_tick;
  33. static void s5p_timer_resume(void);
  34. static void s5p_time_stop(enum s5p_timer_mode mode)
  35. {
  36. unsigned long tcon;
  37. tcon = __raw_readl(S3C2410_TCON);
  38. switch (mode) {
  39. case S5P_PWM0:
  40. tcon &= ~S3C2410_TCON_T0START;
  41. break;
  42. case S5P_PWM1:
  43. tcon &= ~S3C2410_TCON_T1START;
  44. break;
  45. case S5P_PWM2:
  46. tcon &= ~S3C2410_TCON_T2START;
  47. break;
  48. case S5P_PWM3:
  49. tcon &= ~S3C2410_TCON_T3START;
  50. break;
  51. case S5P_PWM4:
  52. tcon &= ~S3C2410_TCON_T4START;
  53. break;
  54. default:
  55. printk(KERN_ERR "Invalid Timer %d\n", mode);
  56. break;
  57. }
  58. __raw_writel(tcon, S3C2410_TCON);
  59. }
  60. static void s5p_time_setup(enum s5p_timer_mode mode, unsigned long tcnt)
  61. {
  62. unsigned long tcon;
  63. tcon = __raw_readl(S3C2410_TCON);
  64. tcnt--;
  65. switch (mode) {
  66. case S5P_PWM0:
  67. tcon &= ~(0x0f << 0);
  68. tcon |= S3C2410_TCON_T0MANUALUPD;
  69. break;
  70. case S5P_PWM1:
  71. tcon &= ~(0x0f << 8);
  72. tcon |= S3C2410_TCON_T1MANUALUPD;
  73. break;
  74. case S5P_PWM2:
  75. tcon &= ~(0x0f << 12);
  76. tcon |= S3C2410_TCON_T2MANUALUPD;
  77. break;
  78. case S5P_PWM3:
  79. tcon &= ~(0x0f << 16);
  80. tcon |= S3C2410_TCON_T3MANUALUPD;
  81. break;
  82. case S5P_PWM4:
  83. tcon &= ~(0x07 << 20);
  84. tcon |= S3C2410_TCON_T4MANUALUPD;
  85. break;
  86. default:
  87. printk(KERN_ERR "Invalid Timer %d\n", mode);
  88. break;
  89. }
  90. __raw_writel(tcnt, S3C2410_TCNTB(mode));
  91. __raw_writel(tcnt, S3C2410_TCMPB(mode));
  92. __raw_writel(tcon, S3C2410_TCON);
  93. }
  94. static void s5p_time_start(enum s5p_timer_mode mode, bool periodic)
  95. {
  96. unsigned long tcon;
  97. tcon = __raw_readl(S3C2410_TCON);
  98. switch (mode) {
  99. case S5P_PWM0:
  100. tcon |= S3C2410_TCON_T0START;
  101. tcon &= ~S3C2410_TCON_T0MANUALUPD;
  102. if (periodic)
  103. tcon |= S3C2410_TCON_T0RELOAD;
  104. else
  105. tcon &= ~S3C2410_TCON_T0RELOAD;
  106. break;
  107. case S5P_PWM1:
  108. tcon |= S3C2410_TCON_T1START;
  109. tcon &= ~S3C2410_TCON_T1MANUALUPD;
  110. if (periodic)
  111. tcon |= S3C2410_TCON_T1RELOAD;
  112. else
  113. tcon &= ~S3C2410_TCON_T1RELOAD;
  114. break;
  115. case S5P_PWM2:
  116. tcon |= S3C2410_TCON_T2START;
  117. tcon &= ~S3C2410_TCON_T2MANUALUPD;
  118. if (periodic)
  119. tcon |= S3C2410_TCON_T2RELOAD;
  120. else
  121. tcon &= ~S3C2410_TCON_T2RELOAD;
  122. break;
  123. case S5P_PWM3:
  124. tcon |= S3C2410_TCON_T3START;
  125. tcon &= ~S3C2410_TCON_T3MANUALUPD;
  126. if (periodic)
  127. tcon |= S3C2410_TCON_T3RELOAD;
  128. else
  129. tcon &= ~S3C2410_TCON_T3RELOAD;
  130. break;
  131. case S5P_PWM4:
  132. tcon |= S3C2410_TCON_T4START;
  133. tcon &= ~S3C2410_TCON_T4MANUALUPD;
  134. if (periodic)
  135. tcon |= S3C2410_TCON_T4RELOAD;
  136. else
  137. tcon &= ~S3C2410_TCON_T4RELOAD;
  138. break;
  139. default:
  140. printk(KERN_ERR "Invalid Timer %d\n", mode);
  141. break;
  142. }
  143. __raw_writel(tcon, S3C2410_TCON);
  144. }
  145. static int s5p_set_next_event(unsigned long cycles,
  146. struct clock_event_device *evt)
  147. {
  148. s5p_time_setup(timer_source.event_id, cycles);
  149. s5p_time_start(timer_source.event_id, NON_PERIODIC);
  150. return 0;
  151. }
  152. static void s5p_set_mode(enum clock_event_mode mode,
  153. struct clock_event_device *evt)
  154. {
  155. s5p_time_stop(timer_source.event_id);
  156. switch (mode) {
  157. case CLOCK_EVT_MODE_PERIODIC:
  158. s5p_time_setup(timer_source.event_id, clock_count_per_tick);
  159. s5p_time_start(timer_source.event_id, PERIODIC);
  160. break;
  161. case CLOCK_EVT_MODE_ONESHOT:
  162. break;
  163. case CLOCK_EVT_MODE_UNUSED:
  164. case CLOCK_EVT_MODE_SHUTDOWN:
  165. break;
  166. case CLOCK_EVT_MODE_RESUME:
  167. s5p_timer_resume();
  168. break;
  169. }
  170. }
  171. static void s5p_timer_resume(void)
  172. {
  173. /* event timer restart */
  174. s5p_time_setup(timer_source.event_id, clock_count_per_tick);
  175. s5p_time_start(timer_source.event_id, PERIODIC);
  176. /* source timer restart */
  177. s5p_time_setup(timer_source.source_id, TCNT_MAX);
  178. s5p_time_start(timer_source.source_id, PERIODIC);
  179. }
  180. void __init s5p_set_timer_source(enum s5p_timer_mode event,
  181. enum s5p_timer_mode source)
  182. {
  183. s3c_device_timer[event].dev.bus = &platform_bus_type;
  184. s3c_device_timer[source].dev.bus = &platform_bus_type;
  185. timer_source.event_id = event;
  186. timer_source.source_id = source;
  187. }
  188. static struct clock_event_device time_event_device = {
  189. .name = "s5p_event_timer",
  190. .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
  191. .rating = 200,
  192. .set_next_event = s5p_set_next_event,
  193. .set_mode = s5p_set_mode,
  194. };
  195. static irqreturn_t s5p_clock_event_isr(int irq, void *dev_id)
  196. {
  197. struct clock_event_device *evt = dev_id;
  198. evt->event_handler(evt);
  199. return IRQ_HANDLED;
  200. }
  201. static struct irqaction s5p_clock_event_irq = {
  202. .name = "s5p_time_irq",
  203. .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
  204. .handler = s5p_clock_event_isr,
  205. .dev_id = &time_event_device,
  206. };
  207. static void __init s5p_clockevent_init(void)
  208. {
  209. unsigned long pclk;
  210. unsigned long clock_rate;
  211. unsigned int irq_number;
  212. struct clk *tscaler;
  213. pclk = clk_get_rate(timerclk);
  214. tscaler = clk_get_parent(tdiv_event);
  215. clk_set_rate(tscaler, pclk / 2);
  216. clk_set_rate(tdiv_event, pclk / 2);
  217. clk_set_parent(tin_event, tdiv_event);
  218. clock_rate = clk_get_rate(tin_event);
  219. clock_count_per_tick = clock_rate / HZ;
  220. time_event_device.cpumask = cpumask_of(0);
  221. clockevents_config_and_register(&time_event_device, clock_rate, 1, -1);
  222. irq_number = timer_source.event_id + IRQ_TIMER0;
  223. setup_irq(irq_number, &s5p_clock_event_irq);
  224. }
  225. static void __iomem *s5p_timer_reg(void)
  226. {
  227. unsigned long offset = 0;
  228. switch (timer_source.source_id) {
  229. case S5P_PWM0:
  230. case S5P_PWM1:
  231. case S5P_PWM2:
  232. case S5P_PWM3:
  233. offset = (timer_source.source_id * 0x0c) + 0x14;
  234. break;
  235. case S5P_PWM4:
  236. offset = 0x40;
  237. break;
  238. default:
  239. printk(KERN_ERR "Invalid Timer %d\n", timer_source.source_id);
  240. return NULL;
  241. }
  242. return S3C_TIMERREG(offset);
  243. }
  244. /*
  245. * Override the global weak sched_clock symbol with this
  246. * local implementation which uses the clocksource to get some
  247. * better resolution when scheduling the kernel. We accept that
  248. * this wraps around for now, since it is just a relative time
  249. * stamp. (Inspired by U300 implementation.)
  250. */
  251. static u32 notrace s5p_read_sched_clock(void)
  252. {
  253. void __iomem *reg = s5p_timer_reg();
  254. if (!reg)
  255. return 0;
  256. return ~__raw_readl(reg);
  257. }
  258. static void __init s5p_clocksource_init(void)
  259. {
  260. unsigned long pclk;
  261. unsigned long clock_rate;
  262. pclk = clk_get_rate(timerclk);
  263. clk_set_rate(tdiv_source, pclk / 2);
  264. clk_set_parent(tin_source, tdiv_source);
  265. clock_rate = clk_get_rate(tin_source);
  266. s5p_time_setup(timer_source.source_id, TCNT_MAX);
  267. s5p_time_start(timer_source.source_id, PERIODIC);
  268. setup_sched_clock(s5p_read_sched_clock, 32, clock_rate);
  269. if (clocksource_mmio_init(s5p_timer_reg(), "s5p_clocksource_timer",
  270. clock_rate, 250, 32, clocksource_mmio_readl_down))
  271. panic("s5p_clocksource_timer: can't register clocksource\n");
  272. }
  273. static void __init s5p_timer_resources(void)
  274. {
  275. unsigned long event_id = timer_source.event_id;
  276. unsigned long source_id = timer_source.source_id;
  277. char devname[15];
  278. timerclk = clk_get(NULL, "timers");
  279. if (IS_ERR(timerclk))
  280. panic("failed to get timers clock for timer");
  281. clk_enable(timerclk);
  282. sprintf(devname, "s3c24xx-pwm.%lu", event_id);
  283. s3c_device_timer[event_id].id = event_id;
  284. s3c_device_timer[event_id].dev.init_name = devname;
  285. tin_event = clk_get(&s3c_device_timer[event_id].dev, "pwm-tin");
  286. if (IS_ERR(tin_event))
  287. panic("failed to get pwm-tin clock for event timer");
  288. tdiv_event = clk_get(&s3c_device_timer[event_id].dev, "pwm-tdiv");
  289. if (IS_ERR(tdiv_event))
  290. panic("failed to get pwm-tdiv clock for event timer");
  291. clk_enable(tin_event);
  292. sprintf(devname, "s3c24xx-pwm.%lu", source_id);
  293. s3c_device_timer[source_id].id = source_id;
  294. s3c_device_timer[source_id].dev.init_name = devname;
  295. tin_source = clk_get(&s3c_device_timer[source_id].dev, "pwm-tin");
  296. if (IS_ERR(tin_source))
  297. panic("failed to get pwm-tin clock for source timer");
  298. tdiv_source = clk_get(&s3c_device_timer[source_id].dev, "pwm-tdiv");
  299. if (IS_ERR(tdiv_source))
  300. panic("failed to get pwm-tdiv clock for source timer");
  301. clk_enable(tin_source);
  302. }
  303. void __init s5p_timer_init(void)
  304. {
  305. s5p_timer_resources();
  306. s5p_clockevent_init();
  307. s5p_clocksource_init();
  308. }