ct-ca9x4.h 1.4 KB

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  1. #ifndef __MACH_CT_CA9X4_H
  2. #define __MACH_CT_CA9X4_H
  3. /*
  4. * Physical base addresses
  5. */
  6. #define CT_CA9X4_CLCDC (0x10020000)
  7. #define CT_CA9X4_AXIRAM (0x10060000)
  8. #define CT_CA9X4_DMC (0x100e0000)
  9. #define CT_CA9X4_SMC (0x100e1000)
  10. #define CT_CA9X4_SCC (0x100e2000)
  11. #define CT_CA9X4_SP804_TIMER (0x100e4000)
  12. #define CT_CA9X4_SP805_WDT (0x100e5000)
  13. #define CT_CA9X4_TZPC (0x100e6000)
  14. #define CT_CA9X4_GPIO (0x100e8000)
  15. #define CT_CA9X4_FASTAXI (0x100e9000)
  16. #define CT_CA9X4_SLOWAXI (0x100ea000)
  17. #define CT_CA9X4_TZASC (0x100ec000)
  18. #define CT_CA9X4_CORESIGHT (0x10200000)
  19. #define CT_CA9X4_MPIC (0x1e000000)
  20. #define CT_CA9X4_SYSTIMER (0x1e004000)
  21. #define CT_CA9X4_SYSWDT (0x1e007000)
  22. #define CT_CA9X4_L2CC (0x1e00a000)
  23. #define A9_MPCORE_SCU (CT_CA9X4_MPIC + 0x0000)
  24. #define A9_MPCORE_GIC_CPU (CT_CA9X4_MPIC + 0x0100)
  25. #define A9_MPCORE_GIT (CT_CA9X4_MPIC + 0x0200)
  26. #define A9_MPCORE_TWD (CT_CA9X4_MPIC + 0x0600)
  27. #define A9_MPCORE_GIC_DIST (CT_CA9X4_MPIC + 0x1000)
  28. /*
  29. * Interrupts. Those in {} are for AMBA devices
  30. */
  31. #define IRQ_CT_CA9X4_CLCDC { 76 }
  32. #define IRQ_CT_CA9X4_DMC { 0 }
  33. #define IRQ_CT_CA9X4_SMC { 77, 78 }
  34. #define IRQ_CT_CA9X4_TIMER0 80
  35. #define IRQ_CT_CA9X4_TIMER1 81
  36. #define IRQ_CT_CA9X4_GPIO { 82 }
  37. #define IRQ_CT_CA9X4_PMU_CPU0 92
  38. #define IRQ_CT_CA9X4_PMU_CPU1 93
  39. #define IRQ_CT_CA9X4_PMU_CPU2 94
  40. #define IRQ_CT_CA9X4_PMU_CPU3 95
  41. extern struct ct_desc ct_ca9x4_desc;
  42. #endif