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arm
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mach-spear3xx
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include
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mach
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spear.h

spear.h 2.2 KB
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  1. /*
    2. 

  2.  * arch/arm/mach-spear3xx/include/mach/spear.h
    3. 

  3.  *
    4. 

  4.  * SPEAr3xx Machine family specific definition
    5. 

  5.  *
    6. 

  6.  * Copyright (C) 2009 ST Microelectronics
    7. 

  7.  * Viresh Kumar <viresh.linux@gmail.com>
    8. 

  8.  *
    9. 

  9.  * This file is licensed under the terms of the GNU General Public
    10. 

  10.  * License version 2. This program is licensed "as is" without any
    11. 

  11.  * warranty of any kind, whether express or implied.
    12. 

  12.  */
    13. 

  13. 

  14. #ifndef __MACH_SPEAR3XX_H
    15. 

  15. #define __MACH_SPEAR3XX_H
    16. 

  16. 

  17. #include <asm/memory.h>
    18. 

  18. 

  19. /* ICM1 - Low speed connection */
    20. 

  20. #define SPEAR3XX_ICM1_2_BASE		UL(0xD0000000)
    21. 

  21. #define VA_SPEAR3XX_ICM1_2_BASE		UL(0xFD000000)
    22. 

  22. #define SPEAR3XX_ICM1_UART_BASE		UL(0xD0000000)
    23. 

  23. #define VA_SPEAR3XX_ICM1_UART_BASE	(VA_SPEAR3XX_ICM1_2_BASE | SPEAR3XX_ICM1_UART_BASE)
    24. 

  24. #define SPEAR3XX_ICM1_SSP_BASE		UL(0xD0100000)
    25. 

  25. 

  26. /* ML1 - Multi Layer CPU Subsystem */
    27. 

  27. #define SPEAR3XX_ICM3_ML1_2_BASE	UL(0xF0000000)
    28. 

  28. #define VA_SPEAR6XX_ML_CPU_BASE		UL(0xF0000000)
    29. 

  29. 

  30. /* ICM3 - Basic Subsystem */
    31. 

  31. #define SPEAR3XX_ICM3_SMI_CTRL_BASE	UL(0xFC000000)
    32. 

  32. #define VA_SPEAR3XX_ICM3_SMI_CTRL_BASE	UL(0xFC000000)
    33. 

  33. #define SPEAR3XX_ICM3_DMA_BASE		UL(0xFC400000)
    34. 

  34. #define SPEAR3XX_ICM3_SYS_CTRL_BASE	UL(0xFCA00000)
    35. 

  35. #define VA_SPEAR3XX_ICM3_SYS_CTRL_BASE	(VA_SPEAR3XX_ICM3_SMI_CTRL_BASE | SPEAR3XX_ICM3_SYS_CTRL_BASE)
    36. 

  36. #define SPEAR3XX_ICM3_MISC_REG_BASE	UL(0xFCA80000)
    37. 

  37. #define VA_SPEAR3XX_ICM3_MISC_REG_BASE	(VA_SPEAR3XX_ICM3_SMI_CTRL_BASE | SPEAR3XX_ICM3_MISC_REG_BASE)
    38. 

  38. 

  39. /* Debug uart for linux, will be used for debug and uncompress messages */
    40. 

  40. #define SPEAR_DBG_UART_BASE		SPEAR3XX_ICM1_UART_BASE
    41. 

  41. #define VA_SPEAR_DBG_UART_BASE		VA_SPEAR3XX_ICM1_UART_BASE
    42. 

  42. 

  43. /* Sysctl base for spear platform */
    44. 

  44. #define SPEAR_SYS_CTRL_BASE		SPEAR3XX_ICM3_SYS_CTRL_BASE
    45. 

  45. #define VA_SPEAR_SYS_CTRL_BASE		VA_SPEAR3XX_ICM3_SYS_CTRL_BASE
    46. 

  46. 

  47. /* SPEAr320 Macros */
    48. 

  48. #define SPEAR320_SOC_CONFIG_BASE	UL(0xB3000000)
    49. 

  49. #define VA_SPEAR320_SOC_CONFIG_BASE	UL(0xFE000000)
    50. 

  50. #define SPEAR320_CONTROL_REG		IOMEM(VA_SPEAR320_SOC_CONFIG_BASE)
    51. 

  51. #define SPEAR320_EXT_CTRL_REG		IOMEM(VA_SPEAR320_SOC_CONFIG_BASE + 0x0018)
    52. 

  52. 	#define SPEAR320_UARTX_PCLK_MASK		0x1
    53. 

  53. 	#define SPEAR320_UART2_PCLK_SHIFT		8
    54. 

  54. 	#define SPEAR320_UART3_PCLK_SHIFT		9
    55. 

  55. 	#define SPEAR320_UART4_PCLK_SHIFT		10
    56. 

  56. 	#define SPEAR320_UART5_PCLK_SHIFT		11
    57. 

  57. 	#define SPEAR320_UART6_PCLK_SHIFT		12
    58. 

  58. 	#define SPEAR320_RS485_PCLK_SHIFT		13
    59. 

  59. 

  60. #endif /* __MACH_SPEAR3XX_H */
    61.