assabet.c 15 KB

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  1. /*
  2. * linux/arch/arm/mach-sa1100/assabet.c
  3. *
  4. * Author: Nicolas Pitre
  5. *
  6. * This file contains all Assabet-specific tweaks.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/init.h>
  13. #include <linux/kernel.h>
  14. #include <linux/module.h>
  15. #include <linux/errno.h>
  16. #include <linux/ioport.h>
  17. #include <linux/platform_data/sa11x0-serial.h>
  18. #include <linux/serial_core.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/mfd/ucb1x00.h>
  21. #include <linux/mtd/mtd.h>
  22. #include <linux/mtd/partitions.h>
  23. #include <linux/delay.h>
  24. #include <linux/mm.h>
  25. #include <linux/leds.h>
  26. #include <linux/slab.h>
  27. #include <video/sa1100fb.h>
  28. #include <mach/hardware.h>
  29. #include <asm/mach-types.h>
  30. #include <asm/setup.h>
  31. #include <asm/page.h>
  32. #include <asm/pgtable-hwdef.h>
  33. #include <asm/pgtable.h>
  34. #include <asm/tlbflush.h>
  35. #include <asm/mach/arch.h>
  36. #include <asm/mach/flash.h>
  37. #include <asm/mach/irda.h>
  38. #include <asm/mach/map.h>
  39. #include <mach/assabet.h>
  40. #include <linux/platform_data/mfd-mcp-sa11x0.h>
  41. #include <mach/irqs.h>
  42. #include "generic.h"
  43. #define ASSABET_BCR_DB1110 \
  44. (ASSABET_BCR_SPK_OFF | \
  45. ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \
  46. ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \
  47. ASSABET_BCR_IRDA_MD0)
  48. #define ASSABET_BCR_DB1111 \
  49. (ASSABET_BCR_SPK_OFF | \
  50. ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \
  51. ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \
  52. ASSABET_BCR_CF_BUS_OFF | ASSABET_BCR_STEREO_LB | \
  53. ASSABET_BCR_IRDA_MD0 | ASSABET_BCR_CF_RST)
  54. unsigned long SCR_value = ASSABET_SCR_INIT;
  55. EXPORT_SYMBOL(SCR_value);
  56. static unsigned long BCR_value = ASSABET_BCR_DB1110;
  57. void ASSABET_BCR_frob(unsigned int mask, unsigned int val)
  58. {
  59. unsigned long flags;
  60. local_irq_save(flags);
  61. BCR_value = (BCR_value & ~mask) | val;
  62. ASSABET_BCR = BCR_value;
  63. local_irq_restore(flags);
  64. }
  65. EXPORT_SYMBOL(ASSABET_BCR_frob);
  66. static void assabet_ucb1x00_reset(enum ucb1x00_reset state)
  67. {
  68. if (state == UCB_RST_PROBE)
  69. ASSABET_BCR_set(ASSABET_BCR_CODEC_RST);
  70. }
  71. /*
  72. * Assabet flash support code.
  73. */
  74. #ifdef ASSABET_REV_4
  75. /*
  76. * Phase 4 Assabet has two 28F160B3 flash parts in bank 0:
  77. */
  78. static struct mtd_partition assabet_partitions[] = {
  79. {
  80. .name = "bootloader",
  81. .size = 0x00020000,
  82. .offset = 0,
  83. .mask_flags = MTD_WRITEABLE,
  84. }, {
  85. .name = "bootloader params",
  86. .size = 0x00020000,
  87. .offset = MTDPART_OFS_APPEND,
  88. .mask_flags = MTD_WRITEABLE,
  89. }, {
  90. .name = "jffs",
  91. .size = MTDPART_SIZ_FULL,
  92. .offset = MTDPART_OFS_APPEND,
  93. }
  94. };
  95. #else
  96. /*
  97. * Phase 5 Assabet has two 28F128J3A flash parts in bank 0:
  98. */
  99. static struct mtd_partition assabet_partitions[] = {
  100. {
  101. .name = "bootloader",
  102. .size = 0x00040000,
  103. .offset = 0,
  104. .mask_flags = MTD_WRITEABLE,
  105. }, {
  106. .name = "bootloader params",
  107. .size = 0x00040000,
  108. .offset = MTDPART_OFS_APPEND,
  109. .mask_flags = MTD_WRITEABLE,
  110. }, {
  111. .name = "jffs",
  112. .size = MTDPART_SIZ_FULL,
  113. .offset = MTDPART_OFS_APPEND,
  114. }
  115. };
  116. #endif
  117. static struct flash_platform_data assabet_flash_data = {
  118. .map_name = "cfi_probe",
  119. .parts = assabet_partitions,
  120. .nr_parts = ARRAY_SIZE(assabet_partitions),
  121. };
  122. static struct resource assabet_flash_resources[] = {
  123. DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M),
  124. DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M),
  125. };
  126. /*
  127. * Assabet IrDA support code.
  128. */
  129. static int assabet_irda_set_power(struct device *dev, unsigned int state)
  130. {
  131. static unsigned int bcr_state[4] = {
  132. ASSABET_BCR_IRDA_MD0,
  133. ASSABET_BCR_IRDA_MD1|ASSABET_BCR_IRDA_MD0,
  134. ASSABET_BCR_IRDA_MD1,
  135. 0
  136. };
  137. if (state < 4) {
  138. state = bcr_state[state];
  139. ASSABET_BCR_clear(state ^ (ASSABET_BCR_IRDA_MD1|
  140. ASSABET_BCR_IRDA_MD0));
  141. ASSABET_BCR_set(state);
  142. }
  143. return 0;
  144. }
  145. static void assabet_irda_set_speed(struct device *dev, unsigned int speed)
  146. {
  147. if (speed < 4000000)
  148. ASSABET_BCR_clear(ASSABET_BCR_IRDA_FSEL);
  149. else
  150. ASSABET_BCR_set(ASSABET_BCR_IRDA_FSEL);
  151. }
  152. static struct irda_platform_data assabet_irda_data = {
  153. .set_power = assabet_irda_set_power,
  154. .set_speed = assabet_irda_set_speed,
  155. };
  156. static struct ucb1x00_plat_data assabet_ucb1x00_data = {
  157. .reset = assabet_ucb1x00_reset,
  158. .gpio_base = -1,
  159. };
  160. static struct mcp_plat_data assabet_mcp_data = {
  161. .mccr0 = MCCR0_ADM,
  162. .sclk_rate = 11981000,
  163. .codec_pdata = &assabet_ucb1x00_data,
  164. };
  165. static void assabet_lcd_set_visual(u32 visual)
  166. {
  167. u_int is_true_color = visual == FB_VISUAL_TRUECOLOR;
  168. if (machine_is_assabet()) {
  169. #if 1 // phase 4 or newer Assabet's
  170. if (is_true_color)
  171. ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
  172. else
  173. ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
  174. #else
  175. // older Assabet's
  176. if (is_true_color)
  177. ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
  178. else
  179. ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
  180. #endif
  181. }
  182. }
  183. #ifndef ASSABET_PAL_VIDEO
  184. static void assabet_lcd_backlight_power(int on)
  185. {
  186. if (on)
  187. ASSABET_BCR_set(ASSABET_BCR_LIGHT_ON);
  188. else
  189. ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
  190. }
  191. /*
  192. * Turn on/off the backlight. When turning the backlight on, we wait
  193. * 500us after turning it on so we don't cause the supplies to droop
  194. * when we enable the LCD controller (and cause a hard reset.)
  195. */
  196. static void assabet_lcd_power(int on)
  197. {
  198. if (on) {
  199. ASSABET_BCR_set(ASSABET_BCR_LCD_ON);
  200. udelay(500);
  201. } else
  202. ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
  203. }
  204. /*
  205. * The assabet uses a sharp LQ039Q2DS54 LCD module. It is actually
  206. * takes an RGB666 signal, but we provide it with an RGB565 signal
  207. * instead (def_rgb_16).
  208. */
  209. static struct sa1100fb_mach_info lq039q2ds54_info = {
  210. .pixclock = 171521, .bpp = 16,
  211. .xres = 320, .yres = 240,
  212. .hsync_len = 5, .vsync_len = 1,
  213. .left_margin = 61, .upper_margin = 3,
  214. .right_margin = 9, .lower_margin = 0,
  215. .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  216. .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
  217. .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
  218. .backlight_power = assabet_lcd_backlight_power,
  219. .lcd_power = assabet_lcd_power,
  220. .set_visual = assabet_lcd_set_visual,
  221. };
  222. #else
  223. static void assabet_pal_backlight_power(int on)
  224. {
  225. ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
  226. }
  227. static void assabet_pal_power(int on)
  228. {
  229. ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
  230. }
  231. static struct sa1100fb_mach_info pal_info = {
  232. .pixclock = 67797, .bpp = 16,
  233. .xres = 640, .yres = 512,
  234. .hsync_len = 64, .vsync_len = 6,
  235. .left_margin = 125, .upper_margin = 70,
  236. .right_margin = 115, .lower_margin = 36,
  237. .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
  238. .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512),
  239. .backlight_power = assabet_pal_backlight_power,
  240. .lcd_power = assabet_pal_power,
  241. .set_visual = assabet_lcd_set_visual,
  242. };
  243. #endif
  244. #ifdef CONFIG_ASSABET_NEPONSET
  245. static struct resource neponset_resources[] = {
  246. DEFINE_RES_MEM(0x10000000, 0x08000000),
  247. DEFINE_RES_MEM(0x18000000, 0x04000000),
  248. DEFINE_RES_MEM(0x40000000, SZ_8K),
  249. DEFINE_RES_IRQ(IRQ_GPIO25),
  250. };
  251. #endif
  252. static void __init assabet_init(void)
  253. {
  254. /*
  255. * Ensure that the power supply is in "high power" mode.
  256. */
  257. GPSR = GPIO_GPIO16;
  258. GPDR |= GPIO_GPIO16;
  259. /*
  260. * Ensure that these pins are set as outputs and are driving
  261. * logic 0. This ensures that we won't inadvertently toggle
  262. * the WS latch in the CPLD, and we don't float causing
  263. * excessive power drain. --rmk
  264. */
  265. GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
  266. GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
  267. /*
  268. * Also set GPIO27 as an output; this is used to clock UART3
  269. * via the FPGA and as otherwise has no pullups or pulldowns,
  270. * so stop it floating.
  271. */
  272. GPCR = GPIO_GPIO27;
  273. GPDR |= GPIO_GPIO27;
  274. /*
  275. * Set up registers for sleep mode.
  276. */
  277. PWER = PWER_GPIO0;
  278. PGSR = 0;
  279. PCFR = 0;
  280. PSDR = 0;
  281. PPDR |= PPC_TXD3 | PPC_TXD1;
  282. PPSR |= PPC_TXD3 | PPC_TXD1;
  283. sa11x0_ppc_configure_mcp();
  284. if (machine_has_neponset()) {
  285. /*
  286. * Angel sets this, but other bootloaders may not.
  287. *
  288. * This must precede any driver calls to BCR_set()
  289. * or BCR_clear().
  290. */
  291. ASSABET_BCR = BCR_value = ASSABET_BCR_DB1111;
  292. #ifndef CONFIG_ASSABET_NEPONSET
  293. printk( "Warning: Neponset detected but full support "
  294. "hasn't been configured in the kernel\n" );
  295. #else
  296. platform_device_register_simple("neponset", 0,
  297. neponset_resources, ARRAY_SIZE(neponset_resources));
  298. #endif
  299. }
  300. #ifndef ASSABET_PAL_VIDEO
  301. sa11x0_register_lcd(&lq039q2ds54_info);
  302. #else
  303. sa11x0_register_lcd(&pal_video);
  304. #endif
  305. sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources,
  306. ARRAY_SIZE(assabet_flash_resources));
  307. sa11x0_register_irda(&assabet_irda_data);
  308. sa11x0_register_mcp(&assabet_mcp_data);
  309. }
  310. /*
  311. * On Assabet, we must probe for the Neponset board _before_
  312. * paging_init() has occurred to actually determine the amount
  313. * of RAM available. To do so, we map the appropriate IO section
  314. * in the page table here in order to access GPIO registers.
  315. */
  316. static void __init map_sa1100_gpio_regs( void )
  317. {
  318. unsigned long phys = __PREG(GPLR) & PMD_MASK;
  319. unsigned long virt = (unsigned long)io_p2v(phys);
  320. int prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_DOMAIN(DOMAIN_IO);
  321. pmd_t *pmd;
  322. pmd = pmd_offset(pud_offset(pgd_offset_k(virt), virt), virt);
  323. *pmd = __pmd(phys | prot);
  324. flush_pmd_entry(pmd);
  325. }
  326. /*
  327. * Read System Configuration "Register"
  328. * (taken from "Intel StrongARM SA-1110 Microprocessor Development Board
  329. * User's Guide", section 4.4.1)
  330. *
  331. * This same scan is performed in arch/arm/boot/compressed/head-sa1100.S
  332. * to set up the serial port for decompression status messages. We
  333. * repeat it here because the kernel may not be loaded as a zImage, and
  334. * also because it's a hassle to communicate the SCR value to the kernel
  335. * from the decompressor.
  336. *
  337. * Note that IRQs are guaranteed to be disabled.
  338. */
  339. static void __init get_assabet_scr(void)
  340. {
  341. unsigned long uninitialized_var(scr), i;
  342. GPDR |= 0x3fc; /* Configure GPIO 9:2 as outputs */
  343. GPSR = 0x3fc; /* Write 0xFF to GPIO 9:2 */
  344. GPDR &= ~(0x3fc); /* Configure GPIO 9:2 as inputs */
  345. for(i = 100; i--; ) /* Read GPIO 9:2 */
  346. scr = GPLR;
  347. GPDR |= 0x3fc; /* restore correct pin direction */
  348. scr &= 0x3fc; /* save as system configuration byte. */
  349. SCR_value = scr;
  350. }
  351. static void __init
  352. fixup_assabet(struct tag *tags, char **cmdline, struct meminfo *mi)
  353. {
  354. /* This must be done before any call to machine_has_neponset() */
  355. map_sa1100_gpio_regs();
  356. get_assabet_scr();
  357. if (machine_has_neponset())
  358. printk("Neponset expansion board detected\n");
  359. }
  360. static void assabet_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
  361. {
  362. if (port->mapbase == _Ser1UTCR0) {
  363. if (state)
  364. ASSABET_BCR_clear(ASSABET_BCR_RS232EN |
  365. ASSABET_BCR_COM_RTS |
  366. ASSABET_BCR_COM_DTR);
  367. else
  368. ASSABET_BCR_set(ASSABET_BCR_RS232EN |
  369. ASSABET_BCR_COM_RTS |
  370. ASSABET_BCR_COM_DTR);
  371. }
  372. }
  373. /*
  374. * Assabet uses COM_RTS and COM_DTR for both UART1 (com port)
  375. * and UART3 (radio module). We only handle them for UART1 here.
  376. */
  377. static void assabet_set_mctrl(struct uart_port *port, u_int mctrl)
  378. {
  379. if (port->mapbase == _Ser1UTCR0) {
  380. u_int set = 0, clear = 0;
  381. if (mctrl & TIOCM_RTS)
  382. clear |= ASSABET_BCR_COM_RTS;
  383. else
  384. set |= ASSABET_BCR_COM_RTS;
  385. if (mctrl & TIOCM_DTR)
  386. clear |= ASSABET_BCR_COM_DTR;
  387. else
  388. set |= ASSABET_BCR_COM_DTR;
  389. ASSABET_BCR_clear(clear);
  390. ASSABET_BCR_set(set);
  391. }
  392. }
  393. static u_int assabet_get_mctrl(struct uart_port *port)
  394. {
  395. u_int ret = 0;
  396. u_int bsr = ASSABET_BSR;
  397. /* need 2 reads to read current value */
  398. bsr = ASSABET_BSR;
  399. if (port->mapbase == _Ser1UTCR0) {
  400. if (bsr & ASSABET_BSR_COM_DCD)
  401. ret |= TIOCM_CD;
  402. if (bsr & ASSABET_BSR_COM_CTS)
  403. ret |= TIOCM_CTS;
  404. if (bsr & ASSABET_BSR_COM_DSR)
  405. ret |= TIOCM_DSR;
  406. } else if (port->mapbase == _Ser3UTCR0) {
  407. if (bsr & ASSABET_BSR_RAD_DCD)
  408. ret |= TIOCM_CD;
  409. if (bsr & ASSABET_BSR_RAD_CTS)
  410. ret |= TIOCM_CTS;
  411. if (bsr & ASSABET_BSR_RAD_DSR)
  412. ret |= TIOCM_DSR;
  413. if (bsr & ASSABET_BSR_RAD_RI)
  414. ret |= TIOCM_RI;
  415. } else {
  416. ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
  417. }
  418. return ret;
  419. }
  420. static struct sa1100_port_fns assabet_port_fns __initdata = {
  421. .set_mctrl = assabet_set_mctrl,
  422. .get_mctrl = assabet_get_mctrl,
  423. .pm = assabet_uart_pm,
  424. };
  425. static struct map_desc assabet_io_desc[] __initdata = {
  426. { /* Board Control Register */
  427. .virtual = 0xf1000000,
  428. .pfn = __phys_to_pfn(0x12000000),
  429. .length = 0x00100000,
  430. .type = MT_DEVICE
  431. }, { /* MQ200 */
  432. .virtual = 0xf2800000,
  433. .pfn = __phys_to_pfn(0x4b800000),
  434. .length = 0x00800000,
  435. .type = MT_DEVICE
  436. }
  437. };
  438. static void __init assabet_map_io(void)
  439. {
  440. sa1100_map_io();
  441. iotable_init(assabet_io_desc, ARRAY_SIZE(assabet_io_desc));
  442. /*
  443. * Set SUS bit in SDCR0 so serial port 1 functions.
  444. * Its called GPCLKR0 in my SA1110 manual.
  445. */
  446. Ser1SDCR0 |= SDCR0_SUS;
  447. if (!machine_has_neponset())
  448. sa1100_register_uart_fns(&assabet_port_fns);
  449. /*
  450. * When Neponset is attached, the first UART should be
  451. * UART3. That's what Angel is doing and many documents
  452. * are stating this.
  453. *
  454. * We do the Neponset mapping even if Neponset support
  455. * isn't compiled in so the user will still get something on
  456. * the expected physical serial port.
  457. *
  458. * We no longer do this; not all boot loaders support it,
  459. * and UART3 appears to be somewhat unreliable with blob.
  460. */
  461. sa1100_register_uart(0, 1);
  462. sa1100_register_uart(2, 3);
  463. }
  464. /* LEDs */
  465. #if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS)
  466. struct assabet_led {
  467. struct led_classdev cdev;
  468. u32 mask;
  469. };
  470. /*
  471. * The triggers lines up below will only be used if the
  472. * LED triggers are compiled in.
  473. */
  474. static const struct {
  475. const char *name;
  476. const char *trigger;
  477. } assabet_leds[] = {
  478. { "assabet:red", "cpu0",},
  479. { "assabet:green", "heartbeat", },
  480. };
  481. /*
  482. * The LED control in Assabet is reversed:
  483. * - setting bit means turn off LED
  484. * - clearing bit means turn on LED
  485. */
  486. static void assabet_led_set(struct led_classdev *cdev,
  487. enum led_brightness b)
  488. {
  489. struct assabet_led *led = container_of(cdev,
  490. struct assabet_led, cdev);
  491. if (b != LED_OFF)
  492. ASSABET_BCR_clear(led->mask);
  493. else
  494. ASSABET_BCR_set(led->mask);
  495. }
  496. static enum led_brightness assabet_led_get(struct led_classdev *cdev)
  497. {
  498. struct assabet_led *led = container_of(cdev,
  499. struct assabet_led, cdev);
  500. return (ASSABET_BCR & led->mask) ? LED_OFF : LED_FULL;
  501. }
  502. static int __init assabet_leds_init(void)
  503. {
  504. int i;
  505. if (!machine_is_assabet())
  506. return -ENODEV;
  507. for (i = 0; i < ARRAY_SIZE(assabet_leds); i++) {
  508. struct assabet_led *led;
  509. led = kzalloc(sizeof(*led), GFP_KERNEL);
  510. if (!led)
  511. break;
  512. led->cdev.name = assabet_leds[i].name;
  513. led->cdev.brightness_set = assabet_led_set;
  514. led->cdev.brightness_get = assabet_led_get;
  515. led->cdev.default_trigger = assabet_leds[i].trigger;
  516. if (!i)
  517. led->mask = ASSABET_BCR_LED_RED;
  518. else
  519. led->mask = ASSABET_BCR_LED_GREEN;
  520. if (led_classdev_register(NULL, &led->cdev) < 0) {
  521. kfree(led);
  522. break;
  523. }
  524. }
  525. return 0;
  526. }
  527. /*
  528. * Since we may have triggers on any subsystem, defer registration
  529. * until after subsystem_init.
  530. */
  531. fs_initcall(assabet_leds_init);
  532. #endif
  533. MACHINE_START(ASSABET, "Intel-Assabet")
  534. .atag_offset = 0x100,
  535. .fixup = fixup_assabet,
  536. .map_io = assabet_map_io,
  537. .nr_irqs = SA1100_NR_IRQS,
  538. .init_irq = sa1100_init_irq,
  539. .init_time = sa1100_timer_init,
  540. .init_machine = assabet_init,
  541. .init_late = sa11x0_init_late,
  542. #ifdef CONFIG_SA1111
  543. .dma_zone_size = SZ_1M,
  544. #endif
  545. .restart = sa11x0_restart,
  546. MACHINE_END