realview_pba8.c 8.5 KB

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  1. /*
  2. * linux/arch/arm/mach-realview/realview_pba8.c
  3. *
  4. * Copyright (C) 2008 ARM Limited
  5. * Copyright (C) 2000 Deep Blue Solutions Ltd
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. */
  21. #include <linux/init.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/device.h>
  24. #include <linux/amba/bus.h>
  25. #include <linux/amba/pl061.h>
  26. #include <linux/amba/mmci.h>
  27. #include <linux/amba/pl022.h>
  28. #include <linux/io.h>
  29. #include <linux/irqchip/arm-gic.h>
  30. #include <linux/platform_data/clk-realview.h>
  31. #include <asm/irq.h>
  32. #include <asm/mach-types.h>
  33. #include <asm/pgtable.h>
  34. #include <asm/mach/arch.h>
  35. #include <asm/mach/map.h>
  36. #include <asm/mach/time.h>
  37. #include <mach/hardware.h>
  38. #include <mach/board-pba8.h>
  39. #include <mach/irqs.h>
  40. #include "core.h"
  41. static struct map_desc realview_pba8_io_desc[] __initdata = {
  42. {
  43. .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
  44. .pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
  45. .length = SZ_4K,
  46. .type = MT_DEVICE,
  47. }, {
  48. .virtual = IO_ADDRESS(REALVIEW_PBA8_GIC_CPU_BASE),
  49. .pfn = __phys_to_pfn(REALVIEW_PBA8_GIC_CPU_BASE),
  50. .length = SZ_4K,
  51. .type = MT_DEVICE,
  52. }, {
  53. .virtual = IO_ADDRESS(REALVIEW_PBA8_GIC_DIST_BASE),
  54. .pfn = __phys_to_pfn(REALVIEW_PBA8_GIC_DIST_BASE),
  55. .length = SZ_4K,
  56. .type = MT_DEVICE,
  57. }, {
  58. .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
  59. .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
  60. .length = SZ_4K,
  61. .type = MT_DEVICE,
  62. }, {
  63. .virtual = IO_ADDRESS(REALVIEW_PBA8_TIMER0_1_BASE),
  64. .pfn = __phys_to_pfn(REALVIEW_PBA8_TIMER0_1_BASE),
  65. .length = SZ_4K,
  66. .type = MT_DEVICE,
  67. }, {
  68. .virtual = IO_ADDRESS(REALVIEW_PBA8_TIMER2_3_BASE),
  69. .pfn = __phys_to_pfn(REALVIEW_PBA8_TIMER2_3_BASE),
  70. .length = SZ_4K,
  71. .type = MT_DEVICE,
  72. },
  73. #ifdef CONFIG_PCI
  74. {
  75. .virtual = PCIX_UNIT_BASE,
  76. .pfn = __phys_to_pfn(REALVIEW_PBA8_PCI_BASE),
  77. .length = REALVIEW_PBA8_PCI_BASE_SIZE,
  78. .type = MT_DEVICE
  79. },
  80. #endif
  81. #ifdef CONFIG_DEBUG_LL
  82. {
  83. .virtual = IO_ADDRESS(REALVIEW_PBA8_UART0_BASE),
  84. .pfn = __phys_to_pfn(REALVIEW_PBA8_UART0_BASE),
  85. .length = SZ_4K,
  86. .type = MT_DEVICE,
  87. },
  88. #endif
  89. };
  90. static void __init realview_pba8_map_io(void)
  91. {
  92. iotable_init(realview_pba8_io_desc, ARRAY_SIZE(realview_pba8_io_desc));
  93. }
  94. static struct pl061_platform_data gpio0_plat_data = {
  95. .gpio_base = 0,
  96. };
  97. static struct pl061_platform_data gpio1_plat_data = {
  98. .gpio_base = 8,
  99. };
  100. static struct pl061_platform_data gpio2_plat_data = {
  101. .gpio_base = 16,
  102. };
  103. static struct pl022_ssp_controller ssp0_plat_data = {
  104. .bus_id = 0,
  105. .enable_dma = 0,
  106. .num_chipselect = 1,
  107. };
  108. /*
  109. * RealView PBA8Core AMBA devices
  110. */
  111. #define GPIO2_IRQ { IRQ_PBA8_GPIO2 }
  112. #define GPIO3_IRQ { IRQ_PBA8_GPIO3 }
  113. #define AACI_IRQ { IRQ_PBA8_AACI }
  114. #define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B }
  115. #define KMI0_IRQ { IRQ_PBA8_KMI0 }
  116. #define KMI1_IRQ { IRQ_PBA8_KMI1 }
  117. #define PBA8_SMC_IRQ { }
  118. #define MPMC_IRQ { }
  119. #define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD }
  120. #define DMAC_IRQ { IRQ_PBA8_DMAC }
  121. #define SCTL_IRQ { }
  122. #define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG }
  123. #define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0 }
  124. #define GPIO1_IRQ { IRQ_PBA8_GPIO1 }
  125. #define PBA8_RTC_IRQ { IRQ_PBA8_RTC }
  126. #define SCI_IRQ { IRQ_PBA8_SCI }
  127. #define PBA8_UART0_IRQ { IRQ_PBA8_UART0 }
  128. #define PBA8_UART1_IRQ { IRQ_PBA8_UART1 }
  129. #define PBA8_UART2_IRQ { IRQ_PBA8_UART2 }
  130. #define PBA8_UART3_IRQ { IRQ_PBA8_UART3 }
  131. #define PBA8_SSP_IRQ { IRQ_PBA8_SSP }
  132. /* FPGA Primecells */
  133. APB_DEVICE(aaci, "fpga:aaci", AACI, NULL);
  134. APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
  135. APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
  136. APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
  137. APB_DEVICE(uart3, "fpga:uart3", PBA8_UART3, NULL);
  138. /* DevChip Primecells */
  139. AHB_DEVICE(smc, "dev:smc", PBA8_SMC, NULL);
  140. AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL);
  141. APB_DEVICE(wdog, "dev:wdog", PBA8_WATCHDOG, NULL);
  142. APB_DEVICE(gpio0, "dev:gpio0", PBA8_GPIO0, &gpio0_plat_data);
  143. APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
  144. APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
  145. APB_DEVICE(rtc, "dev:rtc", PBA8_RTC, NULL);
  146. APB_DEVICE(sci0, "dev:sci0", SCI, NULL);
  147. APB_DEVICE(uart0, "dev:uart0", PBA8_UART0, NULL);
  148. APB_DEVICE(uart1, "dev:uart1", PBA8_UART1, NULL);
  149. APB_DEVICE(uart2, "dev:uart2", PBA8_UART2, NULL);
  150. APB_DEVICE(ssp0, "dev:ssp0", PBA8_SSP, &ssp0_plat_data);
  151. /* Primecells on the NEC ISSP chip */
  152. AHB_DEVICE(clcd, "issp:clcd", PBA8_CLCD, &clcd_plat_data);
  153. AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL);
  154. static struct amba_device *amba_devs[] __initdata = {
  155. &dmac_device,
  156. &uart0_device,
  157. &uart1_device,
  158. &uart2_device,
  159. &uart3_device,
  160. &smc_device,
  161. &clcd_device,
  162. &sctl_device,
  163. &wdog_device,
  164. &gpio0_device,
  165. &gpio1_device,
  166. &gpio2_device,
  167. &rtc_device,
  168. &sci0_device,
  169. &ssp0_device,
  170. &aaci_device,
  171. &mmc0_device,
  172. &kmi0_device,
  173. &kmi1_device,
  174. };
  175. /*
  176. * RealView PB-A8 platform devices
  177. */
  178. static struct resource realview_pba8_flash_resource[] = {
  179. [0] = {
  180. .start = REALVIEW_PBA8_FLASH0_BASE,
  181. .end = REALVIEW_PBA8_FLASH0_BASE + REALVIEW_PBA8_FLASH0_SIZE - 1,
  182. .flags = IORESOURCE_MEM,
  183. },
  184. [1] = {
  185. .start = REALVIEW_PBA8_FLASH1_BASE,
  186. .end = REALVIEW_PBA8_FLASH1_BASE + REALVIEW_PBA8_FLASH1_SIZE - 1,
  187. .flags = IORESOURCE_MEM,
  188. },
  189. };
  190. static struct resource realview_pba8_smsc911x_resources[] = {
  191. [0] = {
  192. .start = REALVIEW_PBA8_ETH_BASE,
  193. .end = REALVIEW_PBA8_ETH_BASE + SZ_64K - 1,
  194. .flags = IORESOURCE_MEM,
  195. },
  196. [1] = {
  197. .start = IRQ_PBA8_ETH,
  198. .end = IRQ_PBA8_ETH,
  199. .flags = IORESOURCE_IRQ,
  200. },
  201. };
  202. static struct resource realview_pba8_isp1761_resources[] = {
  203. [0] = {
  204. .start = REALVIEW_PBA8_USB_BASE,
  205. .end = REALVIEW_PBA8_USB_BASE + SZ_128K - 1,
  206. .flags = IORESOURCE_MEM,
  207. },
  208. [1] = {
  209. .start = IRQ_PBA8_USB,
  210. .end = IRQ_PBA8_USB,
  211. .flags = IORESOURCE_IRQ,
  212. },
  213. };
  214. static struct resource pmu_resource = {
  215. .start = IRQ_PBA8_PMU,
  216. .end = IRQ_PBA8_PMU,
  217. .flags = IORESOURCE_IRQ,
  218. };
  219. static struct platform_device pmu_device = {
  220. .name = "arm-pmu",
  221. .id = -1,
  222. .num_resources = 1,
  223. .resource = &pmu_resource,
  224. };
  225. static void __init gic_init_irq(void)
  226. {
  227. /* ARM PB-A8 on-board GIC */
  228. gic_init(0, IRQ_PBA8_GIC_START,
  229. __io_address(REALVIEW_PBA8_GIC_DIST_BASE),
  230. __io_address(REALVIEW_PBA8_GIC_CPU_BASE));
  231. }
  232. static void __init realview_pba8_timer_init(void)
  233. {
  234. timer0_va_base = __io_address(REALVIEW_PBA8_TIMER0_1_BASE);
  235. timer1_va_base = __io_address(REALVIEW_PBA8_TIMER0_1_BASE) + 0x20;
  236. timer2_va_base = __io_address(REALVIEW_PBA8_TIMER2_3_BASE);
  237. timer3_va_base = __io_address(REALVIEW_PBA8_TIMER2_3_BASE) + 0x20;
  238. realview_clk_init(__io_address(REALVIEW_SYS_BASE), false);
  239. realview_timer_init(IRQ_PBA8_TIMER0_1);
  240. }
  241. static void realview_pba8_restart(char mode, const char *cmd)
  242. {
  243. void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
  244. void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
  245. /*
  246. * To reset, we hit the on-board reset register
  247. * in the system FPGA
  248. */
  249. __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
  250. __raw_writel(0x0000, reset_ctrl);
  251. __raw_writel(0x0004, reset_ctrl);
  252. dsb();
  253. }
  254. static void __init realview_pba8_init(void)
  255. {
  256. int i;
  257. realview_flash_register(realview_pba8_flash_resource,
  258. ARRAY_SIZE(realview_pba8_flash_resource));
  259. realview_eth_register(NULL, realview_pba8_smsc911x_resources);
  260. platform_device_register(&realview_i2c_device);
  261. platform_device_register(&realview_cf_device);
  262. realview_usb_register(realview_pba8_isp1761_resources);
  263. platform_device_register(&pmu_device);
  264. for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
  265. struct amba_device *d = amba_devs[i];
  266. amba_device_register(d, &iomem_resource);
  267. }
  268. }
  269. MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
  270. /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
  271. .atag_offset = 0x100,
  272. .fixup = realview_fixup,
  273. .map_io = realview_pba8_map_io,
  274. .init_early = realview_init_early,
  275. .init_irq = gic_init_irq,
  276. .init_time = realview_pba8_timer_init,
  277. .init_machine = realview_pba8_init,
  278. #ifdef CONFIG_ZONE_DMA
  279. .dma_zone_size = SZ_256M,
  280. #endif
  281. .restart = realview_pba8_restart,
  282. MACHINE_END