uncompress.h 1.9 KB

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  1. /*
  2. * arch/arm/mach-mxs/include/mach/uncompress.h
  3. *
  4. * Copyright (C) 1999 ARM Limited
  5. * Copyright (C) Shane Nay (shane@minirl.com)
  6. * Copyright 2010 Freescale Semiconductor, Inc. All Rights Reserved.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. */
  18. #ifndef __MACH_MXS_UNCOMPRESS_H__
  19. #define __MACH_MXS_UNCOMPRESS_H__
  20. unsigned long mxs_duart_base;
  21. #define MXS_DUART(x) (*(volatile unsigned long *)(mxs_duart_base + (x)))
  22. #define MXS_DUART_DR 0x00
  23. #define MXS_DUART_FR 0x18
  24. #define MXS_DUART_FR_TXFE (1 << 7)
  25. #define MXS_DUART_CR 0x30
  26. #define MXS_DUART_CR_UARTEN (1 << 0)
  27. /*
  28. * The following code assumes the serial port has already been
  29. * initialized by the bootloader. If it's not, the output is
  30. * simply discarded.
  31. */
  32. static void putc(int ch)
  33. {
  34. if (!mxs_duart_base)
  35. return;
  36. if (!(MXS_DUART(MXS_DUART_CR) & MXS_DUART_CR_UARTEN))
  37. return;
  38. while (!(MXS_DUART(MXS_DUART_FR) & MXS_DUART_FR_TXFE))
  39. barrier();
  40. MXS_DUART(MXS_DUART_DR) = ch;
  41. }
  42. static inline void flush(void)
  43. {
  44. }
  45. #define MX23_DUART_BASE_ADDR 0x80070000
  46. #define MX28_DUART_BASE_ADDR 0x80074000
  47. #define MXS_DIGCTL_CHIPID 0x8001c310
  48. static inline void __arch_decomp_setup(unsigned long arch_id)
  49. {
  50. u16 chipid = (*(volatile unsigned long *) MXS_DIGCTL_CHIPID) >> 16;
  51. switch (chipid) {
  52. case 0x3780:
  53. mxs_duart_base = MX23_DUART_BASE_ADDR;
  54. break;
  55. case 0x2800:
  56. mxs_duart_base = MX28_DUART_BASE_ADDR;
  57. break;
  58. default:
  59. break;
  60. }
  61. }
  62. #define arch_decomp_setup() __arch_decomp_setup(arch_id)
  63. #endif /* __MACH_MXS_UNCOMPRESS_H__ */