iq31244.c 7.4 KB

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  1. /*
  2. * arch/arm/mach-iop32x/iq31244.c
  3. *
  4. * Board support code for the Intel EP80219 and IQ31244 platforms.
  5. *
  6. * Author: Rory Bolt <rorybolt@pacbell.net>
  7. * Copyright (C) 2002 Rory Bolt
  8. * Copyright 2003 (c) MontaVista, Software, Inc.
  9. * Copyright (C) 2004 Intel Corp.
  10. *
  11. * This program is free software; you can redistribute it and/or modify it
  12. * under the terms of the GNU General Public License as published by the
  13. * Free Software Foundation; either version 2 of the License, or (at your
  14. * option) any later version.
  15. */
  16. #include <linux/mm.h>
  17. #include <linux/init.h>
  18. #include <linux/delay.h>
  19. #include <linux/kernel.h>
  20. #include <linux/pci.h>
  21. #include <linux/pm.h>
  22. #include <linux/string.h>
  23. #include <linux/serial_core.h>
  24. #include <linux/serial_8250.h>
  25. #include <linux/mtd/physmap.h>
  26. #include <linux/platform_device.h>
  27. #include <linux/io.h>
  28. #include <mach/hardware.h>
  29. #include <asm/cputype.h>
  30. #include <asm/irq.h>
  31. #include <asm/mach/arch.h>
  32. #include <asm/mach/map.h>
  33. #include <asm/mach/pci.h>
  34. #include <asm/mach/time.h>
  35. #include <asm/mach-types.h>
  36. #include <asm/page.h>
  37. #include <asm/pgtable.h>
  38. #include <mach/time.h>
  39. /*
  40. * Until March of 2007 iq31244 platforms and ep80219 platforms shared the
  41. * same machine id, and the processor type was used to select board type.
  42. * However this assumption breaks for an iq80219 board which is an iop219
  43. * processor on an iq31244 board. The force_ep80219 flag has been added
  44. * for old boot loaders using the iq31244 machine id for an ep80219 platform.
  45. */
  46. static int force_ep80219;
  47. static int is_80219(void)
  48. {
  49. return !!((read_cpuid_id() & 0xffffffe0) == 0x69052e20);
  50. }
  51. static int is_ep80219(void)
  52. {
  53. if (machine_is_ep80219() || force_ep80219)
  54. return 1;
  55. else
  56. return 0;
  57. }
  58. /*
  59. * EP80219/IQ31244 timer tick configuration.
  60. */
  61. static void __init iq31244_timer_init(void)
  62. {
  63. if (is_ep80219()) {
  64. /* 33.333 MHz crystal. */
  65. iop_init_time(200000000);
  66. } else {
  67. /* 33.000 MHz crystal. */
  68. iop_init_time(198000000);
  69. }
  70. }
  71. /*
  72. * IQ31244 I/O.
  73. */
  74. static struct map_desc iq31244_io_desc[] __initdata = {
  75. { /* on-board devices */
  76. .virtual = IQ31244_UART,
  77. .pfn = __phys_to_pfn(IQ31244_UART),
  78. .length = 0x00100000,
  79. .type = MT_DEVICE,
  80. },
  81. };
  82. void __init iq31244_map_io(void)
  83. {
  84. iop3xx_map_io();
  85. iotable_init(iq31244_io_desc, ARRAY_SIZE(iq31244_io_desc));
  86. }
  87. /*
  88. * EP80219/IQ31244 PCI.
  89. */
  90. static int __init
  91. ep80219_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
  92. {
  93. int irq;
  94. if (slot == 0) {
  95. /* CFlash */
  96. irq = IRQ_IOP32X_XINT1;
  97. } else if (slot == 1) {
  98. /* 82551 Pro 100 */
  99. irq = IRQ_IOP32X_XINT0;
  100. } else if (slot == 2) {
  101. /* PCI-X Slot */
  102. irq = IRQ_IOP32X_XINT3;
  103. } else if (slot == 3) {
  104. /* SATA */
  105. irq = IRQ_IOP32X_XINT2;
  106. } else {
  107. printk(KERN_ERR "ep80219_pci_map_irq() called for unknown "
  108. "device PCI:%d:%d:%d\n", dev->bus->number,
  109. PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
  110. irq = -1;
  111. }
  112. return irq;
  113. }
  114. static struct hw_pci ep80219_pci __initdata = {
  115. .nr_controllers = 1,
  116. .ops = &iop3xx_ops,
  117. .setup = iop3xx_pci_setup,
  118. .preinit = iop3xx_pci_preinit,
  119. .map_irq = ep80219_pci_map_irq,
  120. };
  121. static int __init
  122. iq31244_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
  123. {
  124. int irq;
  125. if (slot == 0) {
  126. /* CFlash */
  127. irq = IRQ_IOP32X_XINT1;
  128. } else if (slot == 1) {
  129. /* SATA */
  130. irq = IRQ_IOP32X_XINT2;
  131. } else if (slot == 2) {
  132. /* PCI-X Slot */
  133. irq = IRQ_IOP32X_XINT3;
  134. } else if (slot == 3) {
  135. /* 82546 GigE */
  136. irq = IRQ_IOP32X_XINT0;
  137. } else {
  138. printk(KERN_ERR "iq31244_pci_map_irq called for unknown "
  139. "device PCI:%d:%d:%d\n", dev->bus->number,
  140. PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
  141. irq = -1;
  142. }
  143. return irq;
  144. }
  145. static struct hw_pci iq31244_pci __initdata = {
  146. .nr_controllers = 1,
  147. .ops = &iop3xx_ops,
  148. .setup = iop3xx_pci_setup,
  149. .preinit = iop3xx_pci_preinit,
  150. .map_irq = iq31244_pci_map_irq,
  151. };
  152. static int __init iq31244_pci_init(void)
  153. {
  154. if (is_ep80219())
  155. pci_common_init(&ep80219_pci);
  156. else if (machine_is_iq31244()) {
  157. if (is_80219()) {
  158. printk("note: iq31244 board type has been selected\n");
  159. printk("note: to select ep80219 operation:\n");
  160. printk("\t1/ specify \"force_ep80219\" on the kernel"
  161. " command line\n");
  162. printk("\t2/ update boot loader to pass"
  163. " the ep80219 id: %d\n", MACH_TYPE_EP80219);
  164. }
  165. pci_common_init(&iq31244_pci);
  166. }
  167. return 0;
  168. }
  169. subsys_initcall(iq31244_pci_init);
  170. /*
  171. * IQ31244 machine initialisation.
  172. */
  173. static struct physmap_flash_data iq31244_flash_data = {
  174. .width = 2,
  175. };
  176. static struct resource iq31244_flash_resource = {
  177. .start = 0xf0000000,
  178. .end = 0xf07fffff,
  179. .flags = IORESOURCE_MEM,
  180. };
  181. static struct platform_device iq31244_flash_device = {
  182. .name = "physmap-flash",
  183. .id = 0,
  184. .dev = {
  185. .platform_data = &iq31244_flash_data,
  186. },
  187. .num_resources = 1,
  188. .resource = &iq31244_flash_resource,
  189. };
  190. static struct plat_serial8250_port iq31244_serial_port[] = {
  191. {
  192. .mapbase = IQ31244_UART,
  193. .membase = (char *)IQ31244_UART,
  194. .irq = IRQ_IOP32X_XINT1,
  195. .flags = UPF_SKIP_TEST,
  196. .iotype = UPIO_MEM,
  197. .regshift = 0,
  198. .uartclk = 1843200,
  199. },
  200. { },
  201. };
  202. static struct resource iq31244_uart_resource = {
  203. .start = IQ31244_UART,
  204. .end = IQ31244_UART + 7,
  205. .flags = IORESOURCE_MEM,
  206. };
  207. static struct platform_device iq31244_serial_device = {
  208. .name = "serial8250",
  209. .id = PLAT8250_DEV_PLATFORM,
  210. .dev = {
  211. .platform_data = iq31244_serial_port,
  212. },
  213. .num_resources = 1,
  214. .resource = &iq31244_uart_resource,
  215. };
  216. /*
  217. * This function will send a SHUTDOWN_COMPLETE message to the PIC
  218. * controller over I2C. We are not using the i2c subsystem since
  219. * we are going to power off and it may be removed
  220. */
  221. void ep80219_power_off(void)
  222. {
  223. /*
  224. * Send the Address byte w/ the start condition
  225. */
  226. *IOP3XX_IDBR1 = 0x60;
  227. *IOP3XX_ICR1 = 0xE9;
  228. mdelay(1);
  229. /*
  230. * Send the START_MSG byte w/ no start or stop condition
  231. */
  232. *IOP3XX_IDBR1 = 0x0F;
  233. *IOP3XX_ICR1 = 0xE8;
  234. mdelay(1);
  235. /*
  236. * Send the SHUTDOWN_COMPLETE Message ID byte w/ no start or
  237. * stop condition
  238. */
  239. *IOP3XX_IDBR1 = 0x03;
  240. *IOP3XX_ICR1 = 0xE8;
  241. mdelay(1);
  242. /*
  243. * Send an ignored byte w/ stop condition
  244. */
  245. *IOP3XX_IDBR1 = 0x00;
  246. *IOP3XX_ICR1 = 0xEA;
  247. while (1)
  248. ;
  249. }
  250. static void __init iq31244_init_machine(void)
  251. {
  252. platform_device_register(&iop3xx_i2c0_device);
  253. platform_device_register(&iop3xx_i2c1_device);
  254. platform_device_register(&iq31244_flash_device);
  255. platform_device_register(&iq31244_serial_device);
  256. platform_device_register(&iop3xx_dma_0_channel);
  257. platform_device_register(&iop3xx_dma_1_channel);
  258. if (is_ep80219())
  259. pm_power_off = ep80219_power_off;
  260. if (!is_80219())
  261. platform_device_register(&iop3xx_aau_channel);
  262. }
  263. static int __init force_ep80219_setup(char *str)
  264. {
  265. force_ep80219 = 1;
  266. return 1;
  267. }
  268. __setup("force_ep80219", force_ep80219_setup);
  269. MACHINE_START(IQ31244, "Intel IQ31244")
  270. /* Maintainer: Intel Corp. */
  271. .atag_offset = 0x100,
  272. .map_io = iq31244_map_io,
  273. .init_irq = iop32x_init_irq,
  274. .init_time = iq31244_timer_init,
  275. .init_machine = iq31244_init_machine,
  276. .restart = iop3xx_restart,
  277. MACHINE_END
  278. /* There should have been an ep80219 machine identifier from the beginning.
  279. * Boot roms older than March 2007 do not know the ep80219 machine id. Pass
  280. * "force_ep80219" on the kernel command line, otherwise iq31244 operation
  281. * will be selected.
  282. */
  283. MACHINE_START(EP80219, "Intel EP80219")
  284. /* Maintainer: Intel Corp. */
  285. .atag_offset = 0x100,
  286. .map_io = iq31244_map_io,
  287. .init_irq = iop32x_init_irq,
  288. .init_time = iq31244_timer_init,
  289. .init_machine = iq31244_init_machine,
  290. .restart = iop3xx_restart,
  291. MACHINE_END