mach-universal_c210.c 29 KB

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  1. /* linux/arch/arm/mach-exynos4/mach-universal_c210.c
  2. *
  3. * Copyright (c) 2010 Samsung Electronics Co., Ltd.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. */
  9. #include <linux/platform_device.h>
  10. #include <linux/serial_core.h>
  11. #include <linux/input.h>
  12. #include <linux/i2c.h>
  13. #include <linux/gpio_keys.h>
  14. #include <linux/gpio.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/fb.h>
  17. #include <linux/mfd/max8998.h>
  18. #include <linux/regulator/machine.h>
  19. #include <linux/regulator/fixed.h>
  20. #include <linux/regulator/max8952.h>
  21. #include <linux/mmc/host.h>
  22. #include <linux/i2c-gpio.h>
  23. #include <linux/i2c/mcs.h>
  24. #include <linux/i2c/atmel_mxt_ts.h>
  25. #include <linux/platform_data/i2c-s3c2410.h>
  26. #include <linux/platform_data/mipi-csis.h>
  27. #include <linux/platform_data/s3c-hsotg.h>
  28. #include <drm/exynos_drm.h>
  29. #include <asm/mach/arch.h>
  30. #include <asm/mach-types.h>
  31. #include <video/samsung_fimd.h>
  32. #include <plat/regs-serial.h>
  33. #include <plat/clock.h>
  34. #include <plat/cpu.h>
  35. #include <plat/devs.h>
  36. #include <plat/gpio-cfg.h>
  37. #include <plat/fb.h>
  38. #include <plat/mfc.h>
  39. #include <plat/sdhci.h>
  40. #include <plat/fimc-core.h>
  41. #include <plat/s5p-time.h>
  42. #include <plat/camport.h>
  43. #include <mach/map.h>
  44. #include <media/v4l2-mediabus.h>
  45. #include <media/s5p_fimc.h>
  46. #include <media/m5mols.h>
  47. #include <media/s5k6aa.h>
  48. #include "common.h"
  49. /* Following are default values for UCON, ULCON and UFCON UART registers */
  50. #define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
  51. S3C2410_UCON_RXILEVEL | \
  52. S3C2410_UCON_TXIRQMODE | \
  53. S3C2410_UCON_RXIRQMODE | \
  54. S3C2410_UCON_RXFIFO_TOI | \
  55. S3C2443_UCON_RXERR_IRQEN)
  56. #define UNIVERSAL_ULCON_DEFAULT S3C2410_LCON_CS8
  57. #define UNIVERSAL_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
  58. S5PV210_UFCON_TXTRIG256 | \
  59. S5PV210_UFCON_RXTRIG256)
  60. static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = {
  61. [0] = {
  62. .hwport = 0,
  63. .ucon = UNIVERSAL_UCON_DEFAULT,
  64. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  65. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  66. },
  67. [1] = {
  68. .hwport = 1,
  69. .ucon = UNIVERSAL_UCON_DEFAULT,
  70. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  71. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  72. },
  73. [2] = {
  74. .hwport = 2,
  75. .ucon = UNIVERSAL_UCON_DEFAULT,
  76. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  77. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  78. },
  79. [3] = {
  80. .hwport = 3,
  81. .ucon = UNIVERSAL_UCON_DEFAULT,
  82. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  83. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  84. },
  85. };
  86. static struct regulator_consumer_supply max8952_consumer =
  87. REGULATOR_SUPPLY("vdd_arm", NULL);
  88. static struct max8952_platform_data universal_max8952_pdata __initdata = {
  89. .gpio_vid0 = EXYNOS4_GPX0(3),
  90. .gpio_vid1 = EXYNOS4_GPX0(4),
  91. .gpio_en = -1, /* Not controllable, set "Always High" */
  92. .default_mode = 0, /* vid0 = 0, vid1 = 0 */
  93. .dvs_mode = { 48, 32, 28, 18 }, /* 1.25, 1.20, 1.05, 0.95V */
  94. .sync_freq = 0, /* default: fastest */
  95. .ramp_speed = 0, /* default: fastest */
  96. .reg_data = {
  97. .constraints = {
  98. .name = "VARM_1.2V",
  99. .min_uV = 770000,
  100. .max_uV = 1400000,
  101. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  102. .always_on = 1,
  103. .boot_on = 1,
  104. },
  105. .num_consumer_supplies = 1,
  106. .consumer_supplies = &max8952_consumer,
  107. },
  108. };
  109. static struct regulator_consumer_supply lp3974_buck1_consumer =
  110. REGULATOR_SUPPLY("vdd_int", NULL);
  111. static struct regulator_consumer_supply lp3974_buck2_consumer =
  112. REGULATOR_SUPPLY("vddg3d", NULL);
  113. static struct regulator_consumer_supply lp3974_buck3_consumer[] = {
  114. REGULATOR_SUPPLY("vdet", "s5p-sdo"),
  115. REGULATOR_SUPPLY("vdd_reg", "0-003c"),
  116. };
  117. static struct regulator_init_data lp3974_buck1_data = {
  118. .constraints = {
  119. .name = "VINT_1.1V",
  120. .min_uV = 750000,
  121. .max_uV = 1500000,
  122. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  123. REGULATOR_CHANGE_STATUS,
  124. .boot_on = 1,
  125. .state_mem = {
  126. .disabled = 1,
  127. },
  128. },
  129. .num_consumer_supplies = 1,
  130. .consumer_supplies = &lp3974_buck1_consumer,
  131. };
  132. static struct regulator_init_data lp3974_buck2_data = {
  133. .constraints = {
  134. .name = "VG3D_1.1V",
  135. .min_uV = 750000,
  136. .max_uV = 1500000,
  137. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  138. REGULATOR_CHANGE_STATUS,
  139. .boot_on = 1,
  140. .state_mem = {
  141. .disabled = 1,
  142. },
  143. },
  144. .num_consumer_supplies = 1,
  145. .consumer_supplies = &lp3974_buck2_consumer,
  146. };
  147. static struct regulator_init_data lp3974_buck3_data = {
  148. .constraints = {
  149. .name = "VCC_1.8V",
  150. .min_uV = 1800000,
  151. .max_uV = 1800000,
  152. .apply_uV = 1,
  153. .always_on = 1,
  154. .state_mem = {
  155. .enabled = 1,
  156. },
  157. },
  158. .num_consumer_supplies = ARRAY_SIZE(lp3974_buck3_consumer),
  159. .consumer_supplies = lp3974_buck3_consumer,
  160. };
  161. static struct regulator_init_data lp3974_buck4_data = {
  162. .constraints = {
  163. .name = "VMEM_1.2V",
  164. .min_uV = 1200000,
  165. .max_uV = 1200000,
  166. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  167. .apply_uV = 1,
  168. .state_mem = {
  169. .disabled = 1,
  170. },
  171. },
  172. };
  173. static struct regulator_init_data lp3974_ldo2_data = {
  174. .constraints = {
  175. .name = "VALIVE_1.2V",
  176. .min_uV = 1200000,
  177. .max_uV = 1200000,
  178. .apply_uV = 1,
  179. .always_on = 1,
  180. .state_mem = {
  181. .enabled = 1,
  182. },
  183. },
  184. };
  185. static struct regulator_consumer_supply lp3974_ldo3_consumer[] = {
  186. REGULATOR_SUPPLY("vusb_a", "s3c-hsotg"),
  187. REGULATOR_SUPPLY("vdd", "exynos4-hdmi"),
  188. REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"),
  189. REGULATOR_SUPPLY("vddcore", "s5p-mipi-csis.0"),
  190. };
  191. static struct regulator_init_data lp3974_ldo3_data = {
  192. .constraints = {
  193. .name = "VUSB+MIPI_1.1V",
  194. .min_uV = 1100000,
  195. .max_uV = 1100000,
  196. .apply_uV = 1,
  197. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  198. .state_mem = {
  199. .disabled = 1,
  200. },
  201. },
  202. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo3_consumer),
  203. .consumer_supplies = lp3974_ldo3_consumer,
  204. };
  205. static struct regulator_consumer_supply lp3974_ldo4_consumer[] = {
  206. REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"),
  207. };
  208. static struct regulator_init_data lp3974_ldo4_data = {
  209. .constraints = {
  210. .name = "VADC_3.3V",
  211. .min_uV = 3300000,
  212. .max_uV = 3300000,
  213. .apply_uV = 1,
  214. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  215. .state_mem = {
  216. .disabled = 1,
  217. },
  218. },
  219. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo4_consumer),
  220. .consumer_supplies = lp3974_ldo4_consumer,
  221. };
  222. static struct regulator_init_data lp3974_ldo5_data = {
  223. .constraints = {
  224. .name = "VTF_2.8V",
  225. .min_uV = 2800000,
  226. .max_uV = 2800000,
  227. .apply_uV = 1,
  228. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  229. .state_mem = {
  230. .disabled = 1,
  231. },
  232. },
  233. };
  234. static struct regulator_init_data lp3974_ldo6_data = {
  235. .constraints = {
  236. .name = "LDO6",
  237. .min_uV = 2000000,
  238. .max_uV = 2000000,
  239. .apply_uV = 1,
  240. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  241. .state_mem = {
  242. .disabled = 1,
  243. },
  244. },
  245. };
  246. static struct regulator_consumer_supply lp3974_ldo7_consumer[] = {
  247. REGULATOR_SUPPLY("vddio", "s5p-mipi-csis.0"),
  248. };
  249. static struct regulator_init_data lp3974_ldo7_data = {
  250. .constraints = {
  251. .name = "VLCD+VMIPI_1.8V",
  252. .min_uV = 1800000,
  253. .max_uV = 1800000,
  254. .apply_uV = 1,
  255. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  256. .state_mem = {
  257. .disabled = 1,
  258. },
  259. },
  260. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo7_consumer),
  261. .consumer_supplies = lp3974_ldo7_consumer,
  262. };
  263. static struct regulator_consumer_supply lp3974_ldo8_consumer[] = {
  264. REGULATOR_SUPPLY("vusb_d", "s3c-hsotg"),
  265. REGULATOR_SUPPLY("vdd33a_dac", "s5p-sdo"),
  266. };
  267. static struct regulator_init_data lp3974_ldo8_data = {
  268. .constraints = {
  269. .name = "VUSB+VDAC_3.3V",
  270. .min_uV = 3300000,
  271. .max_uV = 3300000,
  272. .apply_uV = 1,
  273. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  274. .state_mem = {
  275. .disabled = 1,
  276. },
  277. },
  278. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo8_consumer),
  279. .consumer_supplies = lp3974_ldo8_consumer,
  280. };
  281. static struct regulator_consumer_supply lp3974_ldo9_consumer =
  282. REGULATOR_SUPPLY("vddio", "0-003c");
  283. static struct regulator_init_data lp3974_ldo9_data = {
  284. .constraints = {
  285. .name = "VCC_2.8V",
  286. .min_uV = 2800000,
  287. .max_uV = 2800000,
  288. .apply_uV = 1,
  289. .always_on = 1,
  290. .state_mem = {
  291. .enabled = 1,
  292. },
  293. },
  294. .num_consumer_supplies = 1,
  295. .consumer_supplies = &lp3974_ldo9_consumer,
  296. };
  297. static struct regulator_init_data lp3974_ldo10_data = {
  298. .constraints = {
  299. .name = "VPLL_1.1V",
  300. .min_uV = 1100000,
  301. .max_uV = 1100000,
  302. .boot_on = 1,
  303. .apply_uV = 1,
  304. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  305. .state_mem = {
  306. .disabled = 1,
  307. },
  308. },
  309. };
  310. static struct regulator_consumer_supply lp3974_ldo11_consumer =
  311. REGULATOR_SUPPLY("dig_28", "0-001f");
  312. static struct regulator_init_data lp3974_ldo11_data = {
  313. .constraints = {
  314. .name = "CAM_AF_3.3V",
  315. .min_uV = 3300000,
  316. .max_uV = 3300000,
  317. .apply_uV = 1,
  318. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  319. .state_mem = {
  320. .disabled = 1,
  321. },
  322. },
  323. .num_consumer_supplies = 1,
  324. .consumer_supplies = &lp3974_ldo11_consumer,
  325. };
  326. static struct regulator_init_data lp3974_ldo12_data = {
  327. .constraints = {
  328. .name = "PS_2.8V",
  329. .min_uV = 2800000,
  330. .max_uV = 2800000,
  331. .apply_uV = 1,
  332. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  333. .state_mem = {
  334. .disabled = 1,
  335. },
  336. },
  337. };
  338. static struct regulator_init_data lp3974_ldo13_data = {
  339. .constraints = {
  340. .name = "VHIC_1.2V",
  341. .min_uV = 1200000,
  342. .max_uV = 1200000,
  343. .apply_uV = 1,
  344. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  345. .state_mem = {
  346. .disabled = 1,
  347. },
  348. },
  349. };
  350. static struct regulator_consumer_supply lp3974_ldo14_consumer =
  351. REGULATOR_SUPPLY("dig_18", "0-001f");
  352. static struct regulator_init_data lp3974_ldo14_data = {
  353. .constraints = {
  354. .name = "CAM_I_HOST_1.8V",
  355. .min_uV = 1800000,
  356. .max_uV = 1800000,
  357. .apply_uV = 1,
  358. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  359. .state_mem = {
  360. .disabled = 1,
  361. },
  362. },
  363. .num_consumer_supplies = 1,
  364. .consumer_supplies = &lp3974_ldo14_consumer,
  365. };
  366. static struct regulator_consumer_supply lp3974_ldo15_consumer =
  367. REGULATOR_SUPPLY("dig_12", "0-001f");
  368. static struct regulator_init_data lp3974_ldo15_data = {
  369. .constraints = {
  370. .name = "CAM_S_DIG+FM33_CORE_1.2V",
  371. .min_uV = 1200000,
  372. .max_uV = 1200000,
  373. .apply_uV = 1,
  374. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  375. .state_mem = {
  376. .disabled = 1,
  377. },
  378. },
  379. .num_consumer_supplies = 1,
  380. .consumer_supplies = &lp3974_ldo15_consumer,
  381. };
  382. static struct regulator_consumer_supply lp3974_ldo16_consumer[] = {
  383. REGULATOR_SUPPLY("vdda", "0-003c"),
  384. REGULATOR_SUPPLY("a_sensor", "0-001f"),
  385. };
  386. static struct regulator_init_data lp3974_ldo16_data = {
  387. .constraints = {
  388. .name = "CAM_S_ANA_2.8V",
  389. .min_uV = 2800000,
  390. .max_uV = 2800000,
  391. .apply_uV = 1,
  392. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  393. .state_mem = {
  394. .disabled = 1,
  395. },
  396. },
  397. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo16_consumer),
  398. .consumer_supplies = lp3974_ldo16_consumer,
  399. };
  400. static struct regulator_init_data lp3974_ldo17_data = {
  401. .constraints = {
  402. .name = "VCC_3.0V_LCD",
  403. .min_uV = 3000000,
  404. .max_uV = 3000000,
  405. .apply_uV = 1,
  406. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  407. .boot_on = 1,
  408. .state_mem = {
  409. .disabled = 1,
  410. },
  411. },
  412. };
  413. static struct regulator_init_data lp3974_32khz_ap_data = {
  414. .constraints = {
  415. .name = "32KHz AP",
  416. .always_on = 1,
  417. .state_mem = {
  418. .enabled = 1,
  419. },
  420. },
  421. };
  422. static struct regulator_init_data lp3974_32khz_cp_data = {
  423. .constraints = {
  424. .name = "32KHz CP",
  425. .state_mem = {
  426. .disabled = 1,
  427. },
  428. },
  429. };
  430. static struct regulator_init_data lp3974_vichg_data = {
  431. .constraints = {
  432. .name = "VICHG",
  433. .state_mem = {
  434. .disabled = 1,
  435. },
  436. },
  437. };
  438. static struct regulator_init_data lp3974_esafeout1_data = {
  439. .constraints = {
  440. .name = "SAFEOUT1",
  441. .min_uV = 4800000,
  442. .max_uV = 4800000,
  443. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  444. .always_on = 1,
  445. .state_mem = {
  446. .enabled = 1,
  447. },
  448. },
  449. };
  450. static struct regulator_init_data lp3974_esafeout2_data = {
  451. .constraints = {
  452. .name = "SAFEOUT2",
  453. .boot_on = 1,
  454. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  455. .state_mem = {
  456. .enabled = 1,
  457. },
  458. },
  459. };
  460. static struct max8998_regulator_data lp3974_regulators[] = {
  461. { MAX8998_LDO2, &lp3974_ldo2_data },
  462. { MAX8998_LDO3, &lp3974_ldo3_data },
  463. { MAX8998_LDO4, &lp3974_ldo4_data },
  464. { MAX8998_LDO5, &lp3974_ldo5_data },
  465. { MAX8998_LDO6, &lp3974_ldo6_data },
  466. { MAX8998_LDO7, &lp3974_ldo7_data },
  467. { MAX8998_LDO8, &lp3974_ldo8_data },
  468. { MAX8998_LDO9, &lp3974_ldo9_data },
  469. { MAX8998_LDO10, &lp3974_ldo10_data },
  470. { MAX8998_LDO11, &lp3974_ldo11_data },
  471. { MAX8998_LDO12, &lp3974_ldo12_data },
  472. { MAX8998_LDO13, &lp3974_ldo13_data },
  473. { MAX8998_LDO14, &lp3974_ldo14_data },
  474. { MAX8998_LDO15, &lp3974_ldo15_data },
  475. { MAX8998_LDO16, &lp3974_ldo16_data },
  476. { MAX8998_LDO17, &lp3974_ldo17_data },
  477. { MAX8998_BUCK1, &lp3974_buck1_data },
  478. { MAX8998_BUCK2, &lp3974_buck2_data },
  479. { MAX8998_BUCK3, &lp3974_buck3_data },
  480. { MAX8998_BUCK4, &lp3974_buck4_data },
  481. { MAX8998_EN32KHZ_AP, &lp3974_32khz_ap_data },
  482. { MAX8998_EN32KHZ_CP, &lp3974_32khz_cp_data },
  483. { MAX8998_ENVICHG, &lp3974_vichg_data },
  484. { MAX8998_ESAFEOUT1, &lp3974_esafeout1_data },
  485. { MAX8998_ESAFEOUT2, &lp3974_esafeout2_data },
  486. };
  487. static struct max8998_platform_data universal_lp3974_pdata = {
  488. .num_regulators = ARRAY_SIZE(lp3974_regulators),
  489. .regulators = lp3974_regulators,
  490. .buck1_voltage1 = 1100000, /* INT */
  491. .buck1_voltage2 = 1000000,
  492. .buck1_voltage3 = 1100000,
  493. .buck1_voltage4 = 1000000,
  494. .buck1_set1 = EXYNOS4_GPX0(5),
  495. .buck1_set2 = EXYNOS4_GPX0(6),
  496. .buck2_voltage1 = 1200000, /* G3D */
  497. .buck2_voltage2 = 1100000,
  498. .buck1_default_idx = 0,
  499. .buck2_set3 = EXYNOS4_GPE2(0),
  500. .buck2_default_idx = 0,
  501. .wakeup = true,
  502. };
  503. enum fixed_regulator_id {
  504. FIXED_REG_ID_MMC0,
  505. FIXED_REG_ID_HDMI_5V,
  506. FIXED_REG_ID_CAM_S_IF,
  507. FIXED_REG_ID_CAM_I_CORE,
  508. FIXED_REG_ID_CAM_VT_DIO,
  509. };
  510. static struct regulator_consumer_supply hdmi_fixed_consumer =
  511. REGULATOR_SUPPLY("hdmi-en", "exynos4-hdmi");
  512. static struct regulator_init_data hdmi_fixed_voltage_init_data = {
  513. .constraints = {
  514. .name = "HDMI_5V",
  515. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  516. },
  517. .num_consumer_supplies = 1,
  518. .consumer_supplies = &hdmi_fixed_consumer,
  519. };
  520. static struct fixed_voltage_config hdmi_fixed_voltage_config = {
  521. .supply_name = "HDMI_EN1",
  522. .microvolts = 5000000,
  523. .gpio = EXYNOS4_GPE0(1),
  524. .enable_high = true,
  525. .init_data = &hdmi_fixed_voltage_init_data,
  526. };
  527. static struct platform_device hdmi_fixed_voltage = {
  528. .name = "reg-fixed-voltage",
  529. .id = FIXED_REG_ID_HDMI_5V,
  530. .dev = {
  531. .platform_data = &hdmi_fixed_voltage_config,
  532. },
  533. };
  534. /* GPIO I2C 5 (PMIC) */
  535. static struct i2c_board_info i2c5_devs[] __initdata = {
  536. {
  537. I2C_BOARD_INFO("max8952", 0xC0 >> 1),
  538. .platform_data = &universal_max8952_pdata,
  539. }, {
  540. I2C_BOARD_INFO("lp3974", 0xCC >> 1),
  541. .platform_data = &universal_lp3974_pdata,
  542. },
  543. };
  544. /* I2C3 (TSP) */
  545. static struct mxt_platform_data qt602240_platform_data = {
  546. .x_line = 19,
  547. .y_line = 11,
  548. .x_size = 800,
  549. .y_size = 480,
  550. .blen = 0x11,
  551. .threshold = 0x28,
  552. .voltage = 2800000, /* 2.8V */
  553. .orient = MXT_DIAGONAL,
  554. .irqflags = IRQF_TRIGGER_FALLING,
  555. };
  556. static struct i2c_board_info i2c3_devs[] __initdata = {
  557. {
  558. I2C_BOARD_INFO("qt602240_ts", 0x4a),
  559. .platform_data = &qt602240_platform_data,
  560. },
  561. };
  562. static void __init universal_tsp_init(void)
  563. {
  564. int gpio;
  565. /* TSP_LDO_ON: XMDMADDR_11 */
  566. gpio = EXYNOS4_GPE2(3);
  567. gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "TSP_LDO_ON");
  568. gpio_export(gpio, 0);
  569. /* TSP_INT: XMDMADDR_7 */
  570. gpio = EXYNOS4_GPE1(7);
  571. gpio_request(gpio, "TSP_INT");
  572. s5p_register_gpio_interrupt(gpio);
  573. s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
  574. s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
  575. i2c3_devs[0].irq = gpio_to_irq(gpio);
  576. }
  577. /* GPIO I2C 12 (3 Touchkey) */
  578. static uint32_t touchkey_keymap[] = {
  579. /* MCS_KEY_MAP(value, keycode) */
  580. MCS_KEY_MAP(0, KEY_MENU), /* KEY_SEND */
  581. MCS_KEY_MAP(1, KEY_BACK), /* KEY_END */
  582. };
  583. static struct mcs_platform_data touchkey_data = {
  584. .keymap = touchkey_keymap,
  585. .keymap_size = ARRAY_SIZE(touchkey_keymap),
  586. .key_maxval = 2,
  587. };
  588. /* GPIO I2C 3_TOUCH 2.8V */
  589. #define I2C_GPIO_BUS_12 12
  590. static struct i2c_gpio_platform_data i2c_gpio12_data = {
  591. .sda_pin = EXYNOS4_GPE4(0), /* XMDMDATA_8 */
  592. .scl_pin = EXYNOS4_GPE4(1), /* XMDMDATA_9 */
  593. };
  594. static struct platform_device i2c_gpio12 = {
  595. .name = "i2c-gpio",
  596. .id = I2C_GPIO_BUS_12,
  597. .dev = {
  598. .platform_data = &i2c_gpio12_data,
  599. },
  600. };
  601. static struct i2c_board_info i2c_gpio12_devs[] __initdata = {
  602. {
  603. I2C_BOARD_INFO("mcs5080_touchkey", 0x20),
  604. .platform_data = &touchkey_data,
  605. },
  606. };
  607. static void __init universal_touchkey_init(void)
  608. {
  609. int gpio;
  610. gpio = EXYNOS4_GPE3(7); /* XMDMDATA_7 */
  611. gpio_request(gpio, "3_TOUCH_INT");
  612. s5p_register_gpio_interrupt(gpio);
  613. s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
  614. i2c_gpio12_devs[0].irq = gpio_to_irq(gpio);
  615. gpio = EXYNOS4_GPE3(3); /* XMDMDATA_3 */
  616. gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "3_TOUCH_EN");
  617. }
  618. static struct s3c2410_platform_i2c universal_i2c0_platdata __initdata = {
  619. .frequency = 300 * 1000,
  620. .sda_delay = 200,
  621. };
  622. /* GPIO KEYS */
  623. static struct gpio_keys_button universal_gpio_keys_tables[] = {
  624. {
  625. .code = KEY_VOLUMEUP,
  626. .gpio = EXYNOS4_GPX2(0), /* XEINT16 */
  627. .desc = "gpio-keys: KEY_VOLUMEUP",
  628. .type = EV_KEY,
  629. .active_low = 1,
  630. .debounce_interval = 1,
  631. }, {
  632. .code = KEY_VOLUMEDOWN,
  633. .gpio = EXYNOS4_GPX2(1), /* XEINT17 */
  634. .desc = "gpio-keys: KEY_VOLUMEDOWN",
  635. .type = EV_KEY,
  636. .active_low = 1,
  637. .debounce_interval = 1,
  638. }, {
  639. .code = KEY_CONFIG,
  640. .gpio = EXYNOS4_GPX2(2), /* XEINT18 */
  641. .desc = "gpio-keys: KEY_CONFIG",
  642. .type = EV_KEY,
  643. .active_low = 1,
  644. .debounce_interval = 1,
  645. }, {
  646. .code = KEY_CAMERA,
  647. .gpio = EXYNOS4_GPX2(3), /* XEINT19 */
  648. .desc = "gpio-keys: KEY_CAMERA",
  649. .type = EV_KEY,
  650. .active_low = 1,
  651. .debounce_interval = 1,
  652. }, {
  653. .code = KEY_OK,
  654. .gpio = EXYNOS4_GPX3(5), /* XEINT29 */
  655. .desc = "gpio-keys: KEY_OK",
  656. .type = EV_KEY,
  657. .active_low = 1,
  658. .debounce_interval = 1,
  659. },
  660. };
  661. static struct gpio_keys_platform_data universal_gpio_keys_data = {
  662. .buttons = universal_gpio_keys_tables,
  663. .nbuttons = ARRAY_SIZE(universal_gpio_keys_tables),
  664. };
  665. static struct platform_device universal_gpio_keys = {
  666. .name = "gpio-keys",
  667. .dev = {
  668. .platform_data = &universal_gpio_keys_data,
  669. },
  670. };
  671. /* eMMC */
  672. static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
  673. .max_width = 8,
  674. .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
  675. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  676. .cd_type = S3C_SDHCI_CD_PERMANENT,
  677. };
  678. static struct regulator_consumer_supply mmc0_supplies[] = {
  679. REGULATOR_SUPPLY("vmmc", "exynos4-sdhci.0"),
  680. };
  681. static struct regulator_init_data mmc0_fixed_voltage_init_data = {
  682. .constraints = {
  683. .name = "VMEM_VDD_2.8V",
  684. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  685. },
  686. .num_consumer_supplies = ARRAY_SIZE(mmc0_supplies),
  687. .consumer_supplies = mmc0_supplies,
  688. };
  689. static struct fixed_voltage_config mmc0_fixed_voltage_config = {
  690. .supply_name = "MASSMEMORY_EN",
  691. .microvolts = 2800000,
  692. .gpio = EXYNOS4_GPE1(3),
  693. .enable_high = true,
  694. .init_data = &mmc0_fixed_voltage_init_data,
  695. };
  696. static struct platform_device mmc0_fixed_voltage = {
  697. .name = "reg-fixed-voltage",
  698. .id = FIXED_REG_ID_MMC0,
  699. .dev = {
  700. .platform_data = &mmc0_fixed_voltage_config,
  701. },
  702. };
  703. /* SD */
  704. static struct s3c_sdhci_platdata universal_hsmmc2_data __initdata = {
  705. .max_width = 4,
  706. .host_caps = MMC_CAP_4_BIT_DATA |
  707. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
  708. .ext_cd_gpio = EXYNOS4_GPX3(4), /* XEINT_28 */
  709. .ext_cd_gpio_invert = 1,
  710. .cd_type = S3C_SDHCI_CD_GPIO,
  711. };
  712. /* WiFi */
  713. static struct s3c_sdhci_platdata universal_hsmmc3_data __initdata = {
  714. .max_width = 4,
  715. .host_caps = MMC_CAP_4_BIT_DATA |
  716. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
  717. .cd_type = S3C_SDHCI_CD_EXTERNAL,
  718. };
  719. static void __init universal_sdhci_init(void)
  720. {
  721. s3c_sdhci0_set_platdata(&universal_hsmmc0_data);
  722. s3c_sdhci2_set_platdata(&universal_hsmmc2_data);
  723. s3c_sdhci3_set_platdata(&universal_hsmmc3_data);
  724. }
  725. /* I2C1 */
  726. static struct i2c_board_info i2c1_devs[] __initdata = {
  727. /* Gyro, To be updated */
  728. };
  729. #ifdef CONFIG_DRM_EXYNOS
  730. static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
  731. .panel = {
  732. .timing = {
  733. .left_margin = 16,
  734. .right_margin = 16,
  735. .upper_margin = 2,
  736. .lower_margin = 28,
  737. .hsync_len = 2,
  738. .vsync_len = 1,
  739. .xres = 480,
  740. .yres = 800,
  741. .refresh = 55,
  742. },
  743. },
  744. .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
  745. VIDCON0_CLKSEL_LCD,
  746. .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
  747. | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
  748. .default_win = 3,
  749. .bpp = 32,
  750. };
  751. #else
  752. /* Frame Buffer */
  753. static struct s3c_fb_pd_win universal_fb_win0 = {
  754. .max_bpp = 32,
  755. .default_bpp = 16,
  756. .xres = 480,
  757. .yres = 800,
  758. .virtual_x = 480,
  759. .virtual_y = 2 * 800,
  760. };
  761. static struct fb_videomode universal_lcd_timing = {
  762. .left_margin = 16,
  763. .right_margin = 16,
  764. .upper_margin = 2,
  765. .lower_margin = 28,
  766. .hsync_len = 2,
  767. .vsync_len = 1,
  768. .xres = 480,
  769. .yres = 800,
  770. .refresh = 55,
  771. };
  772. static struct s3c_fb_platdata universal_lcd_pdata __initdata = {
  773. .win[0] = &universal_fb_win0,
  774. .vtiming = &universal_lcd_timing,
  775. .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
  776. VIDCON0_CLKSEL_LCD,
  777. .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
  778. | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
  779. .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
  780. };
  781. #endif
  782. static struct regulator_consumer_supply cam_vt_dio_supply =
  783. REGULATOR_SUPPLY("vdd_core", "0-003c");
  784. static struct regulator_init_data cam_vt_dio_reg_init_data = {
  785. .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
  786. .num_consumer_supplies = 1,
  787. .consumer_supplies = &cam_vt_dio_supply,
  788. };
  789. static struct fixed_voltage_config cam_vt_dio_fixed_voltage_cfg = {
  790. .supply_name = "CAM_VT_D_IO",
  791. .microvolts = 2800000,
  792. .gpio = EXYNOS4_GPE2(1), /* CAM_PWR_EN2 */
  793. .enable_high = 1,
  794. .init_data = &cam_vt_dio_reg_init_data,
  795. };
  796. static struct platform_device cam_vt_dio_fixed_reg_dev = {
  797. .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_VT_DIO,
  798. .dev = { .platform_data = &cam_vt_dio_fixed_voltage_cfg },
  799. };
  800. static struct regulator_consumer_supply cam_i_core_supply =
  801. REGULATOR_SUPPLY("core", "0-001f");
  802. static struct regulator_init_data cam_i_core_reg_init_data = {
  803. .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
  804. .num_consumer_supplies = 1,
  805. .consumer_supplies = &cam_i_core_supply,
  806. };
  807. static struct fixed_voltage_config cam_i_core_fixed_voltage_cfg = {
  808. .supply_name = "CAM_I_CORE_1.2V",
  809. .microvolts = 1200000,
  810. .gpio = EXYNOS4_GPE2(2), /* CAM_8M_CORE_EN */
  811. .enable_high = 1,
  812. .init_data = &cam_i_core_reg_init_data,
  813. };
  814. static struct platform_device cam_i_core_fixed_reg_dev = {
  815. .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_I_CORE,
  816. .dev = { .platform_data = &cam_i_core_fixed_voltage_cfg },
  817. };
  818. static struct regulator_consumer_supply cam_s_if_supply =
  819. REGULATOR_SUPPLY("d_sensor", "0-001f");
  820. static struct regulator_init_data cam_s_if_reg_init_data = {
  821. .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
  822. .num_consumer_supplies = 1,
  823. .consumer_supplies = &cam_s_if_supply,
  824. };
  825. static struct fixed_voltage_config cam_s_if_fixed_voltage_cfg = {
  826. .supply_name = "CAM_S_IF_1.8V",
  827. .microvolts = 1800000,
  828. .gpio = EXYNOS4_GPE3(0), /* CAM_PWR_EN1 */
  829. .enable_high = 1,
  830. .init_data = &cam_s_if_reg_init_data,
  831. };
  832. static struct platform_device cam_s_if_fixed_reg_dev = {
  833. .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_S_IF,
  834. .dev = { .platform_data = &cam_s_if_fixed_voltage_cfg },
  835. };
  836. static struct s5p_platform_mipi_csis mipi_csis_platdata = {
  837. .clk_rate = 166000000UL,
  838. .lanes = 2,
  839. .hs_settle = 12,
  840. };
  841. #define GPIO_CAM_LEVEL_EN(n) EXYNOS4_GPE4(n + 3)
  842. #define GPIO_CAM_8M_ISP_INT EXYNOS4_GPX1(5) /* XEINT_13 */
  843. #define GPIO_CAM_MEGA_nRST EXYNOS4_GPE2(5)
  844. #define GPIO_CAM_VGA_NRST EXYNOS4_GPE4(7)
  845. #define GPIO_CAM_VGA_NSTBY EXYNOS4_GPE4(6)
  846. static int s5k6aa_set_power(int on)
  847. {
  848. gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on);
  849. return 0;
  850. }
  851. static struct s5k6aa_platform_data s5k6aa_platdata = {
  852. .mclk_frequency = 21600000UL,
  853. .gpio_reset = { GPIO_CAM_VGA_NRST, 0 },
  854. .gpio_stby = { GPIO_CAM_VGA_NSTBY, 0 },
  855. .bus_type = V4L2_MBUS_PARALLEL,
  856. .horiz_flip = 1,
  857. .set_power = s5k6aa_set_power,
  858. };
  859. static struct i2c_board_info s5k6aa_board_info = {
  860. I2C_BOARD_INFO("S5K6AA", 0x3C),
  861. .platform_data = &s5k6aa_platdata,
  862. };
  863. static int m5mols_set_power(struct device *dev, int on)
  864. {
  865. gpio_set_value(GPIO_CAM_LEVEL_EN(1), !on);
  866. gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on);
  867. return 0;
  868. }
  869. static struct m5mols_platform_data m5mols_platdata = {
  870. .gpio_reset = GPIO_CAM_MEGA_nRST,
  871. .reset_polarity = 0,
  872. .set_power = m5mols_set_power,
  873. };
  874. static struct i2c_board_info m5mols_board_info = {
  875. I2C_BOARD_INFO("M5MOLS", 0x1F),
  876. .platform_data = &m5mols_platdata,
  877. };
  878. static struct fimc_source_info universal_camera_sensors[] = {
  879. {
  880. .mux_id = 0,
  881. .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
  882. V4L2_MBUS_VSYNC_ACTIVE_LOW,
  883. .fimc_bus_type = FIMC_BUS_TYPE_ITU_601,
  884. .board_info = &s5k6aa_board_info,
  885. .i2c_bus_num = 0,
  886. .clk_frequency = 24000000UL,
  887. }, {
  888. .mux_id = 0,
  889. .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
  890. V4L2_MBUS_VSYNC_ACTIVE_LOW,
  891. .fimc_bus_type = FIMC_BUS_TYPE_MIPI_CSI2,
  892. .board_info = &m5mols_board_info,
  893. .i2c_bus_num = 0,
  894. .clk_frequency = 24000000UL,
  895. },
  896. };
  897. static struct s5p_platform_fimc fimc_md_platdata = {
  898. .source_info = universal_camera_sensors,
  899. .num_clients = ARRAY_SIZE(universal_camera_sensors),
  900. };
  901. static struct gpio universal_camera_gpios[] = {
  902. { GPIO_CAM_LEVEL_EN(1), GPIOF_OUT_INIT_HIGH, "CAM_LVL_EN1" },
  903. { GPIO_CAM_LEVEL_EN(2), GPIOF_OUT_INIT_LOW, "CAM_LVL_EN2" },
  904. { GPIO_CAM_8M_ISP_INT, GPIOF_IN, "8M_ISP_INT" },
  905. { GPIO_CAM_MEGA_nRST, GPIOF_OUT_INIT_LOW, "CAM_8M_NRST" },
  906. { GPIO_CAM_VGA_NRST, GPIOF_OUT_INIT_LOW, "CAM_VGA_NRST" },
  907. { GPIO_CAM_VGA_NSTBY, GPIOF_OUT_INIT_LOW, "CAM_VGA_NSTBY" },
  908. };
  909. /* USB OTG */
  910. static struct s3c_hsotg_plat universal_hsotg_pdata;
  911. static void __init universal_camera_init(void)
  912. {
  913. s3c_set_platdata(&mipi_csis_platdata, sizeof(mipi_csis_platdata),
  914. &s5p_device_mipi_csis0);
  915. s3c_set_platdata(&fimc_md_platdata, sizeof(fimc_md_platdata),
  916. &s5p_device_fimc_md);
  917. if (gpio_request_array(universal_camera_gpios,
  918. ARRAY_SIZE(universal_camera_gpios))) {
  919. pr_err("%s: GPIO request failed\n", __func__);
  920. return;
  921. }
  922. if (!s3c_gpio_cfgpin(GPIO_CAM_8M_ISP_INT, S3C_GPIO_SFN(0xf)))
  923. m5mols_board_info.irq = gpio_to_irq(GPIO_CAM_8M_ISP_INT);
  924. else
  925. pr_err("Failed to configure 8M_ISP_INT GPIO\n");
  926. /* Free GPIOs controlled directly by the sensor drivers. */
  927. gpio_free(GPIO_CAM_MEGA_nRST);
  928. gpio_free(GPIO_CAM_8M_ISP_INT);
  929. gpio_free(GPIO_CAM_VGA_NRST);
  930. gpio_free(GPIO_CAM_VGA_NSTBY);
  931. if (exynos4_fimc_setup_gpio(S5P_CAMPORT_A))
  932. pr_err("Camera port A setup failed\n");
  933. }
  934. static struct platform_device *universal_devices[] __initdata = {
  935. /* Samsung Platform Devices */
  936. &s5p_device_mipi_csis0,
  937. &s5p_device_fimc0,
  938. &s5p_device_fimc1,
  939. &s5p_device_fimc2,
  940. &s5p_device_fimc3,
  941. &s5p_device_g2d,
  942. &mmc0_fixed_voltage,
  943. &s3c_device_hsmmc0,
  944. &s3c_device_hsmmc2,
  945. &s3c_device_hsmmc3,
  946. &s3c_device_i2c0,
  947. &s3c_device_i2c3,
  948. &s3c_device_i2c5,
  949. &s5p_device_i2c_hdmiphy,
  950. &hdmi_fixed_voltage,
  951. &s5p_device_hdmi,
  952. &s5p_device_sdo,
  953. &s5p_device_mixer,
  954. /* Universal Devices */
  955. &i2c_gpio12,
  956. &universal_gpio_keys,
  957. &s5p_device_onenand,
  958. &s5p_device_fimd0,
  959. &s5p_device_jpeg,
  960. &s3c_device_usb_hsotg,
  961. &s5p_device_mfc,
  962. &s5p_device_mfc_l,
  963. &s5p_device_mfc_r,
  964. &cam_vt_dio_fixed_reg_dev,
  965. &cam_i_core_fixed_reg_dev,
  966. &cam_s_if_fixed_reg_dev,
  967. &s5p_device_fimc_md,
  968. };
  969. static void __init universal_map_io(void)
  970. {
  971. exynos_init_io(NULL, 0);
  972. s3c24xx_init_clocks(clk_xusbxti.rate);
  973. s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
  974. s5p_set_timer_source(S5P_PWM2, S5P_PWM4);
  975. }
  976. static void s5p_tv_setup(void)
  977. {
  978. /* direct HPD to HDMI chip */
  979. gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
  980. s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
  981. s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
  982. }
  983. static void __init universal_reserve(void)
  984. {
  985. s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
  986. }
  987. static void __init universal_machine_init(void)
  988. {
  989. universal_sdhci_init();
  990. s5p_tv_setup();
  991. s3c_i2c0_set_platdata(&universal_i2c0_platdata);
  992. i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs));
  993. universal_tsp_init();
  994. s3c_i2c3_set_platdata(NULL);
  995. i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs));
  996. s3c_i2c5_set_platdata(NULL);
  997. s5p_i2c_hdmiphy_set_platdata(NULL);
  998. i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs));
  999. #ifdef CONFIG_DRM_EXYNOS
  1000. s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
  1001. exynos4_fimd0_gpio_setup_24bpp();
  1002. #else
  1003. s5p_fimd0_set_platdata(&universal_lcd_pdata);
  1004. #endif
  1005. universal_touchkey_init();
  1006. i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs,
  1007. ARRAY_SIZE(i2c_gpio12_devs));
  1008. s3c_hsotg_set_platdata(&universal_hsotg_pdata);
  1009. universal_camera_init();
  1010. /* Last */
  1011. platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices));
  1012. }
  1013. MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
  1014. /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */
  1015. .atag_offset = 0x100,
  1016. .smp = smp_ops(exynos_smp_ops),
  1017. .init_irq = exynos4_init_irq,
  1018. .map_io = universal_map_io,
  1019. .init_machine = universal_machine_init,
  1020. .init_late = exynos_init_late,
  1021. .init_time = s5p_timer_init,
  1022. .reserve = &universal_reserve,
  1023. .restart = exynos4_restart,
  1024. MACHINE_END