ste-nomadik-stn8815.dtsi 5.2 KB

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  1. /*
  2. * Device Tree for the ST-Ericsson Nomadik 8815 STn8815 SoC
  3. */
  4. /include/ "skeleton.dtsi"
  5. / {
  6. #address-cells = <1>;
  7. #size-cells = <1>;
  8. memory {
  9. reg = <0x00000000 0x04000000>,
  10. <0x08000000 0x04000000>;
  11. };
  12. L2: l2-cache {
  13. compatible = "arm,l210-cache";
  14. reg = <0x10210000 0x1000>;
  15. interrupt-parent = <&vica>;
  16. interrupts = <30>;
  17. cache-unified;
  18. cache-level = <2>;
  19. };
  20. mtu0 {
  21. /* Nomadik system timer */
  22. reg = <0x101e2000 0x1000>;
  23. interrupt-parent = <&vica>;
  24. interrupts = <4>;
  25. };
  26. mtu1 {
  27. /* Secondary timer */
  28. reg = <0x101e3000 0x1000>;
  29. interrupt-parent = <&vica>;
  30. interrupts = <5>;
  31. };
  32. gpio0: gpio@101e4000 {
  33. compatible = "st,nomadik-gpio";
  34. reg = <0x101e4000 0x80>;
  35. interrupt-parent = <&vica>;
  36. interrupts = <6>;
  37. interrupt-controller;
  38. #interrupt-cells = <2>;
  39. gpio-controller;
  40. #gpio-cells = <2>;
  41. gpio-bank = <0>;
  42. };
  43. gpio1: gpio@101e5000 {
  44. compatible = "st,nomadik-gpio";
  45. reg = <0x101e5000 0x80>;
  46. interrupt-parent = <&vica>;
  47. interrupts = <7>;
  48. interrupt-controller;
  49. #interrupt-cells = <2>;
  50. gpio-controller;
  51. #gpio-cells = <2>;
  52. gpio-bank = <1>;
  53. };
  54. gpio2: gpio@101e6000 {
  55. compatible = "st,nomadik-gpio";
  56. reg = <0x101e6000 0x80>;
  57. interrupt-parent = <&vica>;
  58. interrupts = <8>;
  59. interrupt-controller;
  60. #interrupt-cells = <2>;
  61. gpio-controller;
  62. #gpio-cells = <2>;
  63. gpio-bank = <2>;
  64. };
  65. gpio3: gpio@101e7000 {
  66. compatible = "st,nomadik-gpio";
  67. reg = <0x101e7000 0x80>;
  68. interrupt-parent = <&vica>;
  69. interrupts = <9>;
  70. interrupt-controller;
  71. #interrupt-cells = <2>;
  72. gpio-controller;
  73. #gpio-cells = <2>;
  74. gpio-bank = <3>;
  75. };
  76. pinctrl {
  77. compatible = "stericsson,nmk-pinctrl-stn8815";
  78. };
  79. /* A NAND flash of 128 MiB */
  80. fsmc: flash@40000000 {
  81. compatible = "stericsson,fsmc-nand";
  82. #address-cells = <1>;
  83. #size-cells = <1>;
  84. reg = <0x10100000 0x1000>, /* FSMC Register*/
  85. <0x40000000 0x2000>, /* NAND Base DATA */
  86. <0x41000000 0x2000>, /* NAND Base ADDR */
  87. <0x40800000 0x2000>; /* NAND Base CMD */
  88. reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
  89. status = "okay";
  90. partition@0 {
  91. label = "X-Loader(NAND)";
  92. reg = <0x0 0x40000>;
  93. };
  94. partition@40000 {
  95. label = "MemInit(NAND)";
  96. reg = <0x40000 0x40000>;
  97. };
  98. partition@80000 {
  99. label = "BootLoader(NAND)";
  100. reg = <0x80000 0x200000>;
  101. };
  102. partition@280000 {
  103. label = "Kernel zImage(NAND)";
  104. reg = <0x280000 0x300000>;
  105. };
  106. partition@580000 {
  107. label = "Root Filesystem(NAND)";
  108. reg = <0x580000 0x1600000>;
  109. };
  110. partition@1b80000 {
  111. label = "User Filesystem(NAND)";
  112. reg = <0x1b80000 0x6480000>;
  113. };
  114. };
  115. external-bus@34000000 {
  116. compatible = "simple-bus";
  117. reg = <0x34000000 0x1000000>;
  118. #address-cells = <1>;
  119. #size-cells = <1>;
  120. ranges = <0 0x34000000 0x1000000>;
  121. ethernet@300 {
  122. compatible = "smsc,lan91c111";
  123. reg = <0x300 0x0fd00>;
  124. };
  125. };
  126. /* I2C0 connected to the STw4811 power management chip */
  127. i2c0 {
  128. compatible = "i2c-gpio";
  129. gpios = <&gpio1 31 0>, /* sda */
  130. <&gpio1 30 0>; /* scl */
  131. #address-cells = <1>;
  132. #size-cells = <0>;
  133. stw4811@2d {
  134. compatible = "st,stw4811";
  135. reg = <0x2d>;
  136. };
  137. };
  138. /* I2C1 connected to various sensors */
  139. i2c1 {
  140. compatible = "i2c-gpio";
  141. gpios = <&gpio1 22 0>, /* sda */
  142. <&gpio1 21 0>; /* scl */
  143. #address-cells = <1>;
  144. #size-cells = <0>;
  145. camera@2d {
  146. compatible = "st,camera";
  147. reg = <0x10>;
  148. };
  149. stw5095@1a {
  150. compatible = "st,stw5095";
  151. reg = <0x1a>;
  152. };
  153. lis3lv02dl@1d {
  154. compatible = "st,lis3lv02dl";
  155. reg = <0x1d>;
  156. };
  157. };
  158. /* I2C2 connected to the USB portions of the STw4811 only */
  159. i2c2 {
  160. compatible = "i2c-gpio";
  161. gpios = <&gpio2 10 0>, /* sda */
  162. <&gpio2 9 0>; /* scl */
  163. #address-cells = <1>;
  164. #size-cells = <0>;
  165. stw4811@2d {
  166. compatible = "st,stw4811-usb";
  167. reg = <0x2d>;
  168. };
  169. };
  170. amba {
  171. compatible = "arm,amba-bus";
  172. #address-cells = <1>;
  173. #size-cells = <1>;
  174. ranges;
  175. vica: intc@0x10140000 {
  176. compatible = "arm,versatile-vic";
  177. interrupt-controller;
  178. #interrupt-cells = <1>;
  179. reg = <0x10140000 0x20>;
  180. };
  181. vicb: intc@0x10140020 {
  182. compatible = "arm,versatile-vic";
  183. interrupt-controller;
  184. #interrupt-cells = <1>;
  185. reg = <0x10140020 0x20>;
  186. };
  187. uart0: uart@101fd000 {
  188. compatible = "arm,pl011", "arm,primecell";
  189. reg = <0x101fd000 0x1000>;
  190. interrupt-parent = <&vica>;
  191. interrupts = <12>;
  192. };
  193. uart1: uart@101fb000 {
  194. compatible = "arm,pl011", "arm,primecell";
  195. reg = <0x101fb000 0x1000>;
  196. interrupt-parent = <&vica>;
  197. interrupts = <17>;
  198. };
  199. uart2: uart@101f2000 {
  200. compatible = "arm,pl011", "arm,primecell";
  201. reg = <0x101f2000 0x1000>;
  202. interrupt-parent = <&vica>;
  203. interrupts = <28>;
  204. status = "disabled";
  205. };
  206. rng: rng@101b0000 {
  207. compatible = "arm,primecell";
  208. reg = <0x101b0000 0x1000>;
  209. };
  210. rtc: rtc@101e8000 {
  211. compatible = "arm,pl031", "arm,primecell";
  212. reg = <0x101e8000 0x1000>;
  213. interrupt-parent = <&vica>;
  214. interrupts = <10>;
  215. };
  216. mmcsd: sdi@101f6000 {
  217. compatible = "arm,pl18x", "arm,primecell";
  218. reg = <0x101f6000 0x1000>;
  219. interrupt-parent = <&vica>;
  220. interrupts = <22>;
  221. max-frequency = <48000000>;
  222. bus-width = <4>;
  223. mmc-cap-mmc-highspeed;
  224. mmc-cap-sd-highspeed;
  225. cd-gpios = <&gpio3 15 0x1>;
  226. cd-inverted;
  227. };
  228. };
  229. };