da850.dtsi 2.9 KB

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  1. /*
  2. * Copyright 2012 DENX Software Engineering GmbH
  3. * Heiko Schocher <hs@denx.de>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License as published by the
  7. * Free Software Foundation; either version 2 of the License, or (at your
  8. * option) any later version.
  9. */
  10. /include/ "skeleton.dtsi"
  11. / {
  12. arm {
  13. #address-cells = <1>;
  14. #size-cells = <1>;
  15. ranges;
  16. intc: interrupt-controller {
  17. compatible = "ti,cp-intc";
  18. interrupt-controller;
  19. #interrupt-cells = <1>;
  20. ti,intc-size = <100>;
  21. reg = <0xfffee000 0x2000>;
  22. };
  23. };
  24. soc {
  25. compatible = "simple-bus";
  26. model = "da850";
  27. #address-cells = <1>;
  28. #size-cells = <1>;
  29. ranges = <0x0 0x01c00000 0x400000>;
  30. interrupt-parent = <&intc>;
  31. pmx_core: pinmux@1c14120 {
  32. compatible = "pinctrl-single";
  33. reg = <0x14120 0x50>;
  34. #address-cells = <1>;
  35. #size-cells = <0>;
  36. pinctrl-single,bit-per-mux;
  37. pinctrl-single,register-width = <32>;
  38. pinctrl-single,function-mask = <0xffffffff>;
  39. status = "disabled";
  40. nand_cs3_pins: pinmux_nand_pins {
  41. pinctrl-single,bits = <
  42. /* EMA_OE, EMA_WE */
  43. 0x1c 0x00110000 0x00ff0000
  44. /* EMA_CS[4],EMA_CS[3]*/
  45. 0x1c 0x00000110 0x00000ff0
  46. /*
  47. * EMA_D[0], EMA_D[1], EMA_D[2],
  48. * EMA_D[3], EMA_D[4], EMA_D[5],
  49. * EMA_D[6], EMA_D[7]
  50. */
  51. 0x24 0x11111111 0xffffffff
  52. /* EMA_A[1], EMA_A[2] */
  53. 0x30 0x01100000 0x0ff00000
  54. >;
  55. };
  56. i2c0_pins: pinmux_i2c0_pins {
  57. pinctrl-single,bits = <
  58. /* I2C0_SDA,I2C0_SCL */
  59. 0x10 0x00002200 0x0000ff00
  60. >;
  61. };
  62. };
  63. serial0: serial@1c42000 {
  64. compatible = "ns16550a";
  65. reg = <0x42000 0x100>;
  66. clock-frequency = <150000000>;
  67. reg-shift = <2>;
  68. interrupts = <25>;
  69. status = "disabled";
  70. };
  71. serial1: serial@1d0c000 {
  72. compatible = "ns16550a";
  73. reg = <0x10c000 0x100>;
  74. clock-frequency = <150000000>;
  75. reg-shift = <2>;
  76. interrupts = <53>;
  77. status = "disabled";
  78. };
  79. serial2: serial@1d0d000 {
  80. compatible = "ns16550a";
  81. reg = <0x10d000 0x100>;
  82. clock-frequency = <150000000>;
  83. reg-shift = <2>;
  84. interrupts = <61>;
  85. status = "disabled";
  86. };
  87. rtc0: rtc@1c23000 {
  88. compatible = "ti,da830-rtc";
  89. reg = <0x23000 0x1000>;
  90. interrupts = <19
  91. 19>;
  92. status = "disabled";
  93. };
  94. i2c0: i2c@1c22000 {
  95. compatible = "ti,davinci-i2c";
  96. reg = <0x22000 0x1000>;
  97. interrupts = <15>;
  98. #address-cells = <1>;
  99. #size-cells = <0>;
  100. status = "disabled";
  101. };
  102. wdt: wdt@1c21000 {
  103. compatible = "ti,davinci-wdt";
  104. reg = <0x21000 0x1000>;
  105. status = "disabled";
  106. };
  107. };
  108. nand_cs3@62000000 {
  109. compatible = "ti,davinci-nand";
  110. reg = <0x62000000 0x807ff
  111. 0x68000000 0x8000>;
  112. ti,davinci-chipselect = <1>;
  113. ti,davinci-mask-ale = <0>;
  114. ti,davinci-mask-cle = <0>;
  115. ti,davinci-mask-chipsel = <0>;
  116. ti,davinci-ecc-mode = "hw";
  117. ti,davinci-ecc-bits = <4>;
  118. ti,davinci-nand-use-bbt;
  119. status = "disabled";
  120. };
  121. };