armada-xp-mv78460.dtsi 2.3 KB

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  1. /*
  2. * Device Tree Include file for Marvell Armada XP family SoC
  3. *
  4. * Copyright (C) 2012 Marvell
  5. *
  6. * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  7. *
  8. * This file is licensed under the terms of the GNU General Public
  9. * License version 2. This program is licensed "as is" without any
  10. * warranty of any kind, whether express or implied.
  11. *
  12. * Contains definitions specific to the Armada XP MV78460 SoC that are not
  13. * common to all Armada XP SoCs.
  14. */
  15. /include/ "armada-xp.dtsi"
  16. / {
  17. model = "Marvell Armada XP MV78460 SoC";
  18. compatible = "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";
  19. aliases {
  20. gpio0 = &gpio0;
  21. gpio1 = &gpio1;
  22. gpio2 = &gpio2;
  23. };
  24. cpus {
  25. #address-cells = <1>;
  26. #size-cells = <0>;
  27. cpu@0 {
  28. device_type = "cpu";
  29. compatible = "marvell,sheeva-v7";
  30. reg = <0>;
  31. clocks = <&cpuclk 0>;
  32. };
  33. cpu@1 {
  34. device_type = "cpu";
  35. compatible = "marvell,sheeva-v7";
  36. reg = <1>;
  37. clocks = <&cpuclk 1>;
  38. };
  39. cpu@2 {
  40. device_type = "cpu";
  41. compatible = "marvell,sheeva-v7";
  42. reg = <2>;
  43. clocks = <&cpuclk 2>;
  44. };
  45. cpu@3 {
  46. device_type = "cpu";
  47. compatible = "marvell,sheeva-v7";
  48. reg = <3>;
  49. clocks = <&cpuclk 3>;
  50. };
  51. };
  52. soc {
  53. pinctrl {
  54. compatible = "marvell,mv78460-pinctrl";
  55. reg = <0xd0018000 0x38>;
  56. sdio_pins: sdio-pins {
  57. marvell,pins = "mpp30", "mpp31", "mpp32",
  58. "mpp33", "mpp34", "mpp35";
  59. marvell,function = "sd0";
  60. };
  61. };
  62. gpio0: gpio@d0018100 {
  63. compatible = "marvell,orion-gpio";
  64. reg = <0xd0018100 0x40>;
  65. ngpios = <32>;
  66. gpio-controller;
  67. #gpio-cells = <2>;
  68. interrupt-controller;
  69. #interrupts-cells = <2>;
  70. interrupts = <82>, <83>, <84>, <85>;
  71. };
  72. gpio1: gpio@d0018140 {
  73. compatible = "marvell,orion-gpio";
  74. reg = <0xd0018140 0x40>;
  75. ngpios = <32>;
  76. gpio-controller;
  77. #gpio-cells = <2>;
  78. interrupt-controller;
  79. #interrupts-cells = <2>;
  80. interrupts = <87>, <88>, <89>, <90>;
  81. };
  82. gpio2: gpio@d0018180 {
  83. compatible = "marvell,orion-gpio";
  84. reg = <0xd0018180 0x40>;
  85. ngpios = <3>;
  86. gpio-controller;
  87. #gpio-cells = <2>;
  88. interrupt-controller;
  89. #interrupts-cells = <2>;
  90. interrupts = <91>;
  91. };
  92. ethernet@d0034000 {
  93. compatible = "marvell,armada-370-neta";
  94. reg = <0xd0034000 0x2500>;
  95. interrupts = <14>;
  96. clocks = <&gateclk 1>;
  97. status = "disabled";
  98. };
  99. };
  100. };