locking.txt 5.0 KB

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  1. KVM Lock Overview
  2. =================
  3. 1. Acquisition Orders
  4. ---------------------
  5. (to be written)
  6. 2: Exception
  7. ------------
  8. Fast page fault:
  9. Fast page fault is the fast path which fixes the guest page fault out of
  10. the mmu-lock on x86. Currently, the page fault can be fast only if the
  11. shadow page table is present and it is caused by write-protect, that means
  12. we just need change the W bit of the spte.
  13. What we use to avoid all the race is the SPTE_HOST_WRITEABLE bit and
  14. SPTE_MMU_WRITEABLE bit on the spte:
  15. - SPTE_HOST_WRITEABLE means the gfn is writable on host.
  16. - SPTE_MMU_WRITEABLE means the gfn is writable on mmu. The bit is set when
  17. the gfn is writable on guest mmu and it is not write-protected by shadow
  18. page write-protection.
  19. On fast page fault path, we will use cmpxchg to atomically set the spte W
  20. bit if spte.SPTE_HOST_WRITEABLE = 1 and spte.SPTE_WRITE_PROTECT = 1, this
  21. is safe because whenever changing these bits can be detected by cmpxchg.
  22. But we need carefully check these cases:
  23. 1): The mapping from gfn to pfn
  24. The mapping from gfn to pfn may be changed since we can only ensure the pfn
  25. is not changed during cmpxchg. This is a ABA problem, for example, below case
  26. will happen:
  27. At the beginning:
  28. gpte = gfn1
  29. gfn1 is mapped to pfn1 on host
  30. spte is the shadow page table entry corresponding with gpte and
  31. spte = pfn1
  32. VCPU 0 VCPU0
  33. on fast page fault path:
  34. old_spte = *spte;
  35. pfn1 is swapped out:
  36. spte = 0;
  37. pfn1 is re-alloced for gfn2.
  38. gpte is changed to point to
  39. gfn2 by the guest:
  40. spte = pfn1;
  41. if (cmpxchg(spte, old_spte, old_spte+W)
  42. mark_page_dirty(vcpu->kvm, gfn1)
  43. OOPS!!!
  44. We dirty-log for gfn1, that means gfn2 is lost in dirty-bitmap.
  45. For direct sp, we can easily avoid it since the spte of direct sp is fixed
  46. to gfn. For indirect sp, before we do cmpxchg, we call gfn_to_pfn_atomic()
  47. to pin gfn to pfn, because after gfn_to_pfn_atomic():
  48. - We have held the refcount of pfn that means the pfn can not be freed and
  49. be reused for another gfn.
  50. - The pfn is writable that means it can not be shared between different gfns
  51. by KSM.
  52. Then, we can ensure the dirty bitmaps is correctly set for a gfn.
  53. Currently, to simplify the whole things, we disable fast page fault for
  54. indirect shadow page.
  55. 2): Dirty bit tracking
  56. In the origin code, the spte can be fast updated (non-atomically) if the
  57. spte is read-only and the Accessed bit has already been set since the
  58. Accessed bit and Dirty bit can not be lost.
  59. But it is not true after fast page fault since the spte can be marked
  60. writable between reading spte and updating spte. Like below case:
  61. At the beginning:
  62. spte.W = 0
  63. spte.Accessed = 1
  64. VCPU 0 VCPU0
  65. In mmu_spte_clear_track_bits():
  66. old_spte = *spte;
  67. /* 'if' condition is satisfied. */
  68. if (old_spte.Accssed == 1 &&
  69. old_spte.W == 0)
  70. spte = 0ull;
  71. on fast page fault path:
  72. spte.W = 1
  73. memory write on the spte:
  74. spte.Dirty = 1
  75. else
  76. old_spte = xchg(spte, 0ull)
  77. if (old_spte.Accssed == 1)
  78. kvm_set_pfn_accessed(spte.pfn);
  79. if (old_spte.Dirty == 1)
  80. kvm_set_pfn_dirty(spte.pfn);
  81. OOPS!!!
  82. The Dirty bit is lost in this case.
  83. In order to avoid this kind of issue, we always treat the spte as "volatile"
  84. if it can be updated out of mmu-lock, see spte_has_volatile_bits(), it means,
  85. the spte is always atomicly updated in this case.
  86. 3): flush tlbs due to spte updated
  87. If the spte is updated from writable to readonly, we should flush all TLBs,
  88. otherwise rmap_write_protect will find a read-only spte, even though the
  89. writable spte might be cached on a CPU's TLB.
  90. As mentioned before, the spte can be updated to writable out of mmu-lock on
  91. fast page fault path, in order to easily audit the path, we see if TLBs need
  92. be flushed caused by this reason in mmu_spte_update() since this is a common
  93. function to update spte (present -> present).
  94. Since the spte is "volatile" if it can be updated out of mmu-lock, we always
  95. atomicly update the spte, the race caused by fast page fault can be avoided,
  96. See the comments in spte_has_volatile_bits() and mmu_spte_update().
  97. 3. Reference
  98. ------------
  99. Name: kvm_lock
  100. Type: raw_spinlock
  101. Arch: any
  102. Protects: - vm_list
  103. - hardware virtualization enable/disable
  104. Comment: 'raw' because hardware enabling/disabling must be atomic /wrt
  105. migration.
  106. Name: kvm_arch::tsc_write_lock
  107. Type: raw_spinlock
  108. Arch: x86
  109. Protects: - kvm_arch::{last_tsc_write,last_tsc_nsec,last_tsc_offset}
  110. - tsc offset in vmcb
  111. Comment: 'raw' because updating the tsc offsets must not be preempted.
  112. Name: kvm->mmu_lock
  113. Type: spinlock_t
  114. Arch: any
  115. Protects: -shadow page/shadow tlb entry
  116. Comment: it is a spinlock since it is used in mmu notifier.