exynos_dp.txt 2.1 KB

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  1. The Exynos display port interface should be configured based on
  2. the type of panel connected to it.
  3. We use two nodes:
  4. -dp-controller node
  5. -dptx-phy node(defined inside dp-controller node)
  6. For the DP-PHY initialization, we use the dptx-phy node.
  7. Required properties for dptx-phy:
  8. -reg:
  9. Base address of DP PHY register.
  10. -samsung,enable-mask:
  11. The bit-mask used to enable/disable DP PHY.
  12. For the Panel initialization, we read data from dp-controller node.
  13. Required properties for dp-controller:
  14. -compatible:
  15. should be "samsung,exynos5-dp".
  16. -reg:
  17. physical base address of the controller and length
  18. of memory mapped region.
  19. -interrupts:
  20. interrupt combiner values.
  21. -interrupt-parent:
  22. phandle to Interrupt combiner node.
  23. -samsung,color-space:
  24. input video data format.
  25. COLOR_RGB = 0, COLOR_YCBCR422 = 1, COLOR_YCBCR444 = 2
  26. -samsung,dynamic-range:
  27. dynamic range for input video data.
  28. VESA = 0, CEA = 1
  29. -samsung,ycbcr-coeff:
  30. YCbCr co-efficients for input video.
  31. COLOR_YCBCR601 = 0, COLOR_YCBCR709 = 1
  32. -samsung,color-depth:
  33. number of bits per colour component.
  34. COLOR_6 = 0, COLOR_8 = 1, COLOR_10 = 2, COLOR_12 = 3
  35. -samsung,link-rate:
  36. link rate supported by the panel.
  37. LINK_RATE_1_62GBPS = 0x6, LINK_RATE_2_70GBPS = 0x0A
  38. -samsung,lane-count:
  39. number of lanes supported by the panel.
  40. LANE_COUNT1 = 1, LANE_COUNT2 = 2, LANE_COUNT4 = 4
  41. Optional properties for dp-controller:
  42. -interlaced:
  43. interlace scan mode.
  44. Progressive if defined, Interlaced if not defined
  45. -vsync-active-high:
  46. VSYNC polarity configuration.
  47. High if defined, Low if not defined
  48. -hsync-active-high:
  49. HSYNC polarity configuration.
  50. High if defined, Low if not defined
  51. Example:
  52. SOC specific portion:
  53. dp-controller {
  54. compatible = "samsung,exynos5-dp";
  55. reg = <0x145b0000 0x10000>;
  56. interrupts = <10 3>;
  57. interrupt-parent = <&combiner>;
  58. dptx-phy {
  59. reg = <0x10040720>;
  60. samsung,enable-mask = <1>;
  61. };
  62. };
  63. Board Specific portion:
  64. dp-controller {
  65. samsung,color-space = <0>;
  66. samsung,dynamic-range = <0>;
  67. samsung,ycbcr-coeff = <0>;
  68. samsung,color-depth = <1>;
  69. samsung,link-rate = <0x0a>;
  70. samsung,lane-count = <4>;
  71. };