nvidia,tegra30-timer.txt 732 B

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  1. NVIDIA Tegra30 timer
  2. The Tegra30 timer provides ten 29-bit timer channels, a single 32-bit free
  3. running counter, and 5 watchdog modules. The first two channels may also
  4. trigger a legacy watchdog reset.
  5. Required properties:
  6. - compatible : should be "nvidia,tegra30-timer", "nvidia,tegra20-timer".
  7. - reg : Specifies base physical address and size of the registers.
  8. - interrupts : A list of 6 interrupts; one per each of timer channels 1
  9. through 5, and one for the shared interrupt for the remaining channels.
  10. timer {
  11. compatible = "nvidia,tegra30-timer", "nvidia,tegra20-timer";
  12. reg = <0x60005000 0x400>;
  13. interrupts = <0 0 0x04
  14. 0 1 0x04
  15. 0 41 0x04
  16. 0 42 0x04
  17. 0 121 0x04
  18. 0 122 0x04>;
  19. };