allwinner,sunxi-ic.txt 1.4 KB

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  1. Allwinner Sunxi Interrupt Controller
  2. Required properties:
  3. - compatible : should be "allwinner,sunxi-ic"
  4. - reg : Specifies base physical address and size of the registers.
  5. - interrupt-controller : Identifies the node as an interrupt controller
  6. - #interrupt-cells : Specifies the number of cells needed to encode an
  7. interrupt source. The value shall be 1.
  8. The interrupt sources are as follows:
  9. 0: ENMI
  10. 1: UART0
  11. 2: UART1
  12. 3: UART2
  13. 4: UART3
  14. 5: IR0
  15. 6: IR1
  16. 7: I2C0
  17. 8: I2C1
  18. 9: I2C2
  19. 10: SPI0
  20. 11: SPI1
  21. 12: SPI2
  22. 13: SPDIF
  23. 14: AC97
  24. 15: TS
  25. 16: I2S
  26. 17: UART4
  27. 18: UART5
  28. 19: UART6
  29. 20: UART7
  30. 21: KEYPAD
  31. 22: TIMER0
  32. 23: TIMER1
  33. 24: TIMER2
  34. 25: TIMER3
  35. 26: CAN
  36. 27: DMA
  37. 28: PIO
  38. 29: TOUCH_PANEL
  39. 30: AUDIO_CODEC
  40. 31: LRADC
  41. 32: SDMC0
  42. 33: SDMC1
  43. 34: SDMC2
  44. 35: SDMC3
  45. 36: MEMSTICK
  46. 37: NAND
  47. 38: USB0
  48. 39: USB1
  49. 40: USB2
  50. 41: SCR
  51. 42: CSI0
  52. 43: CSI1
  53. 44: LCDCTRL0
  54. 45: LCDCTRL1
  55. 46: MP
  56. 47: DEFEBE0
  57. 48: DEFEBE1
  58. 49: PMU
  59. 50: SPI3
  60. 51: TZASC
  61. 52: PATA
  62. 53: VE
  63. 54: SS
  64. 55: EMAC
  65. 56: SATA
  66. 57: GPS
  67. 58: HDMI
  68. 59: TVE
  69. 60: ACE
  70. 61: TVD
  71. 62: PS2_0
  72. 63: PS2_1
  73. 64: USB3
  74. 65: USB4
  75. 66: PLE_PFM
  76. 67: TIMER4
  77. 68: TIMER5
  78. 69: GPU_GP
  79. 70: GPU_GPMMU
  80. 71: GPU_PP0
  81. 72: GPU_PPMMU0
  82. 73: GPU_PMU
  83. 74: GPU_RSV0
  84. 75: GPU_RSV1
  85. 76: GPU_RSV2
  86. 77: GPU_RSV3
  87. 78: GPU_RSV4
  88. 79: GPU_RSV5
  89. 80: GPU_RSV6
  90. 82: SYNC_TIMER0
  91. 83: SYNC_TIMER1
  92. Example:
  93. intc: interrupt-controller {
  94. compatible = "allwinner,sunxi-ic";
  95. reg = <0x01c20400 0x400>;
  96. interrupt-controller;
  97. #interrupt-cells = <2>;
  98. };