mrvl-gpio.txt 1.6 KB

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  1. * Marvell PXA GPIO controller
  2. Required properties:
  3. - compatible : Should be "mrvl,pxa-gpio" or "mrvl,mmp-gpio"
  4. - reg : Address and length of the register set for the device
  5. - interrupts : Should be the port interrupt shared by all gpio pins.
  6. There're three gpio interrupts in arch-pxa, and they're gpio0,
  7. gpio1 and gpio_mux. There're only one gpio interrupt in arch-mmp,
  8. gpio_mux.
  9. - interrupt-name : Should be the name of irq resource. Each interrupt
  10. binds its interrupt-name.
  11. - interrupt-controller : Identifies the node as an interrupt controller.
  12. - #interrupt-cells: Specifies the number of cells needed to encode an
  13. interrupt source.
  14. - gpio-controller : Marks the device node as a gpio controller.
  15. - #gpio-cells : Should be one. It is the pin number.
  16. Example:
  17. gpio: gpio@d4019000 {
  18. compatible = "mrvl,mmp-gpio";
  19. reg = <0xd4019000 0x1000>;
  20. interrupts = <49>;
  21. interrupt-name = "gpio_mux";
  22. gpio-controller;
  23. #gpio-cells = <1>;
  24. interrupt-controller;
  25. #interrupt-cells = <1>;
  26. };
  27. * Marvell Orion GPIO Controller
  28. Required properties:
  29. - compatible : Should be "marvell,orion-gpio"
  30. - reg : Address and length of the register set for controller.
  31. - gpio-controller : So we know this is a gpio controller.
  32. - ngpio : How many gpios this controller has.
  33. - interrupts : Up to 4 Interrupts for the controller.
  34. Optional properties:
  35. - mask-offset : For SMP Orions, offset for Nth CPU
  36. Example:
  37. gpio0: gpio@10100 {
  38. compatible = "marvell,orion-gpio";
  39. #gpio-cells = <2>;
  40. gpio-controller;
  41. reg = <0x10100 0x40>;
  42. ngpio = <32>;
  43. interrupts = <35>, <36>, <37>, <38>;
  44. };