mmp-dma.txt 2.1 KB

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  1. * MARVELL MMP DMA controller
  2. Marvell Peripheral DMA Controller
  3. Used platfroms: pxa688, pxa910, pxa3xx, etc
  4. Required properties:
  5. - compatible: Should be "marvell,pdma-1.0"
  6. - reg: Should contain DMA registers location and length.
  7. - interrupts: Either contain all of the per-channel DMA interrupts
  8. or one irq for pdma device
  9. - #dma-channels: Number of DMA channels supported by the controller.
  10. "marvell,pdma-1.0"
  11. Used platfroms: pxa25x, pxa27x, pxa3xx, pxa93x, pxa168, pxa910, pxa688.
  12. Examples:
  13. /*
  14. * Each channel has specific irq
  15. * ICU parse out irq channel from ICU register,
  16. * while DMA controller may not able to distinguish the irq channel
  17. * Using this method, interrupt-parent is required as demuxer
  18. * For example, pxa688 icu register 0x128, bit 0~15 is PDMA channel irq,
  19. * 18~21 is ADMA irq
  20. */
  21. pdma: dma-controller@d4000000 {
  22. compatible = "marvell,pdma-1.0";
  23. reg = <0xd4000000 0x10000>;
  24. interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
  25. interrupt-parent = <&intcmux32>;
  26. #dma-channels = <16>;
  27. };
  28. /*
  29. * One irq for all channels
  30. * Dmaengine driver (DMA controller) distinguish irq channel via
  31. * parsing internal register
  32. */
  33. pdma: dma-controller@d4000000 {
  34. compatible = "marvell,pdma-1.0";
  35. reg = <0xd4000000 0x10000>;
  36. interrupts = <47>;
  37. #dma-channels = <16>;
  38. };
  39. Marvell Two Channel DMA Controller used specifically for audio
  40. Used platfroms: pxa688, pxa910
  41. Required properties:
  42. - compatible: Should be "marvell,adma-1.0" or "marvell,pxa910-squ"
  43. - reg: Should contain DMA registers location and length.
  44. - interrupts: Either contain all of the per-channel DMA interrupts
  45. or one irq for dma device
  46. "marvell,adma-1.0" used on pxa688
  47. "marvell,pxa910-squ" used on pxa910
  48. Examples:
  49. /* each channel has specific irq */
  50. adma0: dma-controller@d42a0800 {
  51. compatible = "marvell,adma-1.0";
  52. reg = <0xd42a0800 0x100>;
  53. interrupts = <18 19>;
  54. interrupt-parent = <&intcmux32>;
  55. };
  56. /* One irq for all channels */
  57. squ: dma-controller@d42a0800 {
  58. compatible = "marvell,pxa910-squ";
  59. reg = <0xd42a0800 0x100>;
  60. interrupts = <46>;
  61. };