timer.txt 1.0 KB

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  1. OMAP Timer bindings
  2. Required properties:
  3. - compatible: Must be "ti,omap2-timer" for OMAP2+ controllers.
  4. - reg: Contains timer register address range (base address and
  5. length).
  6. - interrupts: Contains the interrupt information for the timer. The
  7. format is being dependent on which interrupt controller
  8. the OMAP device uses.
  9. - ti,hwmods: Name of the hwmod associated to the timer, "timer<X>",
  10. where <X> is the instance number of the timer from the
  11. HW spec.
  12. Optional properties:
  13. - ti,timer-alwon: Indicates the timer is in an alway-on power domain.
  14. - ti,timer-dsp: Indicates the timer can interrupt the on-chip DSP in
  15. addition to the ARM CPU.
  16. - ti,timer-pwm: Indicates the timer can generate a PWM output.
  17. - ti,timer-secure: Indicates the timer is reserved on a secure OMAP device
  18. and therefore cannot be used by the kernel.
  19. Example:
  20. timer12: timer@48304000 {
  21. compatible = "ti,omap2-timer";
  22. reg = <0x48304000 0x400>;
  23. interrupts = <95>;
  24. ti,hwmods = "timer12"
  25. ti,timer-alwon;
  26. ti,timer-secure;
  27. };