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- OMAP Timer bindings
- Required properties:
- - compatible: Must be "ti,omap2-timer" for OMAP2+ controllers.
- - reg: Contains timer register address range (base address and
- length).
- - interrupts: Contains the interrupt information for the timer. The
- format is being dependent on which interrupt controller
- the OMAP device uses.
- - ti,hwmods: Name of the hwmod associated to the timer, "timer<X>",
- where <X> is the instance number of the timer from the
- HW spec.
- Optional properties:
- - ti,timer-alwon: Indicates the timer is in an alway-on power domain.
- - ti,timer-dsp: Indicates the timer can interrupt the on-chip DSP in
- addition to the ARM CPU.
- - ti,timer-pwm: Indicates the timer can generate a PWM output.
- - ti,timer-secure: Indicates the timer is reserved on a secure OMAP device
- and therefore cannot be used by the kernel.
- Example:
- timer12: timer@48304000 {
- compatible = "ti,omap2-timer";
- reg = <0x48304000 0x400>;
- interrupts = <95>;
- ti,hwmods = "timer12"
- ti,timer-alwon;
- ti,timer-secure;
- };
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