atmel-at91.txt 2.8 KB

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  1. Atmel AT91 device tree bindings.
  2. ================================
  3. PIT Timer required properties:
  4. - compatible: Should be "atmel,at91sam9260-pit"
  5. - reg: Should contain registers location and length
  6. - interrupts: Should contain interrupt for the PIT which is the IRQ line
  7. shared across all System Controller members.
  8. System Timer (ST) required properties:
  9. - compatible: Should be "atmel,at91rm9200-st"
  10. - reg: Should contain registers location and length
  11. - interrupts: Should contain interrupt for the ST which is the IRQ line
  12. shared across all System Controller members.
  13. TC/TCLIB Timer required properties:
  14. - compatible: Should be "atmel,<chip>-tcb".
  15. <chip> can be "at91rm9200" or "at91sam9x5"
  16. - reg: Should contain registers location and length
  17. - interrupts: Should contain all interrupts for the TC block
  18. Note that you can specify several interrupt cells if the TC
  19. block has one interrupt per channel.
  20. Examples:
  21. One interrupt per TC block:
  22. tcb0: timer@fff7c000 {
  23. compatible = "atmel,at91rm9200-tcb";
  24. reg = <0xfff7c000 0x100>;
  25. interrupts = <18 4>;
  26. };
  27. One interrupt per TC channel in a TC block:
  28. tcb1: timer@fffdc000 {
  29. compatible = "atmel,at91rm9200-tcb";
  30. reg = <0xfffdc000 0x100>;
  31. interrupts = <26 4 27 4 28 4>;
  32. };
  33. RSTC Reset Controller required properties:
  34. - compatible: Should be "atmel,<chip>-rstc".
  35. <chip> can be "at91sam9260" or "at91sam9g45"
  36. - reg: Should contain registers location and length
  37. Example:
  38. rstc@fffffd00 {
  39. compatible = "atmel,at91sam9260-rstc";
  40. reg = <0xfffffd00 0x10>;
  41. };
  42. RAMC SDRAM/DDR Controller required properties:
  43. - compatible: Should be "atmel,at91sam9260-sdramc",
  44. "atmel,at91sam9g45-ddramc",
  45. - reg: Should contain registers location and length
  46. For at91sam9263 and at91sam9g45 you must specify 2 entries.
  47. Examples:
  48. ramc0: ramc@ffffe800 {
  49. compatible = "atmel,at91sam9g45-ddramc";
  50. reg = <0xffffe800 0x200>;
  51. };
  52. ramc0: ramc@ffffe400 {
  53. compatible = "atmel,at91sam9g45-ddramc";
  54. reg = <0xffffe400 0x200
  55. 0xffffe600 0x200>;
  56. };
  57. SHDWC Shutdown Controller
  58. required properties:
  59. - compatible: Should be "atmel,<chip>-shdwc".
  60. <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".
  61. - reg: Should contain registers location and length
  62. optional properties:
  63. - atmel,wakeup-mode: String, operation mode of the wakeup mode.
  64. Supported values are: "none", "high", "low", "any".
  65. - atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).
  66. optional at91sam9260 properties:
  67. - atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
  68. optional at91sam9rl properties:
  69. - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
  70. - atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
  71. optional at91sam9x5 properties:
  72. - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
  73. Example:
  74. rstc@fffffd00 {
  75. compatible = "atmel,at91sam9260-rstc";
  76. reg = <0xfffffd00 0x10>;
  77. };