cx88-video.c 57 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * video4linux video interface
  5. *
  6. * (c) 2003-04 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  7. *
  8. * (c) 2005-2006 Mauro Carvalho Chehab <mchehab@infradead.org>
  9. * - Multituner support
  10. * - video_ioctl2 conversion
  11. * - PAL/M fixes
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License as published by
  15. * the Free Software Foundation; either version 2 of the License, or
  16. * (at your option) any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  26. */
  27. #include <linux/init.h>
  28. #include <linux/list.h>
  29. #include <linux/module.h>
  30. #include <linux/kmod.h>
  31. #include <linux/kernel.h>
  32. #include <linux/slab.h>
  33. #include <linux/interrupt.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/kthread.h>
  37. #include <asm/div64.h>
  38. #include "cx88.h"
  39. #include <media/v4l2-common.h>
  40. #include <media/v4l2-ioctl.h>
  41. #include <media/wm8775.h>
  42. MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards");
  43. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  44. MODULE_LICENSE("GPL");
  45. MODULE_VERSION(CX88_VERSION);
  46. /* ------------------------------------------------------------------ */
  47. static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
  48. static unsigned int vbi_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
  49. static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
  50. module_param_array(video_nr, int, NULL, 0444);
  51. module_param_array(vbi_nr, int, NULL, 0444);
  52. module_param_array(radio_nr, int, NULL, 0444);
  53. MODULE_PARM_DESC(video_nr,"video device numbers");
  54. MODULE_PARM_DESC(vbi_nr,"vbi device numbers");
  55. MODULE_PARM_DESC(radio_nr,"radio device numbers");
  56. static unsigned int video_debug;
  57. module_param(video_debug,int,0644);
  58. MODULE_PARM_DESC(video_debug,"enable debug messages [video]");
  59. static unsigned int irq_debug;
  60. module_param(irq_debug,int,0644);
  61. MODULE_PARM_DESC(irq_debug,"enable debug messages [IRQ handler]");
  62. static unsigned int vid_limit = 16;
  63. module_param(vid_limit,int,0644);
  64. MODULE_PARM_DESC(vid_limit,"capture memory limit in megabytes");
  65. #define dprintk(level,fmt, arg...) if (video_debug >= level) \
  66. printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
  67. /* ------------------------------------------------------------------- */
  68. /* static data */
  69. static const struct cx8800_fmt formats[] = {
  70. {
  71. .name = "8 bpp, gray",
  72. .fourcc = V4L2_PIX_FMT_GREY,
  73. .cxformat = ColorFormatY8,
  74. .depth = 8,
  75. .flags = FORMAT_FLAGS_PACKED,
  76. },{
  77. .name = "15 bpp RGB, le",
  78. .fourcc = V4L2_PIX_FMT_RGB555,
  79. .cxformat = ColorFormatRGB15,
  80. .depth = 16,
  81. .flags = FORMAT_FLAGS_PACKED,
  82. },{
  83. .name = "15 bpp RGB, be",
  84. .fourcc = V4L2_PIX_FMT_RGB555X,
  85. .cxformat = ColorFormatRGB15 | ColorFormatBSWAP,
  86. .depth = 16,
  87. .flags = FORMAT_FLAGS_PACKED,
  88. },{
  89. .name = "16 bpp RGB, le",
  90. .fourcc = V4L2_PIX_FMT_RGB565,
  91. .cxformat = ColorFormatRGB16,
  92. .depth = 16,
  93. .flags = FORMAT_FLAGS_PACKED,
  94. },{
  95. .name = "16 bpp RGB, be",
  96. .fourcc = V4L2_PIX_FMT_RGB565X,
  97. .cxformat = ColorFormatRGB16 | ColorFormatBSWAP,
  98. .depth = 16,
  99. .flags = FORMAT_FLAGS_PACKED,
  100. },{
  101. .name = "24 bpp RGB, le",
  102. .fourcc = V4L2_PIX_FMT_BGR24,
  103. .cxformat = ColorFormatRGB24,
  104. .depth = 24,
  105. .flags = FORMAT_FLAGS_PACKED,
  106. },{
  107. .name = "32 bpp RGB, le",
  108. .fourcc = V4L2_PIX_FMT_BGR32,
  109. .cxformat = ColorFormatRGB32,
  110. .depth = 32,
  111. .flags = FORMAT_FLAGS_PACKED,
  112. },{
  113. .name = "32 bpp RGB, be",
  114. .fourcc = V4L2_PIX_FMT_RGB32,
  115. .cxformat = ColorFormatRGB32 | ColorFormatBSWAP | ColorFormatWSWAP,
  116. .depth = 32,
  117. .flags = FORMAT_FLAGS_PACKED,
  118. },{
  119. .name = "4:2:2, packed, YUYV",
  120. .fourcc = V4L2_PIX_FMT_YUYV,
  121. .cxformat = ColorFormatYUY2,
  122. .depth = 16,
  123. .flags = FORMAT_FLAGS_PACKED,
  124. },{
  125. .name = "4:2:2, packed, UYVY",
  126. .fourcc = V4L2_PIX_FMT_UYVY,
  127. .cxformat = ColorFormatYUY2 | ColorFormatBSWAP,
  128. .depth = 16,
  129. .flags = FORMAT_FLAGS_PACKED,
  130. },
  131. };
  132. static const struct cx8800_fmt* format_by_fourcc(unsigned int fourcc)
  133. {
  134. unsigned int i;
  135. for (i = 0; i < ARRAY_SIZE(formats); i++)
  136. if (formats[i].fourcc == fourcc)
  137. return formats+i;
  138. return NULL;
  139. }
  140. /* ------------------------------------------------------------------- */
  141. static const struct v4l2_queryctrl no_ctl = {
  142. .name = "42",
  143. .flags = V4L2_CTRL_FLAG_DISABLED,
  144. };
  145. static const struct cx88_ctrl cx8800_ctls[] = {
  146. /* --- video --- */
  147. {
  148. .v = {
  149. .id = V4L2_CID_BRIGHTNESS,
  150. .name = "Brightness",
  151. .minimum = 0x00,
  152. .maximum = 0xff,
  153. .step = 1,
  154. .default_value = 0x7f,
  155. .type = V4L2_CTRL_TYPE_INTEGER,
  156. },
  157. .off = 128,
  158. .reg = MO_CONTR_BRIGHT,
  159. .mask = 0x00ff,
  160. .shift = 0,
  161. },{
  162. .v = {
  163. .id = V4L2_CID_CONTRAST,
  164. .name = "Contrast",
  165. .minimum = 0,
  166. .maximum = 0xff,
  167. .step = 1,
  168. .default_value = 0x3f,
  169. .type = V4L2_CTRL_TYPE_INTEGER,
  170. },
  171. .off = 0,
  172. .reg = MO_CONTR_BRIGHT,
  173. .mask = 0xff00,
  174. .shift = 8,
  175. },{
  176. .v = {
  177. .id = V4L2_CID_HUE,
  178. .name = "Hue",
  179. .minimum = 0,
  180. .maximum = 0xff,
  181. .step = 1,
  182. .default_value = 0x7f,
  183. .type = V4L2_CTRL_TYPE_INTEGER,
  184. },
  185. .off = 128,
  186. .reg = MO_HUE,
  187. .mask = 0x00ff,
  188. .shift = 0,
  189. },{
  190. /* strictly, this only describes only U saturation.
  191. * V saturation is handled specially through code.
  192. */
  193. .v = {
  194. .id = V4L2_CID_SATURATION,
  195. .name = "Saturation",
  196. .minimum = 0,
  197. .maximum = 0xff,
  198. .step = 1,
  199. .default_value = 0x7f,
  200. .type = V4L2_CTRL_TYPE_INTEGER,
  201. },
  202. .off = 0,
  203. .reg = MO_UV_SATURATION,
  204. .mask = 0x00ff,
  205. .shift = 0,
  206. }, {
  207. .v = {
  208. .id = V4L2_CID_SHARPNESS,
  209. .name = "Sharpness",
  210. .minimum = 0,
  211. .maximum = 4,
  212. .step = 1,
  213. .default_value = 0x0,
  214. .type = V4L2_CTRL_TYPE_INTEGER,
  215. },
  216. .off = 0,
  217. /* NOTE: the value is converted and written to both even
  218. and odd registers in the code */
  219. .reg = MO_FILTER_ODD,
  220. .mask = 7 << 7,
  221. .shift = 7,
  222. }, {
  223. .v = {
  224. .id = V4L2_CID_CHROMA_AGC,
  225. .name = "Chroma AGC",
  226. .minimum = 0,
  227. .maximum = 1,
  228. .default_value = 0x1,
  229. .type = V4L2_CTRL_TYPE_BOOLEAN,
  230. },
  231. .reg = MO_INPUT_FORMAT,
  232. .mask = 1 << 10,
  233. .shift = 10,
  234. }, {
  235. .v = {
  236. .id = V4L2_CID_COLOR_KILLER,
  237. .name = "Color killer",
  238. .minimum = 0,
  239. .maximum = 1,
  240. .default_value = 0x1,
  241. .type = V4L2_CTRL_TYPE_BOOLEAN,
  242. },
  243. .reg = MO_INPUT_FORMAT,
  244. .mask = 1 << 9,
  245. .shift = 9,
  246. }, {
  247. .v = {
  248. .id = V4L2_CID_BAND_STOP_FILTER,
  249. .name = "Notch filter",
  250. .minimum = 0,
  251. .maximum = 3,
  252. .step = 1,
  253. .default_value = 0x0,
  254. .type = V4L2_CTRL_TYPE_INTEGER,
  255. },
  256. .off = 0,
  257. .reg = MO_HTOTAL,
  258. .mask = 3 << 11,
  259. .shift = 11,
  260. }, {
  261. /* --- audio --- */
  262. .v = {
  263. .id = V4L2_CID_AUDIO_MUTE,
  264. .name = "Mute",
  265. .minimum = 0,
  266. .maximum = 1,
  267. .default_value = 1,
  268. .type = V4L2_CTRL_TYPE_BOOLEAN,
  269. },
  270. .reg = AUD_VOL_CTL,
  271. .sreg = SHADOW_AUD_VOL_CTL,
  272. .mask = (1 << 6),
  273. .shift = 6,
  274. },{
  275. .v = {
  276. .id = V4L2_CID_AUDIO_VOLUME,
  277. .name = "Volume",
  278. .minimum = 0,
  279. .maximum = 0x3f,
  280. .step = 1,
  281. .default_value = 0x3f,
  282. .type = V4L2_CTRL_TYPE_INTEGER,
  283. },
  284. .reg = AUD_VOL_CTL,
  285. .sreg = SHADOW_AUD_VOL_CTL,
  286. .mask = 0x3f,
  287. .shift = 0,
  288. },{
  289. .v = {
  290. .id = V4L2_CID_AUDIO_BALANCE,
  291. .name = "Balance",
  292. .minimum = 0,
  293. .maximum = 0x7f,
  294. .step = 1,
  295. .default_value = 0x40,
  296. .type = V4L2_CTRL_TYPE_INTEGER,
  297. },
  298. .reg = AUD_BAL_CTL,
  299. .sreg = SHADOW_AUD_BAL_CTL,
  300. .mask = 0x7f,
  301. .shift = 0,
  302. }
  303. };
  304. enum { CX8800_CTLS = ARRAY_SIZE(cx8800_ctls) };
  305. /* Must be sorted from low to high control ID! */
  306. const u32 cx88_user_ctrls[] = {
  307. V4L2_CID_USER_CLASS,
  308. V4L2_CID_BRIGHTNESS,
  309. V4L2_CID_CONTRAST,
  310. V4L2_CID_SATURATION,
  311. V4L2_CID_HUE,
  312. V4L2_CID_AUDIO_VOLUME,
  313. V4L2_CID_AUDIO_BALANCE,
  314. V4L2_CID_AUDIO_MUTE,
  315. V4L2_CID_SHARPNESS,
  316. V4L2_CID_CHROMA_AGC,
  317. V4L2_CID_COLOR_KILLER,
  318. V4L2_CID_BAND_STOP_FILTER,
  319. 0
  320. };
  321. EXPORT_SYMBOL(cx88_user_ctrls);
  322. static const u32 * const ctrl_classes[] = {
  323. cx88_user_ctrls,
  324. NULL
  325. };
  326. int cx8800_ctrl_query(struct cx88_core *core, struct v4l2_queryctrl *qctrl)
  327. {
  328. int i;
  329. if (qctrl->id < V4L2_CID_BASE ||
  330. qctrl->id >= V4L2_CID_LASTP1)
  331. return -EINVAL;
  332. for (i = 0; i < CX8800_CTLS; i++)
  333. if (cx8800_ctls[i].v.id == qctrl->id)
  334. break;
  335. if (i == CX8800_CTLS) {
  336. *qctrl = no_ctl;
  337. return 0;
  338. }
  339. *qctrl = cx8800_ctls[i].v;
  340. /* Report chroma AGC as inactive when SECAM is selected */
  341. if (cx8800_ctls[i].v.id == V4L2_CID_CHROMA_AGC &&
  342. core->tvnorm & V4L2_STD_SECAM)
  343. qctrl->flags |= V4L2_CTRL_FLAG_INACTIVE;
  344. return 0;
  345. }
  346. EXPORT_SYMBOL(cx8800_ctrl_query);
  347. /* ------------------------------------------------------------------- */
  348. /* resource management */
  349. static int res_get(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bit)
  350. {
  351. struct cx88_core *core = dev->core;
  352. if (fh->resources & bit)
  353. /* have it already allocated */
  354. return 1;
  355. /* is it free? */
  356. mutex_lock(&core->lock);
  357. if (dev->resources & bit) {
  358. /* no, someone else uses it */
  359. mutex_unlock(&core->lock);
  360. return 0;
  361. }
  362. /* it's free, grab it */
  363. fh->resources |= bit;
  364. dev->resources |= bit;
  365. dprintk(1,"res: get %d\n",bit);
  366. mutex_unlock(&core->lock);
  367. return 1;
  368. }
  369. static
  370. int res_check(struct cx8800_fh *fh, unsigned int bit)
  371. {
  372. return (fh->resources & bit);
  373. }
  374. static
  375. int res_locked(struct cx8800_dev *dev, unsigned int bit)
  376. {
  377. return (dev->resources & bit);
  378. }
  379. static
  380. void res_free(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bits)
  381. {
  382. struct cx88_core *core = dev->core;
  383. BUG_ON((fh->resources & bits) != bits);
  384. mutex_lock(&core->lock);
  385. fh->resources &= ~bits;
  386. dev->resources &= ~bits;
  387. dprintk(1,"res: put %d\n",bits);
  388. mutex_unlock(&core->lock);
  389. }
  390. /* ------------------------------------------------------------------ */
  391. int cx88_video_mux(struct cx88_core *core, unsigned int input)
  392. {
  393. /* struct cx88_core *core = dev->core; */
  394. dprintk(1,"video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n",
  395. input, INPUT(input).vmux,
  396. INPUT(input).gpio0,INPUT(input).gpio1,
  397. INPUT(input).gpio2,INPUT(input).gpio3);
  398. core->input = input;
  399. cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input).vmux << 14);
  400. cx_write(MO_GP3_IO, INPUT(input).gpio3);
  401. cx_write(MO_GP0_IO, INPUT(input).gpio0);
  402. cx_write(MO_GP1_IO, INPUT(input).gpio1);
  403. cx_write(MO_GP2_IO, INPUT(input).gpio2);
  404. switch (INPUT(input).type) {
  405. case CX88_VMUX_SVIDEO:
  406. cx_set(MO_AFECFG_IO, 0x00000001);
  407. cx_set(MO_INPUT_FORMAT, 0x00010010);
  408. cx_set(MO_FILTER_EVEN, 0x00002020);
  409. cx_set(MO_FILTER_ODD, 0x00002020);
  410. break;
  411. default:
  412. cx_clear(MO_AFECFG_IO, 0x00000001);
  413. cx_clear(MO_INPUT_FORMAT, 0x00010010);
  414. cx_clear(MO_FILTER_EVEN, 0x00002020);
  415. cx_clear(MO_FILTER_ODD, 0x00002020);
  416. break;
  417. }
  418. /* if there are audioroutes defined, we have an external
  419. ADC to deal with audio */
  420. if (INPUT(input).audioroute) {
  421. /* The wm8775 module has the "2" route hardwired into
  422. the initialization. Some boards may use different
  423. routes for different inputs. HVR-1300 surely does */
  424. if (core->board.audio_chip &&
  425. core->board.audio_chip == V4L2_IDENT_WM8775) {
  426. call_all(core, audio, s_routing,
  427. INPUT(input).audioroute, 0, 0);
  428. }
  429. /* cx2388's C-ADC is connected to the tuner only.
  430. When used with S-Video, that ADC is busy dealing with
  431. chroma, so an external must be used for baseband audio */
  432. if (INPUT(input).type != CX88_VMUX_TELEVISION &&
  433. INPUT(input).type != CX88_VMUX_CABLE) {
  434. /* "I2S ADC mode" */
  435. core->tvaudio = WW_I2SADC;
  436. cx88_set_tvaudio(core);
  437. } else {
  438. /* Normal mode */
  439. cx_write(AUD_I2SCNTL, 0x0);
  440. cx_clear(AUD_CTL, EN_I2SIN_ENABLE);
  441. }
  442. }
  443. return 0;
  444. }
  445. EXPORT_SYMBOL(cx88_video_mux);
  446. /* ------------------------------------------------------------------ */
  447. static int start_video_dma(struct cx8800_dev *dev,
  448. struct cx88_dmaqueue *q,
  449. struct cx88_buffer *buf)
  450. {
  451. struct cx88_core *core = dev->core;
  452. /* setup fifo + format */
  453. cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH21],
  454. buf->bpl, buf->risc.dma);
  455. cx88_set_scale(core, buf->vb.width, buf->vb.height, buf->vb.field);
  456. cx_write(MO_COLOR_CTRL, buf->fmt->cxformat | ColorFormatGamma);
  457. /* reset counter */
  458. cx_write(MO_VIDY_GPCNTRL,GP_COUNT_CONTROL_RESET);
  459. q->count = 1;
  460. /* enable irqs */
  461. cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT);
  462. /* Enables corresponding bits at PCI_INT_STAT:
  463. bits 0 to 4: video, audio, transport stream, VIP, Host
  464. bit 7: timer
  465. bits 8 and 9: DMA complete for: SRC, DST
  466. bits 10 and 11: BERR signal asserted for RISC: RD, WR
  467. bits 12 to 15: BERR signal asserted for: BRDG, SRC, DST, IPB
  468. */
  469. cx_set(MO_VID_INTMSK, 0x0f0011);
  470. /* enable capture */
  471. cx_set(VID_CAPTURE_CONTROL,0x06);
  472. /* start dma */
  473. cx_set(MO_DEV_CNTRL2, (1<<5));
  474. cx_set(MO_VID_DMACNTRL, 0x11); /* Planar Y and packed FIFO and RISC enable */
  475. return 0;
  476. }
  477. #ifdef CONFIG_PM
  478. static int stop_video_dma(struct cx8800_dev *dev)
  479. {
  480. struct cx88_core *core = dev->core;
  481. /* stop dma */
  482. cx_clear(MO_VID_DMACNTRL, 0x11);
  483. /* disable capture */
  484. cx_clear(VID_CAPTURE_CONTROL,0x06);
  485. /* disable irqs */
  486. cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT);
  487. cx_clear(MO_VID_INTMSK, 0x0f0011);
  488. return 0;
  489. }
  490. #endif
  491. static int restart_video_queue(struct cx8800_dev *dev,
  492. struct cx88_dmaqueue *q)
  493. {
  494. struct cx88_core *core = dev->core;
  495. struct cx88_buffer *buf, *prev;
  496. if (!list_empty(&q->active)) {
  497. buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
  498. dprintk(2,"restart_queue [%p/%d]: restart dma\n",
  499. buf, buf->vb.i);
  500. start_video_dma(dev, q, buf);
  501. list_for_each_entry(buf, &q->active, vb.queue)
  502. buf->count = q->count++;
  503. mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
  504. return 0;
  505. }
  506. prev = NULL;
  507. for (;;) {
  508. if (list_empty(&q->queued))
  509. return 0;
  510. buf = list_entry(q->queued.next, struct cx88_buffer, vb.queue);
  511. if (NULL == prev) {
  512. list_move_tail(&buf->vb.queue, &q->active);
  513. start_video_dma(dev, q, buf);
  514. buf->vb.state = VIDEOBUF_ACTIVE;
  515. buf->count = q->count++;
  516. mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
  517. dprintk(2,"[%p/%d] restart_queue - first active\n",
  518. buf,buf->vb.i);
  519. } else if (prev->vb.width == buf->vb.width &&
  520. prev->vb.height == buf->vb.height &&
  521. prev->fmt == buf->fmt) {
  522. list_move_tail(&buf->vb.queue, &q->active);
  523. buf->vb.state = VIDEOBUF_ACTIVE;
  524. buf->count = q->count++;
  525. prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
  526. dprintk(2,"[%p/%d] restart_queue - move to active\n",
  527. buf,buf->vb.i);
  528. } else {
  529. return 0;
  530. }
  531. prev = buf;
  532. }
  533. }
  534. /* ------------------------------------------------------------------ */
  535. static int
  536. buffer_setup(struct videobuf_queue *q, unsigned int *count, unsigned int *size)
  537. {
  538. struct cx8800_fh *fh = q->priv_data;
  539. *size = fh->fmt->depth*fh->width*fh->height >> 3;
  540. if (0 == *count)
  541. *count = 32;
  542. if (*size * *count > vid_limit * 1024 * 1024)
  543. *count = (vid_limit * 1024 * 1024) / *size;
  544. return 0;
  545. }
  546. static int
  547. buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
  548. enum v4l2_field field)
  549. {
  550. struct cx8800_fh *fh = q->priv_data;
  551. struct cx8800_dev *dev = fh->dev;
  552. struct cx88_core *core = dev->core;
  553. struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
  554. struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb);
  555. int rc, init_buffer = 0;
  556. BUG_ON(NULL == fh->fmt);
  557. if (fh->width < 48 || fh->width > norm_maxw(core->tvnorm) ||
  558. fh->height < 32 || fh->height > norm_maxh(core->tvnorm))
  559. return -EINVAL;
  560. buf->vb.size = (fh->width * fh->height * fh->fmt->depth) >> 3;
  561. if (0 != buf->vb.baddr && buf->vb.bsize < buf->vb.size)
  562. return -EINVAL;
  563. if (buf->fmt != fh->fmt ||
  564. buf->vb.width != fh->width ||
  565. buf->vb.height != fh->height ||
  566. buf->vb.field != field) {
  567. buf->fmt = fh->fmt;
  568. buf->vb.width = fh->width;
  569. buf->vb.height = fh->height;
  570. buf->vb.field = field;
  571. init_buffer = 1;
  572. }
  573. if (VIDEOBUF_NEEDS_INIT == buf->vb.state) {
  574. init_buffer = 1;
  575. if (0 != (rc = videobuf_iolock(q,&buf->vb,NULL)))
  576. goto fail;
  577. }
  578. if (init_buffer) {
  579. buf->bpl = buf->vb.width * buf->fmt->depth >> 3;
  580. switch (buf->vb.field) {
  581. case V4L2_FIELD_TOP:
  582. cx88_risc_buffer(dev->pci, &buf->risc,
  583. dma->sglist, 0, UNSET,
  584. buf->bpl, 0, buf->vb.height);
  585. break;
  586. case V4L2_FIELD_BOTTOM:
  587. cx88_risc_buffer(dev->pci, &buf->risc,
  588. dma->sglist, UNSET, 0,
  589. buf->bpl, 0, buf->vb.height);
  590. break;
  591. case V4L2_FIELD_INTERLACED:
  592. cx88_risc_buffer(dev->pci, &buf->risc,
  593. dma->sglist, 0, buf->bpl,
  594. buf->bpl, buf->bpl,
  595. buf->vb.height >> 1);
  596. break;
  597. case V4L2_FIELD_SEQ_TB:
  598. cx88_risc_buffer(dev->pci, &buf->risc,
  599. dma->sglist,
  600. 0, buf->bpl * (buf->vb.height >> 1),
  601. buf->bpl, 0,
  602. buf->vb.height >> 1);
  603. break;
  604. case V4L2_FIELD_SEQ_BT:
  605. cx88_risc_buffer(dev->pci, &buf->risc,
  606. dma->sglist,
  607. buf->bpl * (buf->vb.height >> 1), 0,
  608. buf->bpl, 0,
  609. buf->vb.height >> 1);
  610. break;
  611. default:
  612. BUG();
  613. }
  614. }
  615. dprintk(2,"[%p/%d] buffer_prepare - %dx%d %dbpp \"%s\" - dma=0x%08lx\n",
  616. buf, buf->vb.i,
  617. fh->width, fh->height, fh->fmt->depth, fh->fmt->name,
  618. (unsigned long)buf->risc.dma);
  619. buf->vb.state = VIDEOBUF_PREPARED;
  620. return 0;
  621. fail:
  622. cx88_free_buffer(q,buf);
  623. return rc;
  624. }
  625. static void
  626. buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb)
  627. {
  628. struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
  629. struct cx88_buffer *prev;
  630. struct cx8800_fh *fh = vq->priv_data;
  631. struct cx8800_dev *dev = fh->dev;
  632. struct cx88_core *core = dev->core;
  633. struct cx88_dmaqueue *q = &dev->vidq;
  634. /* add jump to stopper */
  635. buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC);
  636. buf->risc.jmp[1] = cpu_to_le32(q->stopper.dma);
  637. if (!list_empty(&q->queued)) {
  638. list_add_tail(&buf->vb.queue,&q->queued);
  639. buf->vb.state = VIDEOBUF_QUEUED;
  640. dprintk(2,"[%p/%d] buffer_queue - append to queued\n",
  641. buf, buf->vb.i);
  642. } else if (list_empty(&q->active)) {
  643. list_add_tail(&buf->vb.queue,&q->active);
  644. start_video_dma(dev, q, buf);
  645. buf->vb.state = VIDEOBUF_ACTIVE;
  646. buf->count = q->count++;
  647. mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
  648. dprintk(2,"[%p/%d] buffer_queue - first active\n",
  649. buf, buf->vb.i);
  650. } else {
  651. prev = list_entry(q->active.prev, struct cx88_buffer, vb.queue);
  652. if (prev->vb.width == buf->vb.width &&
  653. prev->vb.height == buf->vb.height &&
  654. prev->fmt == buf->fmt) {
  655. list_add_tail(&buf->vb.queue,&q->active);
  656. buf->vb.state = VIDEOBUF_ACTIVE;
  657. buf->count = q->count++;
  658. prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
  659. dprintk(2,"[%p/%d] buffer_queue - append to active\n",
  660. buf, buf->vb.i);
  661. } else {
  662. list_add_tail(&buf->vb.queue,&q->queued);
  663. buf->vb.state = VIDEOBUF_QUEUED;
  664. dprintk(2,"[%p/%d] buffer_queue - first queued\n",
  665. buf, buf->vb.i);
  666. }
  667. }
  668. }
  669. static void buffer_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
  670. {
  671. struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
  672. cx88_free_buffer(q,buf);
  673. }
  674. static const struct videobuf_queue_ops cx8800_video_qops = {
  675. .buf_setup = buffer_setup,
  676. .buf_prepare = buffer_prepare,
  677. .buf_queue = buffer_queue,
  678. .buf_release = buffer_release,
  679. };
  680. /* ------------------------------------------------------------------ */
  681. /* ------------------------------------------------------------------ */
  682. static struct videobuf_queue* get_queue(struct cx8800_fh *fh)
  683. {
  684. switch (fh->type) {
  685. case V4L2_BUF_TYPE_VIDEO_CAPTURE:
  686. return &fh->vidq;
  687. case V4L2_BUF_TYPE_VBI_CAPTURE:
  688. return &fh->vbiq;
  689. default:
  690. BUG();
  691. return NULL;
  692. }
  693. }
  694. static int get_ressource(struct cx8800_fh *fh)
  695. {
  696. switch (fh->type) {
  697. case V4L2_BUF_TYPE_VIDEO_CAPTURE:
  698. return RESOURCE_VIDEO;
  699. case V4L2_BUF_TYPE_VBI_CAPTURE:
  700. return RESOURCE_VBI;
  701. default:
  702. BUG();
  703. return 0;
  704. }
  705. }
  706. static int video_open(struct file *file)
  707. {
  708. struct video_device *vdev = video_devdata(file);
  709. struct cx8800_dev *dev = video_drvdata(file);
  710. struct cx88_core *core = dev->core;
  711. struct cx8800_fh *fh;
  712. enum v4l2_buf_type type = 0;
  713. int radio = 0;
  714. switch (vdev->vfl_type) {
  715. case VFL_TYPE_GRABBER:
  716. type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  717. break;
  718. case VFL_TYPE_VBI:
  719. type = V4L2_BUF_TYPE_VBI_CAPTURE;
  720. break;
  721. case VFL_TYPE_RADIO:
  722. radio = 1;
  723. break;
  724. }
  725. dprintk(1, "open dev=%s radio=%d type=%s\n",
  726. video_device_node_name(vdev), radio, v4l2_type_names[type]);
  727. /* allocate + initialize per filehandle data */
  728. fh = kzalloc(sizeof(*fh),GFP_KERNEL);
  729. if (unlikely(!fh))
  730. return -ENOMEM;
  731. file->private_data = fh;
  732. fh->dev = dev;
  733. fh->radio = radio;
  734. fh->type = type;
  735. fh->width = 320;
  736. fh->height = 240;
  737. fh->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24);
  738. mutex_lock(&core->lock);
  739. videobuf_queue_sg_init(&fh->vidq, &cx8800_video_qops,
  740. &dev->pci->dev, &dev->slock,
  741. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  742. V4L2_FIELD_INTERLACED,
  743. sizeof(struct cx88_buffer),
  744. fh, NULL);
  745. videobuf_queue_sg_init(&fh->vbiq, &cx8800_vbi_qops,
  746. &dev->pci->dev, &dev->slock,
  747. V4L2_BUF_TYPE_VBI_CAPTURE,
  748. V4L2_FIELD_SEQ_TB,
  749. sizeof(struct cx88_buffer),
  750. fh, NULL);
  751. if (fh->radio) {
  752. dprintk(1,"video_open: setting radio device\n");
  753. cx_write(MO_GP3_IO, core->board.radio.gpio3);
  754. cx_write(MO_GP0_IO, core->board.radio.gpio0);
  755. cx_write(MO_GP1_IO, core->board.radio.gpio1);
  756. cx_write(MO_GP2_IO, core->board.radio.gpio2);
  757. if (core->board.radio.audioroute) {
  758. if(core->board.audio_chip &&
  759. core->board.audio_chip == V4L2_IDENT_WM8775) {
  760. call_all(core, audio, s_routing,
  761. core->board.radio.audioroute, 0, 0);
  762. }
  763. /* "I2S ADC mode" */
  764. core->tvaudio = WW_I2SADC;
  765. cx88_set_tvaudio(core);
  766. } else {
  767. /* FM Mode */
  768. core->tvaudio = WW_FM;
  769. cx88_set_tvaudio(core);
  770. cx88_set_stereo(core,V4L2_TUNER_MODE_STEREO,1);
  771. }
  772. call_all(core, tuner, s_radio);
  773. }
  774. core->users++;
  775. mutex_unlock(&core->lock);
  776. return 0;
  777. }
  778. static ssize_t
  779. video_read(struct file *file, char __user *data, size_t count, loff_t *ppos)
  780. {
  781. struct cx8800_fh *fh = file->private_data;
  782. switch (fh->type) {
  783. case V4L2_BUF_TYPE_VIDEO_CAPTURE:
  784. if (res_locked(fh->dev,RESOURCE_VIDEO))
  785. return -EBUSY;
  786. return videobuf_read_one(&fh->vidq, data, count, ppos,
  787. file->f_flags & O_NONBLOCK);
  788. case V4L2_BUF_TYPE_VBI_CAPTURE:
  789. if (!res_get(fh->dev,fh,RESOURCE_VBI))
  790. return -EBUSY;
  791. return videobuf_read_stream(&fh->vbiq, data, count, ppos, 1,
  792. file->f_flags & O_NONBLOCK);
  793. default:
  794. BUG();
  795. return 0;
  796. }
  797. }
  798. static unsigned int
  799. video_poll(struct file *file, struct poll_table_struct *wait)
  800. {
  801. struct cx8800_fh *fh = file->private_data;
  802. struct cx88_buffer *buf;
  803. unsigned int rc = POLLERR;
  804. if (V4L2_BUF_TYPE_VBI_CAPTURE == fh->type) {
  805. if (!res_get(fh->dev,fh,RESOURCE_VBI))
  806. return POLLERR;
  807. return videobuf_poll_stream(file, &fh->vbiq, wait);
  808. }
  809. mutex_lock(&fh->vidq.vb_lock);
  810. if (res_check(fh,RESOURCE_VIDEO)) {
  811. /* streaming capture */
  812. if (list_empty(&fh->vidq.stream))
  813. goto done;
  814. buf = list_entry(fh->vidq.stream.next,struct cx88_buffer,vb.stream);
  815. } else {
  816. /* read() capture */
  817. buf = (struct cx88_buffer*)fh->vidq.read_buf;
  818. if (NULL == buf)
  819. goto done;
  820. }
  821. poll_wait(file, &buf->vb.done, wait);
  822. if (buf->vb.state == VIDEOBUF_DONE ||
  823. buf->vb.state == VIDEOBUF_ERROR)
  824. rc = POLLIN|POLLRDNORM;
  825. else
  826. rc = 0;
  827. done:
  828. mutex_unlock(&fh->vidq.vb_lock);
  829. return rc;
  830. }
  831. static int video_release(struct file *file)
  832. {
  833. struct cx8800_fh *fh = file->private_data;
  834. struct cx8800_dev *dev = fh->dev;
  835. /* turn off overlay */
  836. if (res_check(fh, RESOURCE_OVERLAY)) {
  837. /* FIXME */
  838. res_free(dev,fh,RESOURCE_OVERLAY);
  839. }
  840. /* stop video capture */
  841. if (res_check(fh, RESOURCE_VIDEO)) {
  842. videobuf_queue_cancel(&fh->vidq);
  843. res_free(dev,fh,RESOURCE_VIDEO);
  844. }
  845. if (fh->vidq.read_buf) {
  846. buffer_release(&fh->vidq,fh->vidq.read_buf);
  847. kfree(fh->vidq.read_buf);
  848. }
  849. /* stop vbi capture */
  850. if (res_check(fh, RESOURCE_VBI)) {
  851. videobuf_stop(&fh->vbiq);
  852. res_free(dev,fh,RESOURCE_VBI);
  853. }
  854. videobuf_mmap_free(&fh->vidq);
  855. videobuf_mmap_free(&fh->vbiq);
  856. mutex_lock(&dev->core->lock);
  857. file->private_data = NULL;
  858. kfree(fh);
  859. dev->core->users--;
  860. if (!dev->core->users)
  861. call_all(dev->core, core, s_power, 0);
  862. mutex_unlock(&dev->core->lock);
  863. return 0;
  864. }
  865. static int
  866. video_mmap(struct file *file, struct vm_area_struct * vma)
  867. {
  868. struct cx8800_fh *fh = file->private_data;
  869. return videobuf_mmap_mapper(get_queue(fh), vma);
  870. }
  871. /* ------------------------------------------------------------------ */
  872. /* VIDEO CTRL IOCTLS */
  873. int cx88_get_control (struct cx88_core *core, struct v4l2_control *ctl)
  874. {
  875. const struct cx88_ctrl *c = NULL;
  876. u32 value;
  877. int i;
  878. for (i = 0; i < CX8800_CTLS; i++)
  879. if (cx8800_ctls[i].v.id == ctl->id)
  880. c = &cx8800_ctls[i];
  881. if (unlikely(NULL == c))
  882. return -EINVAL;
  883. value = c->sreg ? cx_sread(c->sreg) : cx_read(c->reg);
  884. switch (ctl->id) {
  885. case V4L2_CID_AUDIO_BALANCE:
  886. ctl->value = ((value & 0x7f) < 0x40) ? ((value & 0x7f) + 0x40)
  887. : (0x7f - (value & 0x7f));
  888. break;
  889. case V4L2_CID_AUDIO_VOLUME:
  890. ctl->value = 0x3f - (value & 0x3f);
  891. break;
  892. case V4L2_CID_SHARPNESS:
  893. ctl->value = ((value & 0x0200) ? (((value & 0x0180) >> 7) + 1)
  894. : 0);
  895. break;
  896. default:
  897. ctl->value = ((value + (c->off << c->shift)) & c->mask) >> c->shift;
  898. break;
  899. }
  900. dprintk(1,"get_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
  901. ctl->id, c->v.name, ctl->value, c->reg,
  902. value,c->mask, c->sreg ? " [shadowed]" : "");
  903. return 0;
  904. }
  905. EXPORT_SYMBOL(cx88_get_control);
  906. int cx88_set_control(struct cx88_core *core, struct v4l2_control *ctl)
  907. {
  908. const struct cx88_ctrl *c = NULL;
  909. u32 value,mask;
  910. int i;
  911. for (i = 0; i < CX8800_CTLS; i++) {
  912. if (cx8800_ctls[i].v.id == ctl->id) {
  913. c = &cx8800_ctls[i];
  914. }
  915. }
  916. if (unlikely(NULL == c))
  917. return -EINVAL;
  918. if (ctl->value < c->v.minimum)
  919. ctl->value = c->v.minimum;
  920. if (ctl->value > c->v.maximum)
  921. ctl->value = c->v.maximum;
  922. /* Pass changes onto any WM8775 */
  923. if (core->board.audio_chip == V4L2_IDENT_WM8775) {
  924. struct v4l2_control client_ctl;
  925. memset(&client_ctl, 0, sizeof(client_ctl));
  926. client_ctl.id = ctl->id;
  927. switch (ctl->id) {
  928. case V4L2_CID_AUDIO_MUTE:
  929. client_ctl.value = ctl->value;
  930. break;
  931. case V4L2_CID_AUDIO_VOLUME:
  932. client_ctl.value = (ctl->value) ?
  933. (0x90 + ctl->value) << 8 : 0;
  934. break;
  935. case V4L2_CID_AUDIO_BALANCE:
  936. client_ctl.value = ctl->value << 9;
  937. break;
  938. default:
  939. client_ctl.id = 0;
  940. break;
  941. }
  942. if (client_ctl.id)
  943. call_hw(core, WM8775_GID, core, s_ctrl, &client_ctl);
  944. }
  945. mask=c->mask;
  946. switch (ctl->id) {
  947. case V4L2_CID_AUDIO_BALANCE:
  948. value = (ctl->value < 0x40) ? (0x7f - ctl->value) : (ctl->value - 0x40);
  949. break;
  950. case V4L2_CID_AUDIO_VOLUME:
  951. value = 0x3f - (ctl->value & 0x3f);
  952. break;
  953. case V4L2_CID_SATURATION:
  954. /* special v_sat handling */
  955. value = ((ctl->value - c->off) << c->shift) & c->mask;
  956. if (core->tvnorm & V4L2_STD_SECAM) {
  957. /* For SECAM, both U and V sat should be equal */
  958. value=value<<8|value;
  959. } else {
  960. /* Keeps U Saturation proportional to V Sat */
  961. value=(value*0x5a)/0x7f<<8|value;
  962. }
  963. mask=0xffff;
  964. break;
  965. case V4L2_CID_SHARPNESS:
  966. /* 0b000, 0b100, 0b101, 0b110, or 0b111 */
  967. value = (ctl->value < 1 ? 0 : ((ctl->value + 3) << 7));
  968. /* needs to be set for both fields */
  969. cx_andor(MO_FILTER_EVEN, mask, value);
  970. break;
  971. case V4L2_CID_CHROMA_AGC:
  972. /* Do not allow chroma AGC to be enabled for SECAM */
  973. value = ((ctl->value - c->off) << c->shift) & c->mask;
  974. if (core->tvnorm & V4L2_STD_SECAM && value)
  975. return -EINVAL;
  976. break;
  977. default:
  978. value = ((ctl->value - c->off) << c->shift) & c->mask;
  979. break;
  980. }
  981. dprintk(1,"set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
  982. ctl->id, c->v.name, ctl->value, c->reg, value,
  983. mask, c->sreg ? " [shadowed]" : "");
  984. if (c->sreg) {
  985. cx_sandor(c->sreg, c->reg, mask, value);
  986. } else {
  987. cx_andor(c->reg, mask, value);
  988. }
  989. return 0;
  990. }
  991. EXPORT_SYMBOL(cx88_set_control);
  992. static void init_controls(struct cx88_core *core)
  993. {
  994. struct v4l2_control ctrl;
  995. int i;
  996. for (i = 0; i < CX8800_CTLS; i++) {
  997. ctrl.id=cx8800_ctls[i].v.id;
  998. ctrl.value=cx8800_ctls[i].v.default_value;
  999. cx88_set_control(core, &ctrl);
  1000. }
  1001. }
  1002. /* ------------------------------------------------------------------ */
  1003. /* VIDEO IOCTLS */
  1004. static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
  1005. struct v4l2_format *f)
  1006. {
  1007. struct cx8800_fh *fh = priv;
  1008. f->fmt.pix.width = fh->width;
  1009. f->fmt.pix.height = fh->height;
  1010. f->fmt.pix.field = fh->vidq.field;
  1011. f->fmt.pix.pixelformat = fh->fmt->fourcc;
  1012. f->fmt.pix.bytesperline =
  1013. (f->fmt.pix.width * fh->fmt->depth) >> 3;
  1014. f->fmt.pix.sizeimage =
  1015. f->fmt.pix.height * f->fmt.pix.bytesperline;
  1016. return 0;
  1017. }
  1018. static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
  1019. struct v4l2_format *f)
  1020. {
  1021. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1022. const struct cx8800_fmt *fmt;
  1023. enum v4l2_field field;
  1024. unsigned int maxw, maxh;
  1025. fmt = format_by_fourcc(f->fmt.pix.pixelformat);
  1026. if (NULL == fmt)
  1027. return -EINVAL;
  1028. field = f->fmt.pix.field;
  1029. maxw = norm_maxw(core->tvnorm);
  1030. maxh = norm_maxh(core->tvnorm);
  1031. if (V4L2_FIELD_ANY == field) {
  1032. field = (f->fmt.pix.height > maxh/2)
  1033. ? V4L2_FIELD_INTERLACED
  1034. : V4L2_FIELD_BOTTOM;
  1035. }
  1036. switch (field) {
  1037. case V4L2_FIELD_TOP:
  1038. case V4L2_FIELD_BOTTOM:
  1039. maxh = maxh / 2;
  1040. break;
  1041. case V4L2_FIELD_INTERLACED:
  1042. break;
  1043. default:
  1044. return -EINVAL;
  1045. }
  1046. f->fmt.pix.field = field;
  1047. v4l_bound_align_image(&f->fmt.pix.width, 48, maxw, 2,
  1048. &f->fmt.pix.height, 32, maxh, 0, 0);
  1049. f->fmt.pix.bytesperline =
  1050. (f->fmt.pix.width * fmt->depth) >> 3;
  1051. f->fmt.pix.sizeimage =
  1052. f->fmt.pix.height * f->fmt.pix.bytesperline;
  1053. return 0;
  1054. }
  1055. static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
  1056. struct v4l2_format *f)
  1057. {
  1058. struct cx8800_fh *fh = priv;
  1059. int err = vidioc_try_fmt_vid_cap (file,priv,f);
  1060. if (0 != err)
  1061. return err;
  1062. fh->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
  1063. fh->width = f->fmt.pix.width;
  1064. fh->height = f->fmt.pix.height;
  1065. fh->vidq.field = f->fmt.pix.field;
  1066. return 0;
  1067. }
  1068. static int vidioc_querycap (struct file *file, void *priv,
  1069. struct v4l2_capability *cap)
  1070. {
  1071. struct cx8800_dev *dev = ((struct cx8800_fh *)priv)->dev;
  1072. struct cx88_core *core = dev->core;
  1073. strcpy(cap->driver, "cx8800");
  1074. strlcpy(cap->card, core->board.name, sizeof(cap->card));
  1075. sprintf(cap->bus_info,"PCI:%s",pci_name(dev->pci));
  1076. cap->capabilities =
  1077. V4L2_CAP_VIDEO_CAPTURE |
  1078. V4L2_CAP_READWRITE |
  1079. V4L2_CAP_STREAMING |
  1080. V4L2_CAP_VBI_CAPTURE;
  1081. if (UNSET != core->board.tuner_type)
  1082. cap->capabilities |= V4L2_CAP_TUNER;
  1083. return 0;
  1084. }
  1085. static int vidioc_enum_fmt_vid_cap (struct file *file, void *priv,
  1086. struct v4l2_fmtdesc *f)
  1087. {
  1088. if (unlikely(f->index >= ARRAY_SIZE(formats)))
  1089. return -EINVAL;
  1090. strlcpy(f->description,formats[f->index].name,sizeof(f->description));
  1091. f->pixelformat = formats[f->index].fourcc;
  1092. return 0;
  1093. }
  1094. static int vidioc_reqbufs (struct file *file, void *priv, struct v4l2_requestbuffers *p)
  1095. {
  1096. struct cx8800_fh *fh = priv;
  1097. return (videobuf_reqbufs(get_queue(fh), p));
  1098. }
  1099. static int vidioc_querybuf (struct file *file, void *priv, struct v4l2_buffer *p)
  1100. {
  1101. struct cx8800_fh *fh = priv;
  1102. return (videobuf_querybuf(get_queue(fh), p));
  1103. }
  1104. static int vidioc_qbuf (struct file *file, void *priv, struct v4l2_buffer *p)
  1105. {
  1106. struct cx8800_fh *fh = priv;
  1107. return (videobuf_qbuf(get_queue(fh), p));
  1108. }
  1109. static int vidioc_dqbuf (struct file *file, void *priv, struct v4l2_buffer *p)
  1110. {
  1111. struct cx8800_fh *fh = priv;
  1112. return (videobuf_dqbuf(get_queue(fh), p,
  1113. file->f_flags & O_NONBLOCK));
  1114. }
  1115. static int vidioc_streamon(struct file *file, void *priv, enum v4l2_buf_type i)
  1116. {
  1117. struct cx8800_fh *fh = priv;
  1118. struct cx8800_dev *dev = fh->dev;
  1119. /* We should remember that this driver also supports teletext, */
  1120. /* so we have to test if the v4l2_buf_type is VBI capture data. */
  1121. if (unlikely((fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) &&
  1122. (fh->type != V4L2_BUF_TYPE_VBI_CAPTURE)))
  1123. return -EINVAL;
  1124. if (unlikely(i != fh->type))
  1125. return -EINVAL;
  1126. if (unlikely(!res_get(dev,fh,get_ressource(fh))))
  1127. return -EBUSY;
  1128. return videobuf_streamon(get_queue(fh));
  1129. }
  1130. static int vidioc_streamoff(struct file *file, void *priv, enum v4l2_buf_type i)
  1131. {
  1132. struct cx8800_fh *fh = priv;
  1133. struct cx8800_dev *dev = fh->dev;
  1134. int err, res;
  1135. if ((fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) &&
  1136. (fh->type != V4L2_BUF_TYPE_VBI_CAPTURE))
  1137. return -EINVAL;
  1138. if (i != fh->type)
  1139. return -EINVAL;
  1140. res = get_ressource(fh);
  1141. err = videobuf_streamoff(get_queue(fh));
  1142. if (err < 0)
  1143. return err;
  1144. res_free(dev,fh,res);
  1145. return 0;
  1146. }
  1147. static int vidioc_s_std (struct file *file, void *priv, v4l2_std_id *tvnorms)
  1148. {
  1149. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1150. mutex_lock(&core->lock);
  1151. cx88_set_tvnorm(core,*tvnorms);
  1152. mutex_unlock(&core->lock);
  1153. return 0;
  1154. }
  1155. /* only one input in this sample driver */
  1156. int cx88_enum_input (struct cx88_core *core,struct v4l2_input *i)
  1157. {
  1158. static const char * const iname[] = {
  1159. [ CX88_VMUX_COMPOSITE1 ] = "Composite1",
  1160. [ CX88_VMUX_COMPOSITE2 ] = "Composite2",
  1161. [ CX88_VMUX_COMPOSITE3 ] = "Composite3",
  1162. [ CX88_VMUX_COMPOSITE4 ] = "Composite4",
  1163. [ CX88_VMUX_SVIDEO ] = "S-Video",
  1164. [ CX88_VMUX_TELEVISION ] = "Television",
  1165. [ CX88_VMUX_CABLE ] = "Cable TV",
  1166. [ CX88_VMUX_DVB ] = "DVB",
  1167. [ CX88_VMUX_DEBUG ] = "for debug only",
  1168. };
  1169. unsigned int n = i->index;
  1170. if (n >= 4)
  1171. return -EINVAL;
  1172. if (0 == INPUT(n).type)
  1173. return -EINVAL;
  1174. i->type = V4L2_INPUT_TYPE_CAMERA;
  1175. strcpy(i->name,iname[INPUT(n).type]);
  1176. if ((CX88_VMUX_TELEVISION == INPUT(n).type) ||
  1177. (CX88_VMUX_CABLE == INPUT(n).type)) {
  1178. i->type = V4L2_INPUT_TYPE_TUNER;
  1179. i->std = CX88_NORMS;
  1180. }
  1181. return 0;
  1182. }
  1183. EXPORT_SYMBOL(cx88_enum_input);
  1184. static int vidioc_enum_input (struct file *file, void *priv,
  1185. struct v4l2_input *i)
  1186. {
  1187. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1188. return cx88_enum_input (core,i);
  1189. }
  1190. static int vidioc_g_input (struct file *file, void *priv, unsigned int *i)
  1191. {
  1192. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1193. *i = core->input;
  1194. return 0;
  1195. }
  1196. static int vidioc_s_input (struct file *file, void *priv, unsigned int i)
  1197. {
  1198. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1199. if (i >= 4)
  1200. return -EINVAL;
  1201. mutex_lock(&core->lock);
  1202. cx88_newstation(core);
  1203. cx88_video_mux(core,i);
  1204. mutex_unlock(&core->lock);
  1205. return 0;
  1206. }
  1207. static int vidioc_queryctrl (struct file *file, void *priv,
  1208. struct v4l2_queryctrl *qctrl)
  1209. {
  1210. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1211. qctrl->id = v4l2_ctrl_next(ctrl_classes, qctrl->id);
  1212. if (unlikely(qctrl->id == 0))
  1213. return -EINVAL;
  1214. return cx8800_ctrl_query(core, qctrl);
  1215. }
  1216. static int vidioc_g_ctrl (struct file *file, void *priv,
  1217. struct v4l2_control *ctl)
  1218. {
  1219. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1220. return
  1221. cx88_get_control(core,ctl);
  1222. }
  1223. static int vidioc_s_ctrl (struct file *file, void *priv,
  1224. struct v4l2_control *ctl)
  1225. {
  1226. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1227. return
  1228. cx88_set_control(core,ctl);
  1229. }
  1230. static int vidioc_g_tuner (struct file *file, void *priv,
  1231. struct v4l2_tuner *t)
  1232. {
  1233. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1234. u32 reg;
  1235. if (unlikely(UNSET == core->board.tuner_type))
  1236. return -EINVAL;
  1237. if (0 != t->index)
  1238. return -EINVAL;
  1239. strcpy(t->name, "Television");
  1240. t->type = V4L2_TUNER_ANALOG_TV;
  1241. t->capability = V4L2_TUNER_CAP_NORM;
  1242. t->rangehigh = 0xffffffffUL;
  1243. cx88_get_stereo(core ,t);
  1244. reg = cx_read(MO_DEVICE_STATUS);
  1245. t->signal = (reg & (1<<5)) ? 0xffff : 0x0000;
  1246. return 0;
  1247. }
  1248. static int vidioc_s_tuner (struct file *file, void *priv,
  1249. struct v4l2_tuner *t)
  1250. {
  1251. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1252. if (UNSET == core->board.tuner_type)
  1253. return -EINVAL;
  1254. if (0 != t->index)
  1255. return -EINVAL;
  1256. cx88_set_stereo(core, t->audmode, 1);
  1257. return 0;
  1258. }
  1259. static int vidioc_g_frequency (struct file *file, void *priv,
  1260. struct v4l2_frequency *f)
  1261. {
  1262. struct cx8800_fh *fh = priv;
  1263. struct cx88_core *core = fh->dev->core;
  1264. if (unlikely(UNSET == core->board.tuner_type))
  1265. return -EINVAL;
  1266. /* f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV; */
  1267. f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
  1268. f->frequency = core->freq;
  1269. call_all(core, tuner, g_frequency, f);
  1270. return 0;
  1271. }
  1272. int cx88_set_freq (struct cx88_core *core,
  1273. struct v4l2_frequency *f)
  1274. {
  1275. if (unlikely(UNSET == core->board.tuner_type))
  1276. return -EINVAL;
  1277. if (unlikely(f->tuner != 0))
  1278. return -EINVAL;
  1279. mutex_lock(&core->lock);
  1280. core->freq = f->frequency;
  1281. cx88_newstation(core);
  1282. call_all(core, tuner, s_frequency, f);
  1283. /* When changing channels it is required to reset TVAUDIO */
  1284. msleep (10);
  1285. cx88_set_tvaudio(core);
  1286. mutex_unlock(&core->lock);
  1287. return 0;
  1288. }
  1289. EXPORT_SYMBOL(cx88_set_freq);
  1290. static int vidioc_s_frequency (struct file *file, void *priv,
  1291. struct v4l2_frequency *f)
  1292. {
  1293. struct cx8800_fh *fh = priv;
  1294. struct cx88_core *core = fh->dev->core;
  1295. if (unlikely(0 == fh->radio && f->type != V4L2_TUNER_ANALOG_TV))
  1296. return -EINVAL;
  1297. if (unlikely(1 == fh->radio && f->type != V4L2_TUNER_RADIO))
  1298. return -EINVAL;
  1299. return
  1300. cx88_set_freq (core,f);
  1301. }
  1302. #ifdef CONFIG_VIDEO_ADV_DEBUG
  1303. static int vidioc_g_register (struct file *file, void *fh,
  1304. struct v4l2_dbg_register *reg)
  1305. {
  1306. struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core;
  1307. if (!v4l2_chip_match_host(&reg->match))
  1308. return -EINVAL;
  1309. /* cx2388x has a 24-bit register space */
  1310. reg->val = cx_read(reg->reg & 0xffffff);
  1311. reg->size = 4;
  1312. return 0;
  1313. }
  1314. static int vidioc_s_register (struct file *file, void *fh,
  1315. struct v4l2_dbg_register *reg)
  1316. {
  1317. struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core;
  1318. if (!v4l2_chip_match_host(&reg->match))
  1319. return -EINVAL;
  1320. cx_write(reg->reg & 0xffffff, reg->val);
  1321. return 0;
  1322. }
  1323. #endif
  1324. /* ----------------------------------------------------------- */
  1325. /* RADIO ESPECIFIC IOCTLS */
  1326. /* ----------------------------------------------------------- */
  1327. static int radio_querycap (struct file *file, void *priv,
  1328. struct v4l2_capability *cap)
  1329. {
  1330. struct cx8800_dev *dev = ((struct cx8800_fh *)priv)->dev;
  1331. struct cx88_core *core = dev->core;
  1332. strcpy(cap->driver, "cx8800");
  1333. strlcpy(cap->card, core->board.name, sizeof(cap->card));
  1334. sprintf(cap->bus_info,"PCI:%s", pci_name(dev->pci));
  1335. cap->capabilities = V4L2_CAP_TUNER;
  1336. return 0;
  1337. }
  1338. static int radio_g_tuner (struct file *file, void *priv,
  1339. struct v4l2_tuner *t)
  1340. {
  1341. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1342. if (unlikely(t->index > 0))
  1343. return -EINVAL;
  1344. strcpy(t->name, "Radio");
  1345. t->type = V4L2_TUNER_RADIO;
  1346. call_all(core, tuner, g_tuner, t);
  1347. return 0;
  1348. }
  1349. static int radio_enum_input (struct file *file, void *priv,
  1350. struct v4l2_input *i)
  1351. {
  1352. if (i->index != 0)
  1353. return -EINVAL;
  1354. strcpy(i->name,"Radio");
  1355. i->type = V4L2_INPUT_TYPE_TUNER;
  1356. return 0;
  1357. }
  1358. static int radio_g_audio (struct file *file, void *priv, struct v4l2_audio *a)
  1359. {
  1360. if (unlikely(a->index))
  1361. return -EINVAL;
  1362. strcpy(a->name,"Radio");
  1363. return 0;
  1364. }
  1365. /* FIXME: Should add a standard for radio */
  1366. static int radio_s_tuner (struct file *file, void *priv,
  1367. struct v4l2_tuner *t)
  1368. {
  1369. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1370. if (0 != t->index)
  1371. return -EINVAL;
  1372. call_all(core, tuner, s_tuner, t);
  1373. return 0;
  1374. }
  1375. static int radio_s_audio (struct file *file, void *fh,
  1376. struct v4l2_audio *a)
  1377. {
  1378. return 0;
  1379. }
  1380. static int radio_s_input (struct file *file, void *fh, unsigned int i)
  1381. {
  1382. return 0;
  1383. }
  1384. static int radio_queryctrl (struct file *file, void *priv,
  1385. struct v4l2_queryctrl *c)
  1386. {
  1387. int i;
  1388. if (c->id < V4L2_CID_BASE ||
  1389. c->id >= V4L2_CID_LASTP1)
  1390. return -EINVAL;
  1391. if (c->id == V4L2_CID_AUDIO_MUTE ||
  1392. c->id == V4L2_CID_AUDIO_VOLUME ||
  1393. c->id == V4L2_CID_AUDIO_BALANCE) {
  1394. for (i = 0; i < CX8800_CTLS; i++) {
  1395. if (cx8800_ctls[i].v.id == c->id)
  1396. break;
  1397. }
  1398. if (i == CX8800_CTLS)
  1399. return -EINVAL;
  1400. *c = cx8800_ctls[i].v;
  1401. } else
  1402. *c = no_ctl;
  1403. return 0;
  1404. }
  1405. /* ----------------------------------------------------------- */
  1406. static void cx8800_vid_timeout(unsigned long data)
  1407. {
  1408. struct cx8800_dev *dev = (struct cx8800_dev*)data;
  1409. struct cx88_core *core = dev->core;
  1410. struct cx88_dmaqueue *q = &dev->vidq;
  1411. struct cx88_buffer *buf;
  1412. unsigned long flags;
  1413. cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
  1414. cx_clear(MO_VID_DMACNTRL, 0x11);
  1415. cx_clear(VID_CAPTURE_CONTROL, 0x06);
  1416. spin_lock_irqsave(&dev->slock,flags);
  1417. while (!list_empty(&q->active)) {
  1418. buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
  1419. list_del(&buf->vb.queue);
  1420. buf->vb.state = VIDEOBUF_ERROR;
  1421. wake_up(&buf->vb.done);
  1422. printk("%s/0: [%p/%d] timeout - dma=0x%08lx\n", core->name,
  1423. buf, buf->vb.i, (unsigned long)buf->risc.dma);
  1424. }
  1425. restart_video_queue(dev,q);
  1426. spin_unlock_irqrestore(&dev->slock,flags);
  1427. }
  1428. static const char *cx88_vid_irqs[32] = {
  1429. "y_risci1", "u_risci1", "v_risci1", "vbi_risc1",
  1430. "y_risci2", "u_risci2", "v_risci2", "vbi_risc2",
  1431. "y_oflow", "u_oflow", "v_oflow", "vbi_oflow",
  1432. "y_sync", "u_sync", "v_sync", "vbi_sync",
  1433. "opc_err", "par_err", "rip_err", "pci_abort",
  1434. };
  1435. static void cx8800_vid_irq(struct cx8800_dev *dev)
  1436. {
  1437. struct cx88_core *core = dev->core;
  1438. u32 status, mask, count;
  1439. status = cx_read(MO_VID_INTSTAT);
  1440. mask = cx_read(MO_VID_INTMSK);
  1441. if (0 == (status & mask))
  1442. return;
  1443. cx_write(MO_VID_INTSTAT, status);
  1444. if (irq_debug || (status & mask & ~0xff))
  1445. cx88_print_irqbits(core->name, "irq vid",
  1446. cx88_vid_irqs, ARRAY_SIZE(cx88_vid_irqs),
  1447. status, mask);
  1448. /* risc op code error */
  1449. if (status & (1 << 16)) {
  1450. printk(KERN_WARNING "%s/0: video risc op code error\n",core->name);
  1451. cx_clear(MO_VID_DMACNTRL, 0x11);
  1452. cx_clear(VID_CAPTURE_CONTROL, 0x06);
  1453. cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
  1454. }
  1455. /* risc1 y */
  1456. if (status & 0x01) {
  1457. spin_lock(&dev->slock);
  1458. count = cx_read(MO_VIDY_GPCNT);
  1459. cx88_wakeup(core, &dev->vidq, count);
  1460. spin_unlock(&dev->slock);
  1461. }
  1462. /* risc1 vbi */
  1463. if (status & 0x08) {
  1464. spin_lock(&dev->slock);
  1465. count = cx_read(MO_VBI_GPCNT);
  1466. cx88_wakeup(core, &dev->vbiq, count);
  1467. spin_unlock(&dev->slock);
  1468. }
  1469. /* risc2 y */
  1470. if (status & 0x10) {
  1471. dprintk(2,"stopper video\n");
  1472. spin_lock(&dev->slock);
  1473. restart_video_queue(dev,&dev->vidq);
  1474. spin_unlock(&dev->slock);
  1475. }
  1476. /* risc2 vbi */
  1477. if (status & 0x80) {
  1478. dprintk(2,"stopper vbi\n");
  1479. spin_lock(&dev->slock);
  1480. cx8800_restart_vbi_queue(dev,&dev->vbiq);
  1481. spin_unlock(&dev->slock);
  1482. }
  1483. }
  1484. static irqreturn_t cx8800_irq(int irq, void *dev_id)
  1485. {
  1486. struct cx8800_dev *dev = dev_id;
  1487. struct cx88_core *core = dev->core;
  1488. u32 status;
  1489. int loop, handled = 0;
  1490. for (loop = 0; loop < 10; loop++) {
  1491. status = cx_read(MO_PCI_INTSTAT) &
  1492. (core->pci_irqmask | PCI_INT_VIDINT);
  1493. if (0 == status)
  1494. goto out;
  1495. cx_write(MO_PCI_INTSTAT, status);
  1496. handled = 1;
  1497. if (status & core->pci_irqmask)
  1498. cx88_core_irq(core,status);
  1499. if (status & PCI_INT_VIDINT)
  1500. cx8800_vid_irq(dev);
  1501. };
  1502. if (10 == loop) {
  1503. printk(KERN_WARNING "%s/0: irq loop -- clearing mask\n",
  1504. core->name);
  1505. cx_write(MO_PCI_INTMSK,0);
  1506. }
  1507. out:
  1508. return IRQ_RETVAL(handled);
  1509. }
  1510. /* ----------------------------------------------------------- */
  1511. /* exported stuff */
  1512. static const struct v4l2_file_operations video_fops =
  1513. {
  1514. .owner = THIS_MODULE,
  1515. .open = video_open,
  1516. .release = video_release,
  1517. .read = video_read,
  1518. .poll = video_poll,
  1519. .mmap = video_mmap,
  1520. .unlocked_ioctl = video_ioctl2,
  1521. };
  1522. static const struct v4l2_ioctl_ops video_ioctl_ops = {
  1523. .vidioc_querycap = vidioc_querycap,
  1524. .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
  1525. .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
  1526. .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
  1527. .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
  1528. .vidioc_g_fmt_vbi_cap = cx8800_vbi_fmt,
  1529. .vidioc_try_fmt_vbi_cap = cx8800_vbi_fmt,
  1530. .vidioc_s_fmt_vbi_cap = cx8800_vbi_fmt,
  1531. .vidioc_reqbufs = vidioc_reqbufs,
  1532. .vidioc_querybuf = vidioc_querybuf,
  1533. .vidioc_qbuf = vidioc_qbuf,
  1534. .vidioc_dqbuf = vidioc_dqbuf,
  1535. .vidioc_s_std = vidioc_s_std,
  1536. .vidioc_enum_input = vidioc_enum_input,
  1537. .vidioc_g_input = vidioc_g_input,
  1538. .vidioc_s_input = vidioc_s_input,
  1539. .vidioc_queryctrl = vidioc_queryctrl,
  1540. .vidioc_g_ctrl = vidioc_g_ctrl,
  1541. .vidioc_s_ctrl = vidioc_s_ctrl,
  1542. .vidioc_streamon = vidioc_streamon,
  1543. .vidioc_streamoff = vidioc_streamoff,
  1544. .vidioc_g_tuner = vidioc_g_tuner,
  1545. .vidioc_s_tuner = vidioc_s_tuner,
  1546. .vidioc_g_frequency = vidioc_g_frequency,
  1547. .vidioc_s_frequency = vidioc_s_frequency,
  1548. #ifdef CONFIG_VIDEO_ADV_DEBUG
  1549. .vidioc_g_register = vidioc_g_register,
  1550. .vidioc_s_register = vidioc_s_register,
  1551. #endif
  1552. };
  1553. static struct video_device cx8800_vbi_template;
  1554. static const struct video_device cx8800_video_template = {
  1555. .name = "cx8800-video",
  1556. .fops = &video_fops,
  1557. .ioctl_ops = &video_ioctl_ops,
  1558. .tvnorms = CX88_NORMS,
  1559. .current_norm = V4L2_STD_NTSC_M,
  1560. };
  1561. static const struct v4l2_file_operations radio_fops =
  1562. {
  1563. .owner = THIS_MODULE,
  1564. .open = video_open,
  1565. .release = video_release,
  1566. .unlocked_ioctl = video_ioctl2,
  1567. };
  1568. static const struct v4l2_ioctl_ops radio_ioctl_ops = {
  1569. .vidioc_querycap = radio_querycap,
  1570. .vidioc_g_tuner = radio_g_tuner,
  1571. .vidioc_enum_input = radio_enum_input,
  1572. .vidioc_g_audio = radio_g_audio,
  1573. .vidioc_s_tuner = radio_s_tuner,
  1574. .vidioc_s_audio = radio_s_audio,
  1575. .vidioc_s_input = radio_s_input,
  1576. .vidioc_queryctrl = radio_queryctrl,
  1577. .vidioc_g_ctrl = vidioc_g_ctrl,
  1578. .vidioc_s_ctrl = vidioc_s_ctrl,
  1579. .vidioc_g_frequency = vidioc_g_frequency,
  1580. .vidioc_s_frequency = vidioc_s_frequency,
  1581. #ifdef CONFIG_VIDEO_ADV_DEBUG
  1582. .vidioc_g_register = vidioc_g_register,
  1583. .vidioc_s_register = vidioc_s_register,
  1584. #endif
  1585. };
  1586. static const struct video_device cx8800_radio_template = {
  1587. .name = "cx8800-radio",
  1588. .fops = &radio_fops,
  1589. .ioctl_ops = &radio_ioctl_ops,
  1590. };
  1591. /* ----------------------------------------------------------- */
  1592. static void cx8800_unregister_video(struct cx8800_dev *dev)
  1593. {
  1594. if (dev->radio_dev) {
  1595. if (video_is_registered(dev->radio_dev))
  1596. video_unregister_device(dev->radio_dev);
  1597. else
  1598. video_device_release(dev->radio_dev);
  1599. dev->radio_dev = NULL;
  1600. }
  1601. if (dev->vbi_dev) {
  1602. if (video_is_registered(dev->vbi_dev))
  1603. video_unregister_device(dev->vbi_dev);
  1604. else
  1605. video_device_release(dev->vbi_dev);
  1606. dev->vbi_dev = NULL;
  1607. }
  1608. if (dev->video_dev) {
  1609. if (video_is_registered(dev->video_dev))
  1610. video_unregister_device(dev->video_dev);
  1611. else
  1612. video_device_release(dev->video_dev);
  1613. dev->video_dev = NULL;
  1614. }
  1615. }
  1616. static int __devinit cx8800_initdev(struct pci_dev *pci_dev,
  1617. const struct pci_device_id *pci_id)
  1618. {
  1619. struct cx8800_dev *dev;
  1620. struct cx88_core *core;
  1621. int err;
  1622. dev = kzalloc(sizeof(*dev),GFP_KERNEL);
  1623. if (NULL == dev)
  1624. return -ENOMEM;
  1625. /* pci init */
  1626. dev->pci = pci_dev;
  1627. if (pci_enable_device(pci_dev)) {
  1628. err = -EIO;
  1629. goto fail_free;
  1630. }
  1631. core = cx88_core_get(dev->pci);
  1632. if (NULL == core) {
  1633. err = -EINVAL;
  1634. goto fail_free;
  1635. }
  1636. dev->core = core;
  1637. /* print pci info */
  1638. dev->pci_rev = pci_dev->revision;
  1639. pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
  1640. printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, "
  1641. "latency: %d, mmio: 0x%llx\n", core->name,
  1642. pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
  1643. dev->pci_lat,(unsigned long long)pci_resource_start(pci_dev,0));
  1644. pci_set_master(pci_dev);
  1645. if (!pci_dma_supported(pci_dev,DMA_BIT_MASK(32))) {
  1646. printk("%s/0: Oops: no 32bit PCI DMA ???\n",core->name);
  1647. err = -EIO;
  1648. goto fail_core;
  1649. }
  1650. /* Initialize VBI template */
  1651. memcpy( &cx8800_vbi_template, &cx8800_video_template,
  1652. sizeof(cx8800_vbi_template) );
  1653. strcpy(cx8800_vbi_template.name,"cx8800-vbi");
  1654. /* initialize driver struct */
  1655. spin_lock_init(&dev->slock);
  1656. core->tvnorm = cx8800_video_template.current_norm;
  1657. /* init video dma queues */
  1658. INIT_LIST_HEAD(&dev->vidq.active);
  1659. INIT_LIST_HEAD(&dev->vidq.queued);
  1660. dev->vidq.timeout.function = cx8800_vid_timeout;
  1661. dev->vidq.timeout.data = (unsigned long)dev;
  1662. init_timer(&dev->vidq.timeout);
  1663. cx88_risc_stopper(dev->pci,&dev->vidq.stopper,
  1664. MO_VID_DMACNTRL,0x11,0x00);
  1665. /* init vbi dma queues */
  1666. INIT_LIST_HEAD(&dev->vbiq.active);
  1667. INIT_LIST_HEAD(&dev->vbiq.queued);
  1668. dev->vbiq.timeout.function = cx8800_vbi_timeout;
  1669. dev->vbiq.timeout.data = (unsigned long)dev;
  1670. init_timer(&dev->vbiq.timeout);
  1671. cx88_risc_stopper(dev->pci,&dev->vbiq.stopper,
  1672. MO_VID_DMACNTRL,0x88,0x00);
  1673. /* get irq */
  1674. err = request_irq(pci_dev->irq, cx8800_irq,
  1675. IRQF_SHARED | IRQF_DISABLED, core->name, dev);
  1676. if (err < 0) {
  1677. printk(KERN_ERR "%s/0: can't get IRQ %d\n",
  1678. core->name,pci_dev->irq);
  1679. goto fail_core;
  1680. }
  1681. cx_set(MO_PCI_INTMSK, core->pci_irqmask);
  1682. /* load and configure helper modules */
  1683. if (core->board.audio_chip == V4L2_IDENT_WM8775) {
  1684. struct i2c_board_info wm8775_info = {
  1685. .type = "wm8775",
  1686. .addr = 0x36 >> 1,
  1687. .platform_data = &core->wm8775_data,
  1688. };
  1689. struct v4l2_subdev *sd;
  1690. if (core->boardnr == CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1)
  1691. core->wm8775_data.is_nova_s = true;
  1692. else
  1693. core->wm8775_data.is_nova_s = false;
  1694. sd = v4l2_i2c_new_subdev_board(&core->v4l2_dev, &core->i2c_adap,
  1695. &wm8775_info, NULL);
  1696. if (sd != NULL)
  1697. sd->grp_id = WM8775_GID;
  1698. }
  1699. if (core->board.audio_chip == V4L2_IDENT_TVAUDIO) {
  1700. /* This probes for a tda9874 as is used on some
  1701. Pixelview Ultra boards. */
  1702. v4l2_i2c_new_subdev(&core->v4l2_dev, &core->i2c_adap,
  1703. "tvaudio", 0, I2C_ADDRS(0xb0 >> 1));
  1704. }
  1705. switch (core->boardnr) {
  1706. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  1707. case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD: {
  1708. static const struct i2c_board_info rtc_info = {
  1709. I2C_BOARD_INFO("isl1208", 0x6f)
  1710. };
  1711. request_module("rtc-isl1208");
  1712. core->i2c_rtc = i2c_new_device(&core->i2c_adap, &rtc_info);
  1713. }
  1714. /* break intentionally omitted */
  1715. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  1716. request_module("ir-kbd-i2c");
  1717. }
  1718. /* Sets device info at pci_dev */
  1719. pci_set_drvdata(pci_dev, dev);
  1720. /* initial device configuration */
  1721. mutex_lock(&core->lock);
  1722. cx88_set_tvnorm(core, core->tvnorm);
  1723. init_controls(core);
  1724. cx88_video_mux(core, 0);
  1725. /* register v4l devices */
  1726. dev->video_dev = cx88_vdev_init(core,dev->pci,
  1727. &cx8800_video_template,"video");
  1728. video_set_drvdata(dev->video_dev, dev);
  1729. err = video_register_device(dev->video_dev,VFL_TYPE_GRABBER,
  1730. video_nr[core->nr]);
  1731. if (err < 0) {
  1732. printk(KERN_ERR "%s/0: can't register video device\n",
  1733. core->name);
  1734. goto fail_unreg;
  1735. }
  1736. printk(KERN_INFO "%s/0: registered device %s [v4l2]\n",
  1737. core->name, video_device_node_name(dev->video_dev));
  1738. dev->vbi_dev = cx88_vdev_init(core,dev->pci,&cx8800_vbi_template,"vbi");
  1739. video_set_drvdata(dev->vbi_dev, dev);
  1740. err = video_register_device(dev->vbi_dev,VFL_TYPE_VBI,
  1741. vbi_nr[core->nr]);
  1742. if (err < 0) {
  1743. printk(KERN_ERR "%s/0: can't register vbi device\n",
  1744. core->name);
  1745. goto fail_unreg;
  1746. }
  1747. printk(KERN_INFO "%s/0: registered device %s\n",
  1748. core->name, video_device_node_name(dev->vbi_dev));
  1749. if (core->board.radio.type == CX88_RADIO) {
  1750. dev->radio_dev = cx88_vdev_init(core,dev->pci,
  1751. &cx8800_radio_template,"radio");
  1752. video_set_drvdata(dev->radio_dev, dev);
  1753. err = video_register_device(dev->radio_dev,VFL_TYPE_RADIO,
  1754. radio_nr[core->nr]);
  1755. if (err < 0) {
  1756. printk(KERN_ERR "%s/0: can't register radio device\n",
  1757. core->name);
  1758. goto fail_unreg;
  1759. }
  1760. printk(KERN_INFO "%s/0: registered device %s\n",
  1761. core->name, video_device_node_name(dev->radio_dev));
  1762. }
  1763. /* start tvaudio thread */
  1764. if (core->board.tuner_type != TUNER_ABSENT) {
  1765. core->kthread = kthread_run(cx88_audio_thread, core, "cx88 tvaudio");
  1766. if (IS_ERR(core->kthread)) {
  1767. err = PTR_ERR(core->kthread);
  1768. printk(KERN_ERR "%s/0: failed to create cx88 audio thread, err=%d\n",
  1769. core->name, err);
  1770. }
  1771. }
  1772. mutex_unlock(&core->lock);
  1773. return 0;
  1774. fail_unreg:
  1775. cx8800_unregister_video(dev);
  1776. free_irq(pci_dev->irq, dev);
  1777. mutex_unlock(&core->lock);
  1778. fail_core:
  1779. cx88_core_put(core,dev->pci);
  1780. fail_free:
  1781. kfree(dev);
  1782. return err;
  1783. }
  1784. static void __devexit cx8800_finidev(struct pci_dev *pci_dev)
  1785. {
  1786. struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
  1787. struct cx88_core *core = dev->core;
  1788. /* stop thread */
  1789. if (core->kthread) {
  1790. kthread_stop(core->kthread);
  1791. core->kthread = NULL;
  1792. }
  1793. if (core->ir)
  1794. cx88_ir_stop(core);
  1795. cx88_shutdown(core); /* FIXME */
  1796. pci_disable_device(pci_dev);
  1797. /* unregister stuff */
  1798. free_irq(pci_dev->irq, dev);
  1799. cx8800_unregister_video(dev);
  1800. pci_set_drvdata(pci_dev, NULL);
  1801. /* free memory */
  1802. btcx_riscmem_free(dev->pci,&dev->vidq.stopper);
  1803. cx88_core_put(core,dev->pci);
  1804. kfree(dev);
  1805. }
  1806. #ifdef CONFIG_PM
  1807. static int cx8800_suspend(struct pci_dev *pci_dev, pm_message_t state)
  1808. {
  1809. struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
  1810. struct cx88_core *core = dev->core;
  1811. /* stop video+vbi capture */
  1812. spin_lock(&dev->slock);
  1813. if (!list_empty(&dev->vidq.active)) {
  1814. printk("%s/0: suspend video\n", core->name);
  1815. stop_video_dma(dev);
  1816. del_timer(&dev->vidq.timeout);
  1817. }
  1818. if (!list_empty(&dev->vbiq.active)) {
  1819. printk("%s/0: suspend vbi\n", core->name);
  1820. cx8800_stop_vbi_dma(dev);
  1821. del_timer(&dev->vbiq.timeout);
  1822. }
  1823. spin_unlock(&dev->slock);
  1824. if (core->ir)
  1825. cx88_ir_stop(core);
  1826. /* FIXME -- shutdown device */
  1827. cx88_shutdown(core);
  1828. pci_save_state(pci_dev);
  1829. if (0 != pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state))) {
  1830. pci_disable_device(pci_dev);
  1831. dev->state.disabled = 1;
  1832. }
  1833. return 0;
  1834. }
  1835. static int cx8800_resume(struct pci_dev *pci_dev)
  1836. {
  1837. struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
  1838. struct cx88_core *core = dev->core;
  1839. int err;
  1840. if (dev->state.disabled) {
  1841. err=pci_enable_device(pci_dev);
  1842. if (err) {
  1843. printk(KERN_ERR "%s/0: can't enable device\n",
  1844. core->name);
  1845. return err;
  1846. }
  1847. dev->state.disabled = 0;
  1848. }
  1849. err= pci_set_power_state(pci_dev, PCI_D0);
  1850. if (err) {
  1851. printk(KERN_ERR "%s/0: can't set power state\n", core->name);
  1852. pci_disable_device(pci_dev);
  1853. dev->state.disabled = 1;
  1854. return err;
  1855. }
  1856. pci_restore_state(pci_dev);
  1857. /* FIXME: re-initialize hardware */
  1858. cx88_reset(core);
  1859. if (core->ir)
  1860. cx88_ir_start(core);
  1861. cx_set(MO_PCI_INTMSK, core->pci_irqmask);
  1862. /* restart video+vbi capture */
  1863. spin_lock(&dev->slock);
  1864. if (!list_empty(&dev->vidq.active)) {
  1865. printk("%s/0: resume video\n", core->name);
  1866. restart_video_queue(dev,&dev->vidq);
  1867. }
  1868. if (!list_empty(&dev->vbiq.active)) {
  1869. printk("%s/0: resume vbi\n", core->name);
  1870. cx8800_restart_vbi_queue(dev,&dev->vbiq);
  1871. }
  1872. spin_unlock(&dev->slock);
  1873. return 0;
  1874. }
  1875. #endif
  1876. /* ----------------------------------------------------------- */
  1877. static const struct pci_device_id cx8800_pci_tbl[] = {
  1878. {
  1879. .vendor = 0x14f1,
  1880. .device = 0x8800,
  1881. .subvendor = PCI_ANY_ID,
  1882. .subdevice = PCI_ANY_ID,
  1883. },{
  1884. /* --- end of list --- */
  1885. }
  1886. };
  1887. MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl);
  1888. static struct pci_driver cx8800_pci_driver = {
  1889. .name = "cx8800",
  1890. .id_table = cx8800_pci_tbl,
  1891. .probe = cx8800_initdev,
  1892. .remove = __devexit_p(cx8800_finidev),
  1893. #ifdef CONFIG_PM
  1894. .suspend = cx8800_suspend,
  1895. .resume = cx8800_resume,
  1896. #endif
  1897. };
  1898. static int __init cx8800_init(void)
  1899. {
  1900. printk(KERN_INFO "cx88/0: cx2388x v4l2 driver version %s loaded\n",
  1901. CX88_VERSION);
  1902. return pci_register_driver(&cx8800_pci_driver);
  1903. }
  1904. static void __exit cx8800_fini(void)
  1905. {
  1906. pci_unregister_driver(&cx8800_pci_driver);
  1907. }
  1908. module_init(cx8800_init);
  1909. module_exit(cx8800_fini);