processor_idle.c 46 KB

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  1. /*
  2. * processor_idle - idle state submodule to the ACPI processor driver
  3. *
  4. * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
  5. * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
  6. * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
  7. * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
  8. * - Added processor hotplug support
  9. * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
  10. * - Added support for C3 on SMP
  11. *
  12. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or (at
  17. * your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful, but
  20. * WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  22. * General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License along
  25. * with this program; if not, write to the Free Software Foundation, Inc.,
  26. * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  27. *
  28. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  29. */
  30. #include <linux/kernel.h>
  31. #include <linux/module.h>
  32. #include <linux/init.h>
  33. #include <linux/cpufreq.h>
  34. #include <linux/proc_fs.h>
  35. #include <linux/seq_file.h>
  36. #include <linux/acpi.h>
  37. #include <linux/dmi.h>
  38. #include <linux/moduleparam.h>
  39. #include <linux/sched.h> /* need_resched() */
  40. #include <linux/latency.h>
  41. #include <linux/clockchips.h>
  42. #include <linux/cpuidle.h>
  43. /*
  44. * Include the apic definitions for x86 to have the APIC timer related defines
  45. * available also for UP (on SMP it gets magically included via linux/smp.h).
  46. * asm/acpi.h is not an option, as it would require more include magic. Also
  47. * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
  48. */
  49. #ifdef CONFIG_X86
  50. #include <asm/apic.h>
  51. #endif
  52. #include <asm/io.h>
  53. #include <asm/uaccess.h>
  54. #include <acpi/acpi_bus.h>
  55. #include <acpi/processor.h>
  56. #define ACPI_PROCESSOR_COMPONENT 0x01000000
  57. #define ACPI_PROCESSOR_CLASS "processor"
  58. #define _COMPONENT ACPI_PROCESSOR_COMPONENT
  59. ACPI_MODULE_NAME("processor_idle");
  60. #define ACPI_PROCESSOR_FILE_POWER "power"
  61. #define US_TO_PM_TIMER_TICKS(t) ((t * (PM_TIMER_FREQUENCY/1000)) / 1000)
  62. #define PM_TIMER_TICK_NS (1000000000ULL/PM_TIMER_FREQUENCY)
  63. #ifndef CONFIG_CPU_IDLE
  64. #define C2_OVERHEAD 4 /* 1us (3.579 ticks per us) */
  65. #define C3_OVERHEAD 4 /* 1us (3.579 ticks per us) */
  66. static void (*pm_idle_save) (void) __read_mostly;
  67. #else
  68. #define C2_OVERHEAD 1 /* 1us */
  69. #define C3_OVERHEAD 1 /* 1us */
  70. #endif
  71. #define PM_TIMER_TICKS_TO_US(p) (((p) * 1000)/(PM_TIMER_FREQUENCY/1000))
  72. static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
  73. #ifdef CONFIG_CPU_IDLE
  74. module_param(max_cstate, uint, 0000);
  75. #else
  76. module_param(max_cstate, uint, 0644);
  77. #endif
  78. static unsigned int nocst __read_mostly;
  79. module_param(nocst, uint, 0000);
  80. #ifndef CONFIG_CPU_IDLE
  81. /*
  82. * bm_history -- bit-mask with a bit per jiffy of bus-master activity
  83. * 1000 HZ: 0xFFFFFFFF: 32 jiffies = 32ms
  84. * 800 HZ: 0xFFFFFFFF: 32 jiffies = 40ms
  85. * 100 HZ: 0x0000000F: 4 jiffies = 40ms
  86. * reduce history for more aggressive entry into C3
  87. */
  88. static unsigned int bm_history __read_mostly =
  89. (HZ >= 800 ? 0xFFFFFFFF : ((1U << (HZ / 25)) - 1));
  90. module_param(bm_history, uint, 0644);
  91. static int acpi_processor_set_power_policy(struct acpi_processor *pr);
  92. #endif
  93. /*
  94. * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
  95. * For now disable this. Probably a bug somewhere else.
  96. *
  97. * To skip this limit, boot/load with a large max_cstate limit.
  98. */
  99. static int set_max_cstate(const struct dmi_system_id *id)
  100. {
  101. if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
  102. return 0;
  103. printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
  104. " Override with \"processor.max_cstate=%d\"\n", id->ident,
  105. (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
  106. max_cstate = (long)id->driver_data;
  107. return 0;
  108. }
  109. /* Actually this shouldn't be __cpuinitdata, would be better to fix the
  110. callers to only run once -AK */
  111. static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
  112. { set_max_cstate, "IBM ThinkPad R40e", {
  113. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  114. DMI_MATCH(DMI_BIOS_VERSION,"1SET70WW")}, (void *)1},
  115. { set_max_cstate, "IBM ThinkPad R40e", {
  116. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  117. DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW")}, (void *)1},
  118. { set_max_cstate, "IBM ThinkPad R40e", {
  119. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  120. DMI_MATCH(DMI_BIOS_VERSION,"1SET43WW") }, (void*)1},
  121. { set_max_cstate, "IBM ThinkPad R40e", {
  122. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  123. DMI_MATCH(DMI_BIOS_VERSION,"1SET45WW") }, (void*)1},
  124. { set_max_cstate, "IBM ThinkPad R40e", {
  125. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  126. DMI_MATCH(DMI_BIOS_VERSION,"1SET47WW") }, (void*)1},
  127. { set_max_cstate, "IBM ThinkPad R40e", {
  128. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  129. DMI_MATCH(DMI_BIOS_VERSION,"1SET50WW") }, (void*)1},
  130. { set_max_cstate, "IBM ThinkPad R40e", {
  131. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  132. DMI_MATCH(DMI_BIOS_VERSION,"1SET52WW") }, (void*)1},
  133. { set_max_cstate, "IBM ThinkPad R40e", {
  134. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  135. DMI_MATCH(DMI_BIOS_VERSION,"1SET55WW") }, (void*)1},
  136. { set_max_cstate, "IBM ThinkPad R40e", {
  137. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  138. DMI_MATCH(DMI_BIOS_VERSION,"1SET56WW") }, (void*)1},
  139. { set_max_cstate, "IBM ThinkPad R40e", {
  140. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  141. DMI_MATCH(DMI_BIOS_VERSION,"1SET59WW") }, (void*)1},
  142. { set_max_cstate, "IBM ThinkPad R40e", {
  143. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  144. DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW") }, (void*)1},
  145. { set_max_cstate, "IBM ThinkPad R40e", {
  146. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  147. DMI_MATCH(DMI_BIOS_VERSION,"1SET61WW") }, (void*)1},
  148. { set_max_cstate, "IBM ThinkPad R40e", {
  149. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  150. DMI_MATCH(DMI_BIOS_VERSION,"1SET62WW") }, (void*)1},
  151. { set_max_cstate, "IBM ThinkPad R40e", {
  152. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  153. DMI_MATCH(DMI_BIOS_VERSION,"1SET64WW") }, (void*)1},
  154. { set_max_cstate, "IBM ThinkPad R40e", {
  155. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  156. DMI_MATCH(DMI_BIOS_VERSION,"1SET65WW") }, (void*)1},
  157. { set_max_cstate, "IBM ThinkPad R40e", {
  158. DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
  159. DMI_MATCH(DMI_BIOS_VERSION,"1SET68WW") }, (void*)1},
  160. { set_max_cstate, "Medion 41700", {
  161. DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
  162. DMI_MATCH(DMI_BIOS_VERSION,"R01-A1J")}, (void *)1},
  163. { set_max_cstate, "Clevo 5600D", {
  164. DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
  165. DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
  166. (void *)2},
  167. {},
  168. };
  169. static inline u32 ticks_elapsed(u32 t1, u32 t2)
  170. {
  171. if (t2 >= t1)
  172. return (t2 - t1);
  173. else if (!(acpi_gbl_FADT.flags & ACPI_FADT_32BIT_TIMER))
  174. return (((0x00FFFFFF - t1) + t2) & 0x00FFFFFF);
  175. else
  176. return ((0xFFFFFFFF - t1) + t2);
  177. }
  178. static inline u32 ticks_elapsed_in_us(u32 t1, u32 t2)
  179. {
  180. if (t2 >= t1)
  181. return PM_TIMER_TICKS_TO_US(t2 - t1);
  182. else if (!(acpi_gbl_FADT.flags & ACPI_FADT_32BIT_TIMER))
  183. return PM_TIMER_TICKS_TO_US(((0x00FFFFFF - t1) + t2) & 0x00FFFFFF);
  184. else
  185. return PM_TIMER_TICKS_TO_US((0xFFFFFFFF - t1) + t2);
  186. }
  187. static void acpi_safe_halt(void)
  188. {
  189. current_thread_info()->status &= ~TS_POLLING;
  190. /*
  191. * TS_POLLING-cleared state must be visible before we
  192. * test NEED_RESCHED:
  193. */
  194. smp_mb();
  195. if (!need_resched())
  196. safe_halt();
  197. current_thread_info()->status |= TS_POLLING;
  198. }
  199. #ifndef CONFIG_CPU_IDLE
  200. static void
  201. acpi_processor_power_activate(struct acpi_processor *pr,
  202. struct acpi_processor_cx *new)
  203. {
  204. struct acpi_processor_cx *old;
  205. if (!pr || !new)
  206. return;
  207. old = pr->power.state;
  208. if (old)
  209. old->promotion.count = 0;
  210. new->demotion.count = 0;
  211. /* Cleanup from old state. */
  212. if (old) {
  213. switch (old->type) {
  214. case ACPI_STATE_C3:
  215. /* Disable bus master reload */
  216. if (new->type != ACPI_STATE_C3 && pr->flags.bm_check)
  217. acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0);
  218. break;
  219. }
  220. }
  221. /* Prepare to use new state. */
  222. switch (new->type) {
  223. case ACPI_STATE_C3:
  224. /* Enable bus master reload */
  225. if (old->type != ACPI_STATE_C3 && pr->flags.bm_check)
  226. acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
  227. break;
  228. }
  229. pr->power.state = new;
  230. return;
  231. }
  232. static atomic_t c3_cpu_count;
  233. /* Common C-state entry for C2, C3, .. */
  234. static void acpi_cstate_enter(struct acpi_processor_cx *cstate)
  235. {
  236. if (cstate->space_id == ACPI_CSTATE_FFH) {
  237. /* Call into architectural FFH based C-state */
  238. acpi_processor_ffh_cstate_enter(cstate);
  239. } else {
  240. int unused;
  241. /* IO port based C-state */
  242. inb(cstate->address);
  243. /* Dummy wait op - must do something useless after P_LVL2 read
  244. because chipsets cannot guarantee that STPCLK# signal
  245. gets asserted in time to freeze execution properly. */
  246. unused = inl(acpi_gbl_FADT.xpm_timer_block.address);
  247. }
  248. }
  249. #endif /* !CONFIG_CPU_IDLE */
  250. #ifdef ARCH_APICTIMER_STOPS_ON_C3
  251. /*
  252. * Some BIOS implementations switch to C3 in the published C2 state.
  253. * This seems to be a common problem on AMD boxen, but other vendors
  254. * are affected too. We pick the most conservative approach: we assume
  255. * that the local APIC stops in both C2 and C3.
  256. */
  257. static void acpi_timer_check_state(int state, struct acpi_processor *pr,
  258. struct acpi_processor_cx *cx)
  259. {
  260. struct acpi_processor_power *pwr = &pr->power;
  261. u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
  262. /*
  263. * Check, if one of the previous states already marked the lapic
  264. * unstable
  265. */
  266. if (pwr->timer_broadcast_on_state < state)
  267. return;
  268. if (cx->type >= type)
  269. pr->power.timer_broadcast_on_state = state;
  270. }
  271. static void acpi_propagate_timer_broadcast(struct acpi_processor *pr)
  272. {
  273. unsigned long reason;
  274. reason = pr->power.timer_broadcast_on_state < INT_MAX ?
  275. CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
  276. clockevents_notify(reason, &pr->id);
  277. }
  278. /* Power(C) State timer broadcast control */
  279. static void acpi_state_timer_broadcast(struct acpi_processor *pr,
  280. struct acpi_processor_cx *cx,
  281. int broadcast)
  282. {
  283. int state = cx - pr->power.states;
  284. if (state >= pr->power.timer_broadcast_on_state) {
  285. unsigned long reason;
  286. reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
  287. CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
  288. clockevents_notify(reason, &pr->id);
  289. }
  290. }
  291. #else
  292. static void acpi_timer_check_state(int state, struct acpi_processor *pr,
  293. struct acpi_processor_cx *cstate) { }
  294. static void acpi_propagate_timer_broadcast(struct acpi_processor *pr) { }
  295. static void acpi_state_timer_broadcast(struct acpi_processor *pr,
  296. struct acpi_processor_cx *cx,
  297. int broadcast)
  298. {
  299. }
  300. #endif
  301. /*
  302. * Suspend / resume control
  303. */
  304. static int acpi_idle_suspend;
  305. int acpi_processor_suspend(struct acpi_device * device, pm_message_t state)
  306. {
  307. acpi_idle_suspend = 1;
  308. return 0;
  309. }
  310. int acpi_processor_resume(struct acpi_device * device)
  311. {
  312. acpi_idle_suspend = 0;
  313. return 0;
  314. }
  315. #ifndef CONFIG_CPU_IDLE
  316. static void acpi_processor_idle(void)
  317. {
  318. struct acpi_processor *pr = NULL;
  319. struct acpi_processor_cx *cx = NULL;
  320. struct acpi_processor_cx *next_state = NULL;
  321. int sleep_ticks = 0;
  322. u32 t1, t2 = 0;
  323. /*
  324. * Interrupts must be disabled during bus mastering calculations and
  325. * for C2/C3 transitions.
  326. */
  327. local_irq_disable();
  328. pr = processors[smp_processor_id()];
  329. if (!pr) {
  330. local_irq_enable();
  331. return;
  332. }
  333. /*
  334. * Check whether we truly need to go idle, or should
  335. * reschedule:
  336. */
  337. if (unlikely(need_resched())) {
  338. local_irq_enable();
  339. return;
  340. }
  341. cx = pr->power.state;
  342. if (!cx || acpi_idle_suspend) {
  343. if (pm_idle_save)
  344. pm_idle_save();
  345. else
  346. acpi_safe_halt();
  347. return;
  348. }
  349. /*
  350. * Check BM Activity
  351. * -----------------
  352. * Check for bus mastering activity (if required), record, and check
  353. * for demotion.
  354. */
  355. if (pr->flags.bm_check) {
  356. u32 bm_status = 0;
  357. unsigned long diff = jiffies - pr->power.bm_check_timestamp;
  358. if (diff > 31)
  359. diff = 31;
  360. pr->power.bm_activity <<= diff;
  361. acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
  362. if (bm_status) {
  363. pr->power.bm_activity |= 0x1;
  364. acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
  365. }
  366. /*
  367. * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
  368. * the true state of bus mastering activity; forcing us to
  369. * manually check the BMIDEA bit of each IDE channel.
  370. */
  371. else if (errata.piix4.bmisx) {
  372. if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
  373. || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
  374. pr->power.bm_activity |= 0x1;
  375. }
  376. pr->power.bm_check_timestamp = jiffies;
  377. /*
  378. * If bus mastering is or was active this jiffy, demote
  379. * to avoid a faulty transition. Note that the processor
  380. * won't enter a low-power state during this call (to this
  381. * function) but should upon the next.
  382. *
  383. * TBD: A better policy might be to fallback to the demotion
  384. * state (use it for this quantum only) istead of
  385. * demoting -- and rely on duration as our sole demotion
  386. * qualification. This may, however, introduce DMA
  387. * issues (e.g. floppy DMA transfer overrun/underrun).
  388. */
  389. if ((pr->power.bm_activity & 0x1) &&
  390. cx->demotion.threshold.bm) {
  391. local_irq_enable();
  392. next_state = cx->demotion.state;
  393. goto end;
  394. }
  395. }
  396. #ifdef CONFIG_HOTPLUG_CPU
  397. /*
  398. * Check for P_LVL2_UP flag before entering C2 and above on
  399. * an SMP system. We do it here instead of doing it at _CST/P_LVL
  400. * detection phase, to work cleanly with logical CPU hotplug.
  401. */
  402. if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
  403. !pr->flags.has_cst && !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
  404. cx = &pr->power.states[ACPI_STATE_C1];
  405. #endif
  406. /*
  407. * Sleep:
  408. * ------
  409. * Invoke the current Cx state to put the processor to sleep.
  410. */
  411. if (cx->type == ACPI_STATE_C2 || cx->type == ACPI_STATE_C3) {
  412. current_thread_info()->status &= ~TS_POLLING;
  413. /*
  414. * TS_POLLING-cleared state must be visible before we
  415. * test NEED_RESCHED:
  416. */
  417. smp_mb();
  418. if (need_resched()) {
  419. current_thread_info()->status |= TS_POLLING;
  420. local_irq_enable();
  421. return;
  422. }
  423. }
  424. switch (cx->type) {
  425. case ACPI_STATE_C1:
  426. /*
  427. * Invoke C1.
  428. * Use the appropriate idle routine, the one that would
  429. * be used without acpi C-states.
  430. */
  431. if (pm_idle_save)
  432. pm_idle_save();
  433. else
  434. acpi_safe_halt();
  435. /*
  436. * TBD: Can't get time duration while in C1, as resumes
  437. * go to an ISR rather than here. Need to instrument
  438. * base interrupt handler.
  439. *
  440. * Note: the TSC better not stop in C1, sched_clock() will
  441. * skew otherwise.
  442. */
  443. sleep_ticks = 0xFFFFFFFF;
  444. break;
  445. case ACPI_STATE_C2:
  446. /* Get start time (ticks) */
  447. t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
  448. /* Tell the scheduler that we are going deep-idle: */
  449. sched_clock_idle_sleep_event();
  450. /* Invoke C2 */
  451. acpi_state_timer_broadcast(pr, cx, 1);
  452. acpi_cstate_enter(cx);
  453. /* Get end time (ticks) */
  454. t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
  455. #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86_TSC)
  456. /* TSC halts in C2, so notify users */
  457. mark_tsc_unstable("possible TSC halt in C2");
  458. #endif
  459. /* Compute time (ticks) that we were actually asleep */
  460. sleep_ticks = ticks_elapsed(t1, t2);
  461. /* Tell the scheduler how much we idled: */
  462. sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
  463. /* Re-enable interrupts */
  464. local_irq_enable();
  465. /* Do not account our idle-switching overhead: */
  466. sleep_ticks -= cx->latency_ticks + C2_OVERHEAD;
  467. current_thread_info()->status |= TS_POLLING;
  468. acpi_state_timer_broadcast(pr, cx, 0);
  469. break;
  470. case ACPI_STATE_C3:
  471. acpi_unlazy_tlb(smp_processor_id());
  472. /*
  473. * Must be done before busmaster disable as we might
  474. * need to access HPET !
  475. */
  476. acpi_state_timer_broadcast(pr, cx, 1);
  477. /*
  478. * disable bus master
  479. * bm_check implies we need ARB_DIS
  480. * !bm_check implies we need cache flush
  481. * bm_control implies whether we can do ARB_DIS
  482. *
  483. * That leaves a case where bm_check is set and bm_control is
  484. * not set. In that case we cannot do much, we enter C3
  485. * without doing anything.
  486. */
  487. if (pr->flags.bm_check && pr->flags.bm_control) {
  488. if (atomic_inc_return(&c3_cpu_count) ==
  489. num_online_cpus()) {
  490. /*
  491. * All CPUs are trying to go to C3
  492. * Disable bus master arbitration
  493. */
  494. acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1);
  495. }
  496. } else if (!pr->flags.bm_check) {
  497. /* SMP with no shared cache... Invalidate cache */
  498. ACPI_FLUSH_CPU_CACHE();
  499. }
  500. /* Get start time (ticks) */
  501. t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
  502. /* Invoke C3 */
  503. /* Tell the scheduler that we are going deep-idle: */
  504. sched_clock_idle_sleep_event();
  505. acpi_cstate_enter(cx);
  506. /* Get end time (ticks) */
  507. t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
  508. if (pr->flags.bm_check && pr->flags.bm_control) {
  509. /* Enable bus master arbitration */
  510. atomic_dec(&c3_cpu_count);
  511. acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0);
  512. }
  513. #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86_TSC)
  514. /* TSC halts in C3, so notify users */
  515. mark_tsc_unstable("TSC halts in C3");
  516. #endif
  517. /* Compute time (ticks) that we were actually asleep */
  518. sleep_ticks = ticks_elapsed(t1, t2);
  519. /* Tell the scheduler how much we idled: */
  520. sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
  521. /* Re-enable interrupts */
  522. local_irq_enable();
  523. /* Do not account our idle-switching overhead: */
  524. sleep_ticks -= cx->latency_ticks + C3_OVERHEAD;
  525. current_thread_info()->status |= TS_POLLING;
  526. acpi_state_timer_broadcast(pr, cx, 0);
  527. break;
  528. default:
  529. local_irq_enable();
  530. return;
  531. }
  532. cx->usage++;
  533. if ((cx->type != ACPI_STATE_C1) && (sleep_ticks > 0))
  534. cx->time += sleep_ticks;
  535. next_state = pr->power.state;
  536. #ifdef CONFIG_HOTPLUG_CPU
  537. /* Don't do promotion/demotion */
  538. if ((cx->type == ACPI_STATE_C1) && (num_online_cpus() > 1) &&
  539. !pr->flags.has_cst && !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) {
  540. next_state = cx;
  541. goto end;
  542. }
  543. #endif
  544. /*
  545. * Promotion?
  546. * ----------
  547. * Track the number of longs (time asleep is greater than threshold)
  548. * and promote when the count threshold is reached. Note that bus
  549. * mastering activity may prevent promotions.
  550. * Do not promote above max_cstate.
  551. */
  552. if (cx->promotion.state &&
  553. ((cx->promotion.state - pr->power.states) <= max_cstate)) {
  554. if (sleep_ticks > cx->promotion.threshold.ticks &&
  555. cx->promotion.state->latency <= system_latency_constraint()) {
  556. cx->promotion.count++;
  557. cx->demotion.count = 0;
  558. if (cx->promotion.count >=
  559. cx->promotion.threshold.count) {
  560. if (pr->flags.bm_check) {
  561. if (!
  562. (pr->power.bm_activity & cx->
  563. promotion.threshold.bm)) {
  564. next_state =
  565. cx->promotion.state;
  566. goto end;
  567. }
  568. } else {
  569. next_state = cx->promotion.state;
  570. goto end;
  571. }
  572. }
  573. }
  574. }
  575. /*
  576. * Demotion?
  577. * ---------
  578. * Track the number of shorts (time asleep is less than time threshold)
  579. * and demote when the usage threshold is reached.
  580. */
  581. if (cx->demotion.state) {
  582. if (sleep_ticks < cx->demotion.threshold.ticks) {
  583. cx->demotion.count++;
  584. cx->promotion.count = 0;
  585. if (cx->demotion.count >= cx->demotion.threshold.count) {
  586. next_state = cx->demotion.state;
  587. goto end;
  588. }
  589. }
  590. }
  591. end:
  592. /*
  593. * Demote if current state exceeds max_cstate
  594. * or if the latency of the current state is unacceptable
  595. */
  596. if ((pr->power.state - pr->power.states) > max_cstate ||
  597. pr->power.state->latency > system_latency_constraint()) {
  598. if (cx->demotion.state)
  599. next_state = cx->demotion.state;
  600. }
  601. /*
  602. * New Cx State?
  603. * -------------
  604. * If we're going to start using a new Cx state we must clean up
  605. * from the previous and prepare to use the new.
  606. */
  607. if (next_state != pr->power.state)
  608. acpi_processor_power_activate(pr, next_state);
  609. }
  610. static int acpi_processor_set_power_policy(struct acpi_processor *pr)
  611. {
  612. unsigned int i;
  613. unsigned int state_is_set = 0;
  614. struct acpi_processor_cx *lower = NULL;
  615. struct acpi_processor_cx *higher = NULL;
  616. struct acpi_processor_cx *cx;
  617. if (!pr)
  618. return -EINVAL;
  619. /*
  620. * This function sets the default Cx state policy (OS idle handler).
  621. * Our scheme is to promote quickly to C2 but more conservatively
  622. * to C3. We're favoring C2 for its characteristics of low latency
  623. * (quick response), good power savings, and ability to allow bus
  624. * mastering activity. Note that the Cx state policy is completely
  625. * customizable and can be altered dynamically.
  626. */
  627. /* startup state */
  628. for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
  629. cx = &pr->power.states[i];
  630. if (!cx->valid)
  631. continue;
  632. if (!state_is_set)
  633. pr->power.state = cx;
  634. state_is_set++;
  635. break;
  636. }
  637. if (!state_is_set)
  638. return -ENODEV;
  639. /* demotion */
  640. for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
  641. cx = &pr->power.states[i];
  642. if (!cx->valid)
  643. continue;
  644. if (lower) {
  645. cx->demotion.state = lower;
  646. cx->demotion.threshold.ticks = cx->latency_ticks;
  647. cx->demotion.threshold.count = 1;
  648. if (cx->type == ACPI_STATE_C3)
  649. cx->demotion.threshold.bm = bm_history;
  650. }
  651. lower = cx;
  652. }
  653. /* promotion */
  654. for (i = (ACPI_PROCESSOR_MAX_POWER - 1); i > 0; i--) {
  655. cx = &pr->power.states[i];
  656. if (!cx->valid)
  657. continue;
  658. if (higher) {
  659. cx->promotion.state = higher;
  660. cx->promotion.threshold.ticks = cx->latency_ticks;
  661. if (cx->type >= ACPI_STATE_C2)
  662. cx->promotion.threshold.count = 4;
  663. else
  664. cx->promotion.threshold.count = 10;
  665. if (higher->type == ACPI_STATE_C3)
  666. cx->promotion.threshold.bm = bm_history;
  667. }
  668. higher = cx;
  669. }
  670. return 0;
  671. }
  672. #endif /* !CONFIG_CPU_IDLE */
  673. static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
  674. {
  675. if (!pr)
  676. return -EINVAL;
  677. if (!pr->pblk)
  678. return -ENODEV;
  679. /* if info is obtained from pblk/fadt, type equals state */
  680. pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
  681. pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
  682. #ifndef CONFIG_HOTPLUG_CPU
  683. /*
  684. * Check for P_LVL2_UP flag before entering C2 and above on
  685. * an SMP system.
  686. */
  687. if ((num_online_cpus() > 1) &&
  688. !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
  689. return -ENODEV;
  690. #endif
  691. /* determine C2 and C3 address from pblk */
  692. pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
  693. pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
  694. /* determine latencies from FADT */
  695. pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
  696. pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
  697. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  698. "lvl2[0x%08x] lvl3[0x%08x]\n",
  699. pr->power.states[ACPI_STATE_C2].address,
  700. pr->power.states[ACPI_STATE_C3].address));
  701. return 0;
  702. }
  703. static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
  704. {
  705. if (!pr->power.states[ACPI_STATE_C1].valid) {
  706. /* set the first C-State to C1 */
  707. /* all processors need to support C1 */
  708. pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
  709. pr->power.states[ACPI_STATE_C1].valid = 1;
  710. }
  711. /* the C0 state only exists as a filler in our array */
  712. pr->power.states[ACPI_STATE_C0].valid = 1;
  713. return 0;
  714. }
  715. static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
  716. {
  717. acpi_status status = 0;
  718. acpi_integer count;
  719. int current_count;
  720. int i;
  721. struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
  722. union acpi_object *cst;
  723. if (nocst)
  724. return -ENODEV;
  725. current_count = 0;
  726. status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
  727. if (ACPI_FAILURE(status)) {
  728. ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
  729. return -ENODEV;
  730. }
  731. cst = buffer.pointer;
  732. /* There must be at least 2 elements */
  733. if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
  734. printk(KERN_ERR PREFIX "not enough elements in _CST\n");
  735. status = -EFAULT;
  736. goto end;
  737. }
  738. count = cst->package.elements[0].integer.value;
  739. /* Validate number of power states. */
  740. if (count < 1 || count != cst->package.count - 1) {
  741. printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
  742. status = -EFAULT;
  743. goto end;
  744. }
  745. /* Tell driver that at least _CST is supported. */
  746. pr->flags.has_cst = 1;
  747. for (i = 1; i <= count; i++) {
  748. union acpi_object *element;
  749. union acpi_object *obj;
  750. struct acpi_power_register *reg;
  751. struct acpi_processor_cx cx;
  752. memset(&cx, 0, sizeof(cx));
  753. element = &(cst->package.elements[i]);
  754. if (element->type != ACPI_TYPE_PACKAGE)
  755. continue;
  756. if (element->package.count != 4)
  757. continue;
  758. obj = &(element->package.elements[0]);
  759. if (obj->type != ACPI_TYPE_BUFFER)
  760. continue;
  761. reg = (struct acpi_power_register *)obj->buffer.pointer;
  762. if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
  763. (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
  764. continue;
  765. /* There should be an easy way to extract an integer... */
  766. obj = &(element->package.elements[1]);
  767. if (obj->type != ACPI_TYPE_INTEGER)
  768. continue;
  769. cx.type = obj->integer.value;
  770. /*
  771. * Some buggy BIOSes won't list C1 in _CST -
  772. * Let acpi_processor_get_power_info_default() handle them later
  773. */
  774. if (i == 1 && cx.type != ACPI_STATE_C1)
  775. current_count++;
  776. cx.address = reg->address;
  777. cx.index = current_count + 1;
  778. cx.space_id = ACPI_CSTATE_SYSTEMIO;
  779. if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
  780. if (acpi_processor_ffh_cstate_probe
  781. (pr->id, &cx, reg) == 0) {
  782. cx.space_id = ACPI_CSTATE_FFH;
  783. } else if (cx.type != ACPI_STATE_C1) {
  784. /*
  785. * C1 is a special case where FIXED_HARDWARE
  786. * can be handled in non-MWAIT way as well.
  787. * In that case, save this _CST entry info.
  788. * That is, we retain space_id of SYSTEM_IO for
  789. * halt based C1.
  790. * Otherwise, ignore this info and continue.
  791. */
  792. continue;
  793. }
  794. }
  795. obj = &(element->package.elements[2]);
  796. if (obj->type != ACPI_TYPE_INTEGER)
  797. continue;
  798. cx.latency = obj->integer.value;
  799. obj = &(element->package.elements[3]);
  800. if (obj->type != ACPI_TYPE_INTEGER)
  801. continue;
  802. cx.power = obj->integer.value;
  803. current_count++;
  804. memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
  805. /*
  806. * We support total ACPI_PROCESSOR_MAX_POWER - 1
  807. * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
  808. */
  809. if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
  810. printk(KERN_WARNING
  811. "Limiting number of power states to max (%d)\n",
  812. ACPI_PROCESSOR_MAX_POWER);
  813. printk(KERN_WARNING
  814. "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
  815. break;
  816. }
  817. }
  818. ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
  819. current_count));
  820. /* Validate number of power states discovered */
  821. if (current_count < 2)
  822. status = -EFAULT;
  823. end:
  824. kfree(buffer.pointer);
  825. return status;
  826. }
  827. static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx)
  828. {
  829. if (!cx->address)
  830. return;
  831. /*
  832. * C2 latency must be less than or equal to 100
  833. * microseconds.
  834. */
  835. else if (cx->latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
  836. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  837. "latency too large [%d]\n", cx->latency));
  838. return;
  839. }
  840. /*
  841. * Otherwise we've met all of our C2 requirements.
  842. * Normalize the C2 latency to expidite policy
  843. */
  844. cx->valid = 1;
  845. #ifndef CONFIG_CPU_IDLE
  846. cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
  847. #else
  848. cx->latency_ticks = cx->latency;
  849. #endif
  850. return;
  851. }
  852. static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
  853. struct acpi_processor_cx *cx)
  854. {
  855. static int bm_check_flag;
  856. if (!cx->address)
  857. return;
  858. /*
  859. * C3 latency must be less than or equal to 1000
  860. * microseconds.
  861. */
  862. else if (cx->latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
  863. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  864. "latency too large [%d]\n", cx->latency));
  865. return;
  866. }
  867. /*
  868. * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
  869. * DMA transfers are used by any ISA device to avoid livelock.
  870. * Note that we could disable Type-F DMA (as recommended by
  871. * the erratum), but this is known to disrupt certain ISA
  872. * devices thus we take the conservative approach.
  873. */
  874. else if (errata.piix4.fdma) {
  875. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  876. "C3 not supported on PIIX4 with Type-F DMA\n"));
  877. return;
  878. }
  879. /* All the logic here assumes flags.bm_check is same across all CPUs */
  880. if (!bm_check_flag) {
  881. /* Determine whether bm_check is needed based on CPU */
  882. acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
  883. bm_check_flag = pr->flags.bm_check;
  884. } else {
  885. pr->flags.bm_check = bm_check_flag;
  886. }
  887. if (pr->flags.bm_check) {
  888. if (!pr->flags.bm_control) {
  889. if (pr->flags.has_cst != 1) {
  890. /* bus mastering control is necessary */
  891. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  892. "C3 support requires BM control\n"));
  893. return;
  894. } else {
  895. /* Here we enter C3 without bus mastering */
  896. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  897. "C3 support without BM control\n"));
  898. }
  899. }
  900. } else {
  901. /*
  902. * WBINVD should be set in fadt, for C3 state to be
  903. * supported on when bm_check is not required.
  904. */
  905. if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
  906. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  907. "Cache invalidation should work properly"
  908. " for C3 to be enabled on SMP systems\n"));
  909. return;
  910. }
  911. acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0);
  912. }
  913. /*
  914. * Otherwise we've met all of our C3 requirements.
  915. * Normalize the C3 latency to expidite policy. Enable
  916. * checking of bus mastering status (bm_check) so we can
  917. * use this in our C3 policy
  918. */
  919. cx->valid = 1;
  920. #ifndef CONFIG_CPU_IDLE
  921. cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
  922. #else
  923. cx->latency_ticks = cx->latency;
  924. #endif
  925. return;
  926. }
  927. static int acpi_processor_power_verify(struct acpi_processor *pr)
  928. {
  929. unsigned int i;
  930. unsigned int working = 0;
  931. pr->power.timer_broadcast_on_state = INT_MAX;
  932. for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
  933. struct acpi_processor_cx *cx = &pr->power.states[i];
  934. switch (cx->type) {
  935. case ACPI_STATE_C1:
  936. cx->valid = 1;
  937. break;
  938. case ACPI_STATE_C2:
  939. acpi_processor_power_verify_c2(cx);
  940. if (cx->valid)
  941. acpi_timer_check_state(i, pr, cx);
  942. break;
  943. case ACPI_STATE_C3:
  944. acpi_processor_power_verify_c3(pr, cx);
  945. if (cx->valid)
  946. acpi_timer_check_state(i, pr, cx);
  947. break;
  948. }
  949. if (cx->valid)
  950. working++;
  951. }
  952. acpi_propagate_timer_broadcast(pr);
  953. return (working);
  954. }
  955. static int acpi_processor_get_power_info(struct acpi_processor *pr)
  956. {
  957. unsigned int i;
  958. int result;
  959. /* NOTE: the idle thread may not be running while calling
  960. * this function */
  961. /* Zero initialize all the C-states info. */
  962. memset(pr->power.states, 0, sizeof(pr->power.states));
  963. result = acpi_processor_get_power_info_cst(pr);
  964. if (result == -ENODEV)
  965. result = acpi_processor_get_power_info_fadt(pr);
  966. if (result)
  967. return result;
  968. acpi_processor_get_power_info_default(pr);
  969. pr->power.count = acpi_processor_power_verify(pr);
  970. #ifndef CONFIG_CPU_IDLE
  971. /*
  972. * Set Default Policy
  973. * ------------------
  974. * Now that we know which states are supported, set the default
  975. * policy. Note that this policy can be changed dynamically
  976. * (e.g. encourage deeper sleeps to conserve battery life when
  977. * not on AC).
  978. */
  979. result = acpi_processor_set_power_policy(pr);
  980. if (result)
  981. return result;
  982. #endif
  983. /*
  984. * if one state of type C2 or C3 is available, mark this
  985. * CPU as being "idle manageable"
  986. */
  987. for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
  988. if (pr->power.states[i].valid) {
  989. pr->power.count = i;
  990. if (pr->power.states[i].type >= ACPI_STATE_C2)
  991. pr->flags.power = 1;
  992. }
  993. }
  994. return 0;
  995. }
  996. static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset)
  997. {
  998. struct acpi_processor *pr = seq->private;
  999. unsigned int i;
  1000. if (!pr)
  1001. goto end;
  1002. seq_printf(seq, "active state: C%zd\n"
  1003. "max_cstate: C%d\n"
  1004. "bus master activity: %08x\n"
  1005. "maximum allowed latency: %d usec\n",
  1006. pr->power.state ? pr->power.state - pr->power.states : 0,
  1007. max_cstate, (unsigned)pr->power.bm_activity,
  1008. system_latency_constraint());
  1009. seq_puts(seq, "states:\n");
  1010. for (i = 1; i <= pr->power.count; i++) {
  1011. seq_printf(seq, " %cC%d: ",
  1012. (&pr->power.states[i] ==
  1013. pr->power.state ? '*' : ' '), i);
  1014. if (!pr->power.states[i].valid) {
  1015. seq_puts(seq, "<not supported>\n");
  1016. continue;
  1017. }
  1018. switch (pr->power.states[i].type) {
  1019. case ACPI_STATE_C1:
  1020. seq_printf(seq, "type[C1] ");
  1021. break;
  1022. case ACPI_STATE_C2:
  1023. seq_printf(seq, "type[C2] ");
  1024. break;
  1025. case ACPI_STATE_C3:
  1026. seq_printf(seq, "type[C3] ");
  1027. break;
  1028. default:
  1029. seq_printf(seq, "type[--] ");
  1030. break;
  1031. }
  1032. if (pr->power.states[i].promotion.state)
  1033. seq_printf(seq, "promotion[C%zd] ",
  1034. (pr->power.states[i].promotion.state -
  1035. pr->power.states));
  1036. else
  1037. seq_puts(seq, "promotion[--] ");
  1038. if (pr->power.states[i].demotion.state)
  1039. seq_printf(seq, "demotion[C%zd] ",
  1040. (pr->power.states[i].demotion.state -
  1041. pr->power.states));
  1042. else
  1043. seq_puts(seq, "demotion[--] ");
  1044. seq_printf(seq, "latency[%03d] usage[%08d] duration[%020llu]\n",
  1045. pr->power.states[i].latency,
  1046. pr->power.states[i].usage,
  1047. (unsigned long long)pr->power.states[i].time);
  1048. }
  1049. end:
  1050. return 0;
  1051. }
  1052. static int acpi_processor_power_open_fs(struct inode *inode, struct file *file)
  1053. {
  1054. return single_open(file, acpi_processor_power_seq_show,
  1055. PDE(inode)->data);
  1056. }
  1057. static const struct file_operations acpi_processor_power_fops = {
  1058. .open = acpi_processor_power_open_fs,
  1059. .read = seq_read,
  1060. .llseek = seq_lseek,
  1061. .release = single_release,
  1062. };
  1063. #ifndef CONFIG_CPU_IDLE
  1064. int acpi_processor_cst_has_changed(struct acpi_processor *pr)
  1065. {
  1066. int result = 0;
  1067. if (!pr)
  1068. return -EINVAL;
  1069. if (nocst) {
  1070. return -ENODEV;
  1071. }
  1072. if (!pr->flags.power_setup_done)
  1073. return -ENODEV;
  1074. /* Fall back to the default idle loop */
  1075. pm_idle = pm_idle_save;
  1076. synchronize_sched(); /* Relies on interrupts forcing exit from idle. */
  1077. pr->flags.power = 0;
  1078. result = acpi_processor_get_power_info(pr);
  1079. if ((pr->flags.power == 1) && (pr->flags.power_setup_done))
  1080. pm_idle = acpi_processor_idle;
  1081. return result;
  1082. }
  1083. #ifdef CONFIG_SMP
  1084. static void smp_callback(void *v)
  1085. {
  1086. /* we already woke the CPU up, nothing more to do */
  1087. }
  1088. /*
  1089. * This function gets called when a part of the kernel has a new latency
  1090. * requirement. This means we need to get all processors out of their C-state,
  1091. * and then recalculate a new suitable C-state. Just do a cross-cpu IPI; that
  1092. * wakes them all right up.
  1093. */
  1094. static int acpi_processor_latency_notify(struct notifier_block *b,
  1095. unsigned long l, void *v)
  1096. {
  1097. smp_call_function(smp_callback, NULL, 0, 1);
  1098. return NOTIFY_OK;
  1099. }
  1100. static struct notifier_block acpi_processor_latency_notifier = {
  1101. .notifier_call = acpi_processor_latency_notify,
  1102. };
  1103. #endif
  1104. #else /* CONFIG_CPU_IDLE */
  1105. /**
  1106. * acpi_idle_bm_check - checks if bus master activity was detected
  1107. */
  1108. static int acpi_idle_bm_check(void)
  1109. {
  1110. u32 bm_status = 0;
  1111. acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
  1112. if (bm_status)
  1113. acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
  1114. /*
  1115. * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
  1116. * the true state of bus mastering activity; forcing us to
  1117. * manually check the BMIDEA bit of each IDE channel.
  1118. */
  1119. else if (errata.piix4.bmisx) {
  1120. if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
  1121. || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
  1122. bm_status = 1;
  1123. }
  1124. return bm_status;
  1125. }
  1126. /**
  1127. * acpi_idle_update_bm_rld - updates the BM_RLD bit depending on target state
  1128. * @pr: the processor
  1129. * @target: the new target state
  1130. */
  1131. static inline void acpi_idle_update_bm_rld(struct acpi_processor *pr,
  1132. struct acpi_processor_cx *target)
  1133. {
  1134. if (pr->flags.bm_rld_set && target->type != ACPI_STATE_C3) {
  1135. acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0);
  1136. pr->flags.bm_rld_set = 0;
  1137. }
  1138. if (!pr->flags.bm_rld_set && target->type == ACPI_STATE_C3) {
  1139. acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
  1140. pr->flags.bm_rld_set = 1;
  1141. }
  1142. }
  1143. /**
  1144. * acpi_idle_do_entry - a helper function that does C2 and C3 type entry
  1145. * @cx: cstate data
  1146. */
  1147. static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx)
  1148. {
  1149. if (cx->space_id == ACPI_CSTATE_FFH) {
  1150. /* Call into architectural FFH based C-state */
  1151. acpi_processor_ffh_cstate_enter(cx);
  1152. } else {
  1153. int unused;
  1154. /* IO port based C-state */
  1155. inb(cx->address);
  1156. /* Dummy wait op - must do something useless after P_LVL2 read
  1157. because chipsets cannot guarantee that STPCLK# signal
  1158. gets asserted in time to freeze execution properly. */
  1159. unused = inl(acpi_gbl_FADT.xpm_timer_block.address);
  1160. }
  1161. }
  1162. /**
  1163. * acpi_idle_enter_c1 - enters an ACPI C1 state-type
  1164. * @dev: the target CPU
  1165. * @state: the state data
  1166. *
  1167. * This is equivalent to the HALT instruction.
  1168. */
  1169. static int acpi_idle_enter_c1(struct cpuidle_device *dev,
  1170. struct cpuidle_state *state)
  1171. {
  1172. struct acpi_processor *pr;
  1173. struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
  1174. pr = processors[smp_processor_id()];
  1175. if (unlikely(!pr))
  1176. return 0;
  1177. if (pr->flags.bm_check)
  1178. acpi_idle_update_bm_rld(pr, cx);
  1179. acpi_safe_halt();
  1180. cx->usage++;
  1181. return 0;
  1182. }
  1183. /**
  1184. * acpi_idle_enter_simple - enters an ACPI state without BM handling
  1185. * @dev: the target CPU
  1186. * @state: the state data
  1187. */
  1188. static int acpi_idle_enter_simple(struct cpuidle_device *dev,
  1189. struct cpuidle_state *state)
  1190. {
  1191. struct acpi_processor *pr;
  1192. struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
  1193. u32 t1, t2;
  1194. int sleep_ticks = 0;
  1195. pr = processors[smp_processor_id()];
  1196. if (unlikely(!pr))
  1197. return 0;
  1198. if (acpi_idle_suspend)
  1199. return(acpi_idle_enter_c1(dev, state));
  1200. local_irq_disable();
  1201. current_thread_info()->status &= ~TS_POLLING;
  1202. /*
  1203. * TS_POLLING-cleared state must be visible before we test
  1204. * NEED_RESCHED:
  1205. */
  1206. smp_mb();
  1207. if (unlikely(need_resched())) {
  1208. current_thread_info()->status |= TS_POLLING;
  1209. local_irq_enable();
  1210. return 0;
  1211. }
  1212. acpi_unlazy_tlb(smp_processor_id());
  1213. /*
  1214. * Must be done before busmaster disable as we might need to
  1215. * access HPET !
  1216. */
  1217. acpi_state_timer_broadcast(pr, cx, 1);
  1218. if (pr->flags.bm_check)
  1219. acpi_idle_update_bm_rld(pr, cx);
  1220. if (cx->type == ACPI_STATE_C3)
  1221. ACPI_FLUSH_CPU_CACHE();
  1222. t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
  1223. /* Tell the scheduler that we are going deep-idle: */
  1224. sched_clock_idle_sleep_event();
  1225. acpi_idle_do_entry(cx);
  1226. t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
  1227. #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86_TSC)
  1228. /* TSC could halt in idle, so notify users */
  1229. mark_tsc_unstable("TSC halts in idle");;
  1230. #endif
  1231. sleep_ticks = ticks_elapsed(t1, t2);
  1232. /* Tell the scheduler how much we idled: */
  1233. sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
  1234. local_irq_enable();
  1235. current_thread_info()->status |= TS_POLLING;
  1236. cx->usage++;
  1237. acpi_state_timer_broadcast(pr, cx, 0);
  1238. cx->time += sleep_ticks;
  1239. return ticks_elapsed_in_us(t1, t2);
  1240. }
  1241. static int c3_cpu_count;
  1242. static DEFINE_SPINLOCK(c3_lock);
  1243. /**
  1244. * acpi_idle_enter_bm - enters C3 with proper BM handling
  1245. * @dev: the target CPU
  1246. * @state: the state data
  1247. *
  1248. * If BM is detected, the deepest non-C3 idle state is entered instead.
  1249. */
  1250. static int acpi_idle_enter_bm(struct cpuidle_device *dev,
  1251. struct cpuidle_state *state)
  1252. {
  1253. struct acpi_processor *pr;
  1254. struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
  1255. u32 t1, t2;
  1256. int sleep_ticks = 0;
  1257. pr = processors[smp_processor_id()];
  1258. if (unlikely(!pr))
  1259. return 0;
  1260. if (acpi_idle_suspend)
  1261. return(acpi_idle_enter_c1(dev, state));
  1262. if (acpi_idle_bm_check()) {
  1263. if (dev->safe_state) {
  1264. return dev->safe_state->enter(dev, dev->safe_state);
  1265. } else {
  1266. acpi_safe_halt();
  1267. return 0;
  1268. }
  1269. }
  1270. local_irq_disable();
  1271. current_thread_info()->status &= ~TS_POLLING;
  1272. /*
  1273. * TS_POLLING-cleared state must be visible before we test
  1274. * NEED_RESCHED:
  1275. */
  1276. smp_mb();
  1277. if (unlikely(need_resched())) {
  1278. current_thread_info()->status |= TS_POLLING;
  1279. local_irq_enable();
  1280. return 0;
  1281. }
  1282. /* Tell the scheduler that we are going deep-idle: */
  1283. sched_clock_idle_sleep_event();
  1284. /*
  1285. * Must be done before busmaster disable as we might need to
  1286. * access HPET !
  1287. */
  1288. acpi_state_timer_broadcast(pr, cx, 1);
  1289. acpi_idle_update_bm_rld(pr, cx);
  1290. /*
  1291. * disable bus master
  1292. * bm_check implies we need ARB_DIS
  1293. * !bm_check implies we need cache flush
  1294. * bm_control implies whether we can do ARB_DIS
  1295. *
  1296. * That leaves a case where bm_check is set and bm_control is
  1297. * not set. In that case we cannot do much, we enter C3
  1298. * without doing anything.
  1299. */
  1300. if (pr->flags.bm_check && pr->flags.bm_control) {
  1301. spin_lock(&c3_lock);
  1302. c3_cpu_count++;
  1303. /* Disable bus master arbitration when all CPUs are in C3 */
  1304. if (c3_cpu_count == num_online_cpus())
  1305. acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1);
  1306. spin_unlock(&c3_lock);
  1307. } else if (!pr->flags.bm_check) {
  1308. ACPI_FLUSH_CPU_CACHE();
  1309. }
  1310. t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
  1311. acpi_idle_do_entry(cx);
  1312. t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
  1313. /* Re-enable bus master arbitration */
  1314. if (pr->flags.bm_check && pr->flags.bm_control) {
  1315. spin_lock(&c3_lock);
  1316. acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0);
  1317. c3_cpu_count--;
  1318. spin_unlock(&c3_lock);
  1319. }
  1320. #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86_TSC)
  1321. /* TSC could halt in idle, so notify users */
  1322. mark_tsc_unstable("TSC halts in idle");
  1323. #endif
  1324. sleep_ticks = ticks_elapsed(t1, t2);
  1325. /* Tell the scheduler how much we idled: */
  1326. sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
  1327. local_irq_enable();
  1328. current_thread_info()->status |= TS_POLLING;
  1329. cx->usage++;
  1330. acpi_state_timer_broadcast(pr, cx, 0);
  1331. cx->time += sleep_ticks;
  1332. return ticks_elapsed_in_us(t1, t2);
  1333. }
  1334. struct cpuidle_driver acpi_idle_driver = {
  1335. .name = "acpi_idle",
  1336. .owner = THIS_MODULE,
  1337. };
  1338. /**
  1339. * acpi_processor_setup_cpuidle - prepares and configures CPUIDLE
  1340. * @pr: the ACPI processor
  1341. */
  1342. static int acpi_processor_setup_cpuidle(struct acpi_processor *pr)
  1343. {
  1344. int i, count = 0;
  1345. struct acpi_processor_cx *cx;
  1346. struct cpuidle_state *state;
  1347. struct cpuidle_device *dev = &pr->power.dev;
  1348. if (!pr->flags.power_setup_done)
  1349. return -EINVAL;
  1350. if (pr->flags.power == 0) {
  1351. return -EINVAL;
  1352. }
  1353. for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
  1354. cx = &pr->power.states[i];
  1355. state = &dev->states[count];
  1356. if (!cx->valid)
  1357. continue;
  1358. #ifdef CONFIG_HOTPLUG_CPU
  1359. if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
  1360. !pr->flags.has_cst &&
  1361. !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
  1362. continue;
  1363. #endif
  1364. cpuidle_set_statedata(state, cx);
  1365. snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
  1366. state->exit_latency = cx->latency;
  1367. state->target_residency = cx->latency * 6;
  1368. state->power_usage = cx->power;
  1369. state->flags = 0;
  1370. switch (cx->type) {
  1371. case ACPI_STATE_C1:
  1372. state->flags |= CPUIDLE_FLAG_SHALLOW;
  1373. state->enter = acpi_idle_enter_c1;
  1374. dev->safe_state = state;
  1375. break;
  1376. case ACPI_STATE_C2:
  1377. state->flags |= CPUIDLE_FLAG_BALANCED;
  1378. state->flags |= CPUIDLE_FLAG_TIME_VALID;
  1379. state->enter = acpi_idle_enter_simple;
  1380. dev->safe_state = state;
  1381. break;
  1382. case ACPI_STATE_C3:
  1383. state->flags |= CPUIDLE_FLAG_DEEP;
  1384. state->flags |= CPUIDLE_FLAG_TIME_VALID;
  1385. state->flags |= CPUIDLE_FLAG_CHECK_BM;
  1386. state->enter = pr->flags.bm_check ?
  1387. acpi_idle_enter_bm :
  1388. acpi_idle_enter_simple;
  1389. break;
  1390. }
  1391. count++;
  1392. }
  1393. dev->state_count = count;
  1394. if (!count)
  1395. return -EINVAL;
  1396. return 0;
  1397. }
  1398. int acpi_processor_cst_has_changed(struct acpi_processor *pr)
  1399. {
  1400. int ret;
  1401. if (!pr)
  1402. return -EINVAL;
  1403. if (nocst) {
  1404. return -ENODEV;
  1405. }
  1406. if (!pr->flags.power_setup_done)
  1407. return -ENODEV;
  1408. cpuidle_pause_and_lock();
  1409. cpuidle_disable_device(&pr->power.dev);
  1410. acpi_processor_get_power_info(pr);
  1411. acpi_processor_setup_cpuidle(pr);
  1412. ret = cpuidle_enable_device(&pr->power.dev);
  1413. cpuidle_resume_and_unlock();
  1414. return ret;
  1415. }
  1416. #endif /* CONFIG_CPU_IDLE */
  1417. int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
  1418. struct acpi_device *device)
  1419. {
  1420. acpi_status status = 0;
  1421. static int first_run;
  1422. struct proc_dir_entry *entry = NULL;
  1423. unsigned int i;
  1424. if (!first_run) {
  1425. dmi_check_system(processor_power_dmi_table);
  1426. max_cstate = acpi_processor_cstate_check(max_cstate);
  1427. if (max_cstate < ACPI_C_STATES_MAX)
  1428. printk(KERN_NOTICE
  1429. "ACPI: processor limited to max C-state %d\n",
  1430. max_cstate);
  1431. first_run++;
  1432. #if !defined (CONFIG_CPU_IDLE) && defined (CONFIG_SMP)
  1433. register_latency_notifier(&acpi_processor_latency_notifier);
  1434. #endif
  1435. }
  1436. if (!pr)
  1437. return -EINVAL;
  1438. if (acpi_gbl_FADT.cst_control && !nocst) {
  1439. status =
  1440. acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
  1441. if (ACPI_FAILURE(status)) {
  1442. ACPI_EXCEPTION((AE_INFO, status,
  1443. "Notifying BIOS of _CST ability failed"));
  1444. }
  1445. }
  1446. acpi_processor_get_power_info(pr);
  1447. pr->flags.power_setup_done = 1;
  1448. /*
  1449. * Install the idle handler if processor power management is supported.
  1450. * Note that we use previously set idle handler will be used on
  1451. * platforms that only support C1.
  1452. */
  1453. if ((pr->flags.power) && (!boot_option_idle_override)) {
  1454. #ifdef CONFIG_CPU_IDLE
  1455. acpi_processor_setup_cpuidle(pr);
  1456. pr->power.dev.cpu = pr->id;
  1457. if (cpuidle_register_device(&pr->power.dev))
  1458. return -EIO;
  1459. #endif
  1460. printk(KERN_INFO PREFIX "CPU%d (power states:", pr->id);
  1461. for (i = 1; i <= pr->power.count; i++)
  1462. if (pr->power.states[i].valid)
  1463. printk(" C%d[C%d]", i,
  1464. pr->power.states[i].type);
  1465. printk(")\n");
  1466. #ifndef CONFIG_CPU_IDLE
  1467. if (pr->id == 0) {
  1468. pm_idle_save = pm_idle;
  1469. pm_idle = acpi_processor_idle;
  1470. }
  1471. #endif
  1472. }
  1473. /* 'power' [R] */
  1474. entry = create_proc_entry(ACPI_PROCESSOR_FILE_POWER,
  1475. S_IRUGO, acpi_device_dir(device));
  1476. if (!entry)
  1477. return -EIO;
  1478. else {
  1479. entry->proc_fops = &acpi_processor_power_fops;
  1480. entry->data = acpi_driver_data(device);
  1481. entry->owner = THIS_MODULE;
  1482. }
  1483. return 0;
  1484. }
  1485. int acpi_processor_power_exit(struct acpi_processor *pr,
  1486. struct acpi_device *device)
  1487. {
  1488. #ifdef CONFIG_CPU_IDLE
  1489. if ((pr->flags.power) && (!boot_option_idle_override))
  1490. cpuidle_unregister_device(&pr->power.dev);
  1491. #endif
  1492. pr->flags.power_setup_done = 0;
  1493. if (acpi_device_dir(device))
  1494. remove_proc_entry(ACPI_PROCESSOR_FILE_POWER,
  1495. acpi_device_dir(device));
  1496. #ifndef CONFIG_CPU_IDLE
  1497. /* Unregister the idle handler when processor #0 is removed. */
  1498. if (pr->id == 0) {
  1499. pm_idle = pm_idle_save;
  1500. /*
  1501. * We are about to unload the current idle thread pm callback
  1502. * (pm_idle), Wait for all processors to update cached/local
  1503. * copies of pm_idle before proceeding.
  1504. */
  1505. cpu_idle_wait();
  1506. #ifdef CONFIG_SMP
  1507. unregister_latency_notifier(&acpi_processor_latency_notifier);
  1508. #endif
  1509. }
  1510. #endif
  1511. return 0;
  1512. }