qla_os.c 108 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2010 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include <linux/moduleparam.h>
  9. #include <linux/vmalloc.h>
  10. #include <linux/delay.h>
  11. #include <linux/kthread.h>
  12. #include <linux/mutex.h>
  13. #include <linux/kobject.h>
  14. #include <linux/slab.h>
  15. #include <scsi/scsi_tcq.h>
  16. #include <scsi/scsicam.h>
  17. #include <scsi/scsi_transport.h>
  18. #include <scsi/scsi_transport_fc.h>
  19. /*
  20. * Driver version
  21. */
  22. char qla2x00_version_str[40];
  23. static int apidev_major;
  24. /*
  25. * SRB allocation cache
  26. */
  27. static struct kmem_cache *srb_cachep;
  28. /*
  29. * CT6 CTX allocation cache
  30. */
  31. static struct kmem_cache *ctx_cachep;
  32. int ql2xlogintimeout = 20;
  33. module_param(ql2xlogintimeout, int, S_IRUGO|S_IRUSR);
  34. MODULE_PARM_DESC(ql2xlogintimeout,
  35. "Login timeout value in seconds.");
  36. int qlport_down_retry;
  37. module_param(qlport_down_retry, int, S_IRUGO|S_IRUSR);
  38. MODULE_PARM_DESC(qlport_down_retry,
  39. "Maximum number of command retries to a port that returns "
  40. "a PORT-DOWN status.");
  41. int ql2xplogiabsentdevice;
  42. module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  43. MODULE_PARM_DESC(ql2xplogiabsentdevice,
  44. "Option to enable PLOGI to devices that are not present after "
  45. "a Fabric scan. This is needed for several broken switches. "
  46. "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
  47. int ql2xloginretrycount = 0;
  48. module_param(ql2xloginretrycount, int, S_IRUGO|S_IRUSR);
  49. MODULE_PARM_DESC(ql2xloginretrycount,
  50. "Specify an alternate value for the NVRAM login retry count.");
  51. int ql2xallocfwdump = 1;
  52. module_param(ql2xallocfwdump, int, S_IRUGO|S_IRUSR);
  53. MODULE_PARM_DESC(ql2xallocfwdump,
  54. "Option to enable allocation of memory for a firmware dump "
  55. "during HBA initialization. Memory allocation requirements "
  56. "vary by ISP type. Default is 1 - allocate memory.");
  57. int ql2xextended_error_logging;
  58. module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  59. MODULE_PARM_DESC(ql2xextended_error_logging,
  60. "Option to enable extended error logging, "
  61. "Default is 0 - no logging. 1 - log errors.");
  62. int ql2xshiftctondsd = 6;
  63. module_param(ql2xshiftctondsd, int, S_IRUGO|S_IRUSR);
  64. MODULE_PARM_DESC(ql2xshiftctondsd,
  65. "Set to control shifting of command type processing "
  66. "based on total number of SG elements.");
  67. static void qla2x00_free_device(scsi_qla_host_t *);
  68. int ql2xfdmienable=1;
  69. module_param(ql2xfdmienable, int, S_IRUGO|S_IRUSR);
  70. MODULE_PARM_DESC(ql2xfdmienable,
  71. "Enables FDMI registrations. "
  72. "0 - no FDMI. Default is 1 - perform FDMI.");
  73. #define MAX_Q_DEPTH 32
  74. static int ql2xmaxqdepth = MAX_Q_DEPTH;
  75. module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
  76. MODULE_PARM_DESC(ql2xmaxqdepth,
  77. "Maximum queue depth to report for target devices.");
  78. /* Do not change the value of this after module load */
  79. int ql2xenabledif = 1;
  80. module_param(ql2xenabledif, int, S_IRUGO|S_IWUSR);
  81. MODULE_PARM_DESC(ql2xenabledif,
  82. " Enable T10-CRC-DIF "
  83. " Default is 0 - No DIF Support. 1 - Enable it");
  84. int ql2xenablehba_err_chk;
  85. module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
  86. MODULE_PARM_DESC(ql2xenablehba_err_chk,
  87. " Enable T10-CRC-DIF Error isolation by HBA"
  88. " Default is 0 - Error isolation disabled, 1 - Enable it");
  89. int ql2xiidmaenable=1;
  90. module_param(ql2xiidmaenable, int, S_IRUGO|S_IRUSR);
  91. MODULE_PARM_DESC(ql2xiidmaenable,
  92. "Enables iIDMA settings "
  93. "Default is 1 - perform iIDMA. 0 - no iIDMA.");
  94. int ql2xmaxqueues = 1;
  95. module_param(ql2xmaxqueues, int, S_IRUGO|S_IRUSR);
  96. MODULE_PARM_DESC(ql2xmaxqueues,
  97. "Enables MQ settings "
  98. "Default is 1 for single queue. Set it to number "
  99. "of queues in MQ mode.");
  100. int ql2xmultique_tag;
  101. module_param(ql2xmultique_tag, int, S_IRUGO|S_IRUSR);
  102. MODULE_PARM_DESC(ql2xmultique_tag,
  103. "Enables CPU affinity settings for the driver "
  104. "Default is 0 for no affinity of request and response IO. "
  105. "Set it to 1 to turn on the cpu affinity.");
  106. int ql2xfwloadbin;
  107. module_param(ql2xfwloadbin, int, S_IRUGO|S_IRUSR);
  108. MODULE_PARM_DESC(ql2xfwloadbin,
  109. "Option to specify location from which to load ISP firmware:\n"
  110. " 2 -- load firmware via the request_firmware() (hotplug)\n"
  111. " interface.\n"
  112. " 1 -- load firmware from flash.\n"
  113. " 0 -- use default semantics.\n");
  114. int ql2xetsenable;
  115. module_param(ql2xetsenable, int, S_IRUGO|S_IRUSR);
  116. MODULE_PARM_DESC(ql2xetsenable,
  117. "Enables firmware ETS burst."
  118. "Default is 0 - skip ETS enablement.");
  119. int ql2xdbwr = 1;
  120. module_param(ql2xdbwr, int, S_IRUGO|S_IRUSR);
  121. MODULE_PARM_DESC(ql2xdbwr,
  122. "Option to specify scheme for request queue posting\n"
  123. " 0 -- Regular doorbell.\n"
  124. " 1 -- CAMRAM doorbell (faster).\n");
  125. int ql2xdontresethba;
  126. module_param(ql2xdontresethba, int, S_IRUGO|S_IRUSR);
  127. MODULE_PARM_DESC(ql2xdontresethba,
  128. "Option to specify reset behaviour\n"
  129. " 0 (Default) -- Reset on failure.\n"
  130. " 1 -- Do not reset on failure.\n");
  131. int ql2xtargetreset = 1;
  132. module_param(ql2xtargetreset, int, S_IRUGO|S_IRUSR);
  133. MODULE_PARM_DESC(ql2xtargetreset,
  134. "Enable target reset."
  135. "Default is 1 - use hw defaults.");
  136. int ql2xasynctmfenable;
  137. module_param(ql2xasynctmfenable, int, S_IRUGO|S_IRUSR);
  138. MODULE_PARM_DESC(ql2xasynctmfenable,
  139. "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
  140. "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
  141. /*
  142. * SCSI host template entry points
  143. */
  144. static int qla2xxx_slave_configure(struct scsi_device * device);
  145. static int qla2xxx_slave_alloc(struct scsi_device *);
  146. static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
  147. static void qla2xxx_scan_start(struct Scsi_Host *);
  148. static void qla2xxx_slave_destroy(struct scsi_device *);
  149. static int qla2xxx_queuecommand(struct scsi_cmnd *cmd,
  150. void (*fn)(struct scsi_cmnd *));
  151. static int qla2xxx_eh_abort(struct scsi_cmnd *);
  152. static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
  153. static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
  154. static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
  155. static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
  156. static int qla2x00_change_queue_depth(struct scsi_device *, int, int);
  157. static int qla2x00_change_queue_type(struct scsi_device *, int);
  158. struct scsi_host_template qla2xxx_driver_template = {
  159. .module = THIS_MODULE,
  160. .name = QLA2XXX_DRIVER_NAME,
  161. .queuecommand = qla2xxx_queuecommand,
  162. .eh_abort_handler = qla2xxx_eh_abort,
  163. .eh_device_reset_handler = qla2xxx_eh_device_reset,
  164. .eh_target_reset_handler = qla2xxx_eh_target_reset,
  165. .eh_bus_reset_handler = qla2xxx_eh_bus_reset,
  166. .eh_host_reset_handler = qla2xxx_eh_host_reset,
  167. .slave_configure = qla2xxx_slave_configure,
  168. .slave_alloc = qla2xxx_slave_alloc,
  169. .slave_destroy = qla2xxx_slave_destroy,
  170. .scan_finished = qla2xxx_scan_finished,
  171. .scan_start = qla2xxx_scan_start,
  172. .change_queue_depth = qla2x00_change_queue_depth,
  173. .change_queue_type = qla2x00_change_queue_type,
  174. .this_id = -1,
  175. .cmd_per_lun = 3,
  176. .use_clustering = ENABLE_CLUSTERING,
  177. .sg_tablesize = SG_ALL,
  178. .max_sectors = 0xFFFF,
  179. .shost_attrs = qla2x00_host_attrs,
  180. };
  181. static struct scsi_transport_template *qla2xxx_transport_template = NULL;
  182. struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
  183. /* TODO Convert to inlines
  184. *
  185. * Timer routines
  186. */
  187. __inline__ void
  188. qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
  189. {
  190. init_timer(&vha->timer);
  191. vha->timer.expires = jiffies + interval * HZ;
  192. vha->timer.data = (unsigned long)vha;
  193. vha->timer.function = (void (*)(unsigned long))func;
  194. add_timer(&vha->timer);
  195. vha->timer_active = 1;
  196. }
  197. static inline void
  198. qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
  199. {
  200. /* Currently used for 82XX only. */
  201. if (vha->device_flags & DFLG_DEV_FAILED)
  202. return;
  203. mod_timer(&vha->timer, jiffies + interval * HZ);
  204. }
  205. static __inline__ void
  206. qla2x00_stop_timer(scsi_qla_host_t *vha)
  207. {
  208. del_timer_sync(&vha->timer);
  209. vha->timer_active = 0;
  210. }
  211. static int qla2x00_do_dpc(void *data);
  212. static void qla2x00_rst_aen(scsi_qla_host_t *);
  213. static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
  214. struct req_que **, struct rsp_que **);
  215. static void qla2x00_mem_free(struct qla_hw_data *);
  216. static void qla2x00_sp_free_dma(srb_t *);
  217. /* -------------------------------------------------------------------------- */
  218. static int qla2x00_alloc_queues(struct qla_hw_data *ha)
  219. {
  220. ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
  221. GFP_KERNEL);
  222. if (!ha->req_q_map) {
  223. qla_printk(KERN_WARNING, ha,
  224. "Unable to allocate memory for request queue ptrs\n");
  225. goto fail_req_map;
  226. }
  227. ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
  228. GFP_KERNEL);
  229. if (!ha->rsp_q_map) {
  230. qla_printk(KERN_WARNING, ha,
  231. "Unable to allocate memory for response queue ptrs\n");
  232. goto fail_rsp_map;
  233. }
  234. set_bit(0, ha->rsp_qid_map);
  235. set_bit(0, ha->req_qid_map);
  236. return 1;
  237. fail_rsp_map:
  238. kfree(ha->req_q_map);
  239. ha->req_q_map = NULL;
  240. fail_req_map:
  241. return -ENOMEM;
  242. }
  243. static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
  244. {
  245. if (req && req->ring)
  246. dma_free_coherent(&ha->pdev->dev,
  247. (req->length + 1) * sizeof(request_t),
  248. req->ring, req->dma);
  249. kfree(req);
  250. req = NULL;
  251. }
  252. static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
  253. {
  254. if (rsp && rsp->ring)
  255. dma_free_coherent(&ha->pdev->dev,
  256. (rsp->length + 1) * sizeof(response_t),
  257. rsp->ring, rsp->dma);
  258. kfree(rsp);
  259. rsp = NULL;
  260. }
  261. static void qla2x00_free_queues(struct qla_hw_data *ha)
  262. {
  263. struct req_que *req;
  264. struct rsp_que *rsp;
  265. int cnt;
  266. for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
  267. req = ha->req_q_map[cnt];
  268. qla2x00_free_req_que(ha, req);
  269. }
  270. kfree(ha->req_q_map);
  271. ha->req_q_map = NULL;
  272. for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
  273. rsp = ha->rsp_q_map[cnt];
  274. qla2x00_free_rsp_que(ha, rsp);
  275. }
  276. kfree(ha->rsp_q_map);
  277. ha->rsp_q_map = NULL;
  278. }
  279. static int qla25xx_setup_mode(struct scsi_qla_host *vha)
  280. {
  281. uint16_t options = 0;
  282. int ques, req, ret;
  283. struct qla_hw_data *ha = vha->hw;
  284. if (!(ha->fw_attributes & BIT_6)) {
  285. qla_printk(KERN_INFO, ha,
  286. "Firmware is not multi-queue capable\n");
  287. goto fail;
  288. }
  289. if (ql2xmultique_tag) {
  290. /* create a request queue for IO */
  291. options |= BIT_7;
  292. req = qla25xx_create_req_que(ha, options, 0, 0, -1,
  293. QLA_DEFAULT_QUE_QOS);
  294. if (!req) {
  295. qla_printk(KERN_WARNING, ha,
  296. "Can't create request queue\n");
  297. goto fail;
  298. }
  299. ha->wq = create_workqueue("qla2xxx_wq");
  300. vha->req = ha->req_q_map[req];
  301. options |= BIT_1;
  302. for (ques = 1; ques < ha->max_rsp_queues; ques++) {
  303. ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
  304. if (!ret) {
  305. qla_printk(KERN_WARNING, ha,
  306. "Response Queue create failed\n");
  307. goto fail2;
  308. }
  309. }
  310. ha->flags.cpu_affinity_enabled = 1;
  311. DEBUG2(qla_printk(KERN_INFO, ha,
  312. "CPU affinity mode enabled, no. of response"
  313. " queues:%d, no. of request queues:%d\n",
  314. ha->max_rsp_queues, ha->max_req_queues));
  315. }
  316. return 0;
  317. fail2:
  318. qla25xx_delete_queues(vha);
  319. destroy_workqueue(ha->wq);
  320. ha->wq = NULL;
  321. fail:
  322. ha->mqenable = 0;
  323. kfree(ha->req_q_map);
  324. kfree(ha->rsp_q_map);
  325. ha->max_req_queues = ha->max_rsp_queues = 1;
  326. return 1;
  327. }
  328. static char *
  329. qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
  330. {
  331. struct qla_hw_data *ha = vha->hw;
  332. static char *pci_bus_modes[] = {
  333. "33", "66", "100", "133",
  334. };
  335. uint16_t pci_bus;
  336. strcpy(str, "PCI");
  337. pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
  338. if (pci_bus) {
  339. strcat(str, "-X (");
  340. strcat(str, pci_bus_modes[pci_bus]);
  341. } else {
  342. pci_bus = (ha->pci_attr & BIT_8) >> 8;
  343. strcat(str, " (");
  344. strcat(str, pci_bus_modes[pci_bus]);
  345. }
  346. strcat(str, " MHz)");
  347. return (str);
  348. }
  349. static char *
  350. qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
  351. {
  352. static char *pci_bus_modes[] = { "33", "66", "100", "133", };
  353. struct qla_hw_data *ha = vha->hw;
  354. uint32_t pci_bus;
  355. int pcie_reg;
  356. pcie_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_EXP);
  357. if (pcie_reg) {
  358. char lwstr[6];
  359. uint16_t pcie_lstat, lspeed, lwidth;
  360. pcie_reg += 0x12;
  361. pci_read_config_word(ha->pdev, pcie_reg, &pcie_lstat);
  362. lspeed = pcie_lstat & (BIT_0 | BIT_1 | BIT_2 | BIT_3);
  363. lwidth = (pcie_lstat &
  364. (BIT_4 | BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)) >> 4;
  365. strcpy(str, "PCIe (");
  366. if (lspeed == 1)
  367. strcat(str, "2.5GT/s ");
  368. else if (lspeed == 2)
  369. strcat(str, "5.0GT/s ");
  370. else
  371. strcat(str, "<unknown> ");
  372. snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
  373. strcat(str, lwstr);
  374. return str;
  375. }
  376. strcpy(str, "PCI");
  377. pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
  378. if (pci_bus == 0 || pci_bus == 8) {
  379. strcat(str, " (");
  380. strcat(str, pci_bus_modes[pci_bus >> 3]);
  381. } else {
  382. strcat(str, "-X ");
  383. if (pci_bus & BIT_2)
  384. strcat(str, "Mode 2");
  385. else
  386. strcat(str, "Mode 1");
  387. strcat(str, " (");
  388. strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
  389. }
  390. strcat(str, " MHz)");
  391. return str;
  392. }
  393. static char *
  394. qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str)
  395. {
  396. char un_str[10];
  397. struct qla_hw_data *ha = vha->hw;
  398. sprintf(str, "%d.%02d.%02d ", ha->fw_major_version,
  399. ha->fw_minor_version,
  400. ha->fw_subminor_version);
  401. if (ha->fw_attributes & BIT_9) {
  402. strcat(str, "FLX");
  403. return (str);
  404. }
  405. switch (ha->fw_attributes & 0xFF) {
  406. case 0x7:
  407. strcat(str, "EF");
  408. break;
  409. case 0x17:
  410. strcat(str, "TP");
  411. break;
  412. case 0x37:
  413. strcat(str, "IP");
  414. break;
  415. case 0x77:
  416. strcat(str, "VI");
  417. break;
  418. default:
  419. sprintf(un_str, "(%x)", ha->fw_attributes);
  420. strcat(str, un_str);
  421. break;
  422. }
  423. if (ha->fw_attributes & 0x100)
  424. strcat(str, "X");
  425. return (str);
  426. }
  427. static char *
  428. qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str)
  429. {
  430. struct qla_hw_data *ha = vha->hw;
  431. sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version,
  432. ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
  433. return str;
  434. }
  435. static inline srb_t *
  436. qla2x00_get_new_sp(scsi_qla_host_t *vha, fc_port_t *fcport,
  437. struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
  438. {
  439. srb_t *sp;
  440. struct qla_hw_data *ha = vha->hw;
  441. sp = mempool_alloc(ha->srb_mempool, GFP_ATOMIC);
  442. if (!sp)
  443. return sp;
  444. atomic_set(&sp->ref_count, 1);
  445. sp->fcport = fcport;
  446. sp->cmd = cmd;
  447. sp->flags = 0;
  448. CMD_SP(cmd) = (void *)sp;
  449. cmd->scsi_done = done;
  450. sp->ctx = NULL;
  451. return sp;
  452. }
  453. static int
  454. qla2xxx_queuecommand(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
  455. {
  456. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  457. fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
  458. struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
  459. struct qla_hw_data *ha = vha->hw;
  460. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  461. srb_t *sp;
  462. int rval;
  463. if (ha->flags.eeh_busy) {
  464. if (ha->flags.pci_channel_io_perm_failure)
  465. cmd->result = DID_NO_CONNECT << 16;
  466. else
  467. cmd->result = DID_REQUEUE << 16;
  468. goto qc24_fail_command;
  469. }
  470. rval = fc_remote_port_chkready(rport);
  471. if (rval) {
  472. cmd->result = rval;
  473. goto qc24_fail_command;
  474. }
  475. /* Close window on fcport/rport state-transitioning. */
  476. if (fcport->drport)
  477. goto qc24_target_busy;
  478. if (!vha->flags.difdix_supported &&
  479. scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
  480. DEBUG2(qla_printk(KERN_ERR, ha,
  481. "DIF Cap Not Reg, fail DIF capable cmd's:%x\n",
  482. cmd->cmnd[0]));
  483. cmd->result = DID_NO_CONNECT << 16;
  484. goto qc24_fail_command;
  485. }
  486. if (atomic_read(&fcport->state) != FCS_ONLINE) {
  487. if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
  488. atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
  489. cmd->result = DID_NO_CONNECT << 16;
  490. goto qc24_fail_command;
  491. }
  492. goto qc24_target_busy;
  493. }
  494. spin_unlock_irq(vha->host->host_lock);
  495. sp = qla2x00_get_new_sp(base_vha, fcport, cmd, done);
  496. if (!sp)
  497. goto qc24_host_busy_lock;
  498. rval = ha->isp_ops->start_scsi(sp);
  499. if (rval != QLA_SUCCESS)
  500. goto qc24_host_busy_free_sp;
  501. spin_lock_irq(vha->host->host_lock);
  502. return 0;
  503. qc24_host_busy_free_sp:
  504. qla2x00_sp_free_dma(sp);
  505. mempool_free(sp, ha->srb_mempool);
  506. qc24_host_busy_lock:
  507. spin_lock_irq(vha->host->host_lock);
  508. return SCSI_MLQUEUE_HOST_BUSY;
  509. qc24_target_busy:
  510. return SCSI_MLQUEUE_TARGET_BUSY;
  511. qc24_fail_command:
  512. done(cmd);
  513. return 0;
  514. }
  515. /*
  516. * qla2x00_eh_wait_on_command
  517. * Waits for the command to be returned by the Firmware for some
  518. * max time.
  519. *
  520. * Input:
  521. * cmd = Scsi Command to wait on.
  522. *
  523. * Return:
  524. * Not Found : 0
  525. * Found : 1
  526. */
  527. static int
  528. qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
  529. {
  530. #define ABORT_POLLING_PERIOD 1000
  531. #define ABORT_WAIT_ITER ((10 * 1000) / (ABORT_POLLING_PERIOD))
  532. unsigned long wait_iter = ABORT_WAIT_ITER;
  533. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  534. struct qla_hw_data *ha = vha->hw;
  535. int ret = QLA_SUCCESS;
  536. if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
  537. DEBUG17(qla_printk(KERN_WARNING, ha, "return:eh_wait\n"));
  538. return ret;
  539. }
  540. while (CMD_SP(cmd) && wait_iter--) {
  541. msleep(ABORT_POLLING_PERIOD);
  542. }
  543. if (CMD_SP(cmd))
  544. ret = QLA_FUNCTION_FAILED;
  545. return ret;
  546. }
  547. /*
  548. * qla2x00_wait_for_hba_online
  549. * Wait till the HBA is online after going through
  550. * <= MAX_RETRIES_OF_ISP_ABORT or
  551. * finally HBA is disabled ie marked offline
  552. *
  553. * Input:
  554. * ha - pointer to host adapter structure
  555. *
  556. * Note:
  557. * Does context switching-Release SPIN_LOCK
  558. * (if any) before calling this routine.
  559. *
  560. * Return:
  561. * Success (Adapter is online) : 0
  562. * Failed (Adapter is offline/disabled) : 1
  563. */
  564. int
  565. qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
  566. {
  567. int return_status;
  568. unsigned long wait_online;
  569. struct qla_hw_data *ha = vha->hw;
  570. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  571. wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
  572. while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
  573. test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
  574. test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
  575. ha->dpc_active) && time_before(jiffies, wait_online)) {
  576. msleep(1000);
  577. }
  578. if (base_vha->flags.online)
  579. return_status = QLA_SUCCESS;
  580. else
  581. return_status = QLA_FUNCTION_FAILED;
  582. return (return_status);
  583. }
  584. /*
  585. * qla2x00_wait_for_reset_ready
  586. * Wait till the HBA is online after going through
  587. * <= MAX_RETRIES_OF_ISP_ABORT or
  588. * finally HBA is disabled ie marked offline or flash
  589. * operations are in progress.
  590. *
  591. * Input:
  592. * ha - pointer to host adapter structure
  593. *
  594. * Note:
  595. * Does context switching-Release SPIN_LOCK
  596. * (if any) before calling this routine.
  597. *
  598. * Return:
  599. * Success (Adapter is online/no flash ops) : 0
  600. * Failed (Adapter is offline/disabled/flash ops in progress) : 1
  601. */
  602. static int
  603. qla2x00_wait_for_reset_ready(scsi_qla_host_t *vha)
  604. {
  605. int return_status;
  606. unsigned long wait_online;
  607. struct qla_hw_data *ha = vha->hw;
  608. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  609. wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
  610. while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
  611. test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
  612. test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
  613. ha->optrom_state != QLA_SWAITING ||
  614. ha->dpc_active) && time_before(jiffies, wait_online))
  615. msleep(1000);
  616. if (base_vha->flags.online && ha->optrom_state == QLA_SWAITING)
  617. return_status = QLA_SUCCESS;
  618. else
  619. return_status = QLA_FUNCTION_FAILED;
  620. DEBUG2(printk("%s return_status=%d\n", __func__, return_status));
  621. return return_status;
  622. }
  623. int
  624. qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
  625. {
  626. int return_status;
  627. unsigned long wait_reset;
  628. struct qla_hw_data *ha = vha->hw;
  629. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  630. wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
  631. while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
  632. test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
  633. test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
  634. ha->dpc_active) && time_before(jiffies, wait_reset)) {
  635. msleep(1000);
  636. if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
  637. ha->flags.chip_reset_done)
  638. break;
  639. }
  640. if (ha->flags.chip_reset_done)
  641. return_status = QLA_SUCCESS;
  642. else
  643. return_status = QLA_FUNCTION_FAILED;
  644. return return_status;
  645. }
  646. /*
  647. * qla2x00_wait_for_loop_ready
  648. * Wait for MAX_LOOP_TIMEOUT(5 min) value for loop
  649. * to be in LOOP_READY state.
  650. * Input:
  651. * ha - pointer to host adapter structure
  652. *
  653. * Note:
  654. * Does context switching-Release SPIN_LOCK
  655. * (if any) before calling this routine.
  656. *
  657. *
  658. * Return:
  659. * Success (LOOP_READY) : 0
  660. * Failed (LOOP_NOT_READY) : 1
  661. */
  662. static inline int
  663. qla2x00_wait_for_loop_ready(scsi_qla_host_t *vha)
  664. {
  665. int return_status = QLA_SUCCESS;
  666. unsigned long loop_timeout ;
  667. struct qla_hw_data *ha = vha->hw;
  668. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  669. /* wait for 5 min at the max for loop to be ready */
  670. loop_timeout = jiffies + (MAX_LOOP_TIMEOUT * HZ);
  671. while ((!atomic_read(&base_vha->loop_down_timer) &&
  672. atomic_read(&base_vha->loop_state) == LOOP_DOWN) ||
  673. atomic_read(&base_vha->loop_state) != LOOP_READY) {
  674. if (atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
  675. return_status = QLA_FUNCTION_FAILED;
  676. break;
  677. }
  678. msleep(1000);
  679. if (time_after_eq(jiffies, loop_timeout)) {
  680. return_status = QLA_FUNCTION_FAILED;
  681. break;
  682. }
  683. }
  684. return (return_status);
  685. }
  686. static void
  687. sp_get(struct srb *sp)
  688. {
  689. atomic_inc(&sp->ref_count);
  690. }
  691. /**************************************************************************
  692. * qla2xxx_eh_abort
  693. *
  694. * Description:
  695. * The abort function will abort the specified command.
  696. *
  697. * Input:
  698. * cmd = Linux SCSI command packet to be aborted.
  699. *
  700. * Returns:
  701. * Either SUCCESS or FAILED.
  702. *
  703. * Note:
  704. * Only return FAILED if command not returned by firmware.
  705. **************************************************************************/
  706. static int
  707. qla2xxx_eh_abort(struct scsi_cmnd *cmd)
  708. {
  709. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  710. srb_t *sp;
  711. int ret, i;
  712. unsigned int id, lun;
  713. unsigned long serial;
  714. unsigned long flags;
  715. int wait = 0;
  716. struct qla_hw_data *ha = vha->hw;
  717. struct req_que *req = vha->req;
  718. srb_t *spt;
  719. int got_ref = 0;
  720. fc_block_scsi_eh(cmd);
  721. if (!CMD_SP(cmd))
  722. return SUCCESS;
  723. ret = SUCCESS;
  724. id = cmd->device->id;
  725. lun = cmd->device->lun;
  726. serial = cmd->serial_number;
  727. spt = (srb_t *) CMD_SP(cmd);
  728. if (!spt)
  729. return SUCCESS;
  730. /* Check active list for command command. */
  731. spin_lock_irqsave(&ha->hardware_lock, flags);
  732. for (i = 1; i < MAX_OUTSTANDING_COMMANDS; i++) {
  733. sp = req->outstanding_cmds[i];
  734. if (sp == NULL)
  735. continue;
  736. if ((sp->ctx) && !(sp->flags & SRB_FCP_CMND_DMA_VALID) &&
  737. !IS_PROT_IO(sp))
  738. continue;
  739. if (sp->cmd != cmd)
  740. continue;
  741. DEBUG2(printk("%s(%ld): aborting sp %p from RISC."
  742. " pid=%ld.\n", __func__, vha->host_no, sp, serial));
  743. /* Get a reference to the sp and drop the lock.*/
  744. sp_get(sp);
  745. got_ref++;
  746. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  747. if (ha->isp_ops->abort_command(sp)) {
  748. DEBUG2(printk("%s(%ld): abort_command "
  749. "mbx failed.\n", __func__, vha->host_no));
  750. ret = FAILED;
  751. } else {
  752. DEBUG3(printk("%s(%ld): abort_command "
  753. "mbx success.\n", __func__, vha->host_no));
  754. wait = 1;
  755. }
  756. spin_lock_irqsave(&ha->hardware_lock, flags);
  757. break;
  758. }
  759. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  760. /* Wait for the command to be returned. */
  761. if (wait) {
  762. if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
  763. qla_printk(KERN_ERR, ha,
  764. "scsi(%ld:%d:%d): Abort handler timed out -- %lx "
  765. "%x.\n", vha->host_no, id, lun, serial, ret);
  766. ret = FAILED;
  767. }
  768. }
  769. if (got_ref)
  770. qla2x00_sp_compl(ha, sp);
  771. qla_printk(KERN_INFO, ha,
  772. "scsi(%ld:%d:%d): Abort command issued -- %d %lx %x.\n",
  773. vha->host_no, id, lun, wait, serial, ret);
  774. return ret;
  775. }
  776. int
  777. qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
  778. unsigned int l, enum nexus_wait_type type)
  779. {
  780. int cnt, match, status;
  781. unsigned long flags;
  782. struct qla_hw_data *ha = vha->hw;
  783. struct req_que *req;
  784. srb_t *sp;
  785. status = QLA_SUCCESS;
  786. spin_lock_irqsave(&ha->hardware_lock, flags);
  787. req = vha->req;
  788. for (cnt = 1; status == QLA_SUCCESS &&
  789. cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
  790. sp = req->outstanding_cmds[cnt];
  791. if (!sp)
  792. continue;
  793. if ((sp->ctx) && !IS_PROT_IO(sp))
  794. continue;
  795. if (vha->vp_idx != sp->fcport->vha->vp_idx)
  796. continue;
  797. match = 0;
  798. switch (type) {
  799. case WAIT_HOST:
  800. match = 1;
  801. break;
  802. case WAIT_TARGET:
  803. match = sp->cmd->device->id == t;
  804. break;
  805. case WAIT_LUN:
  806. match = (sp->cmd->device->id == t &&
  807. sp->cmd->device->lun == l);
  808. break;
  809. }
  810. if (!match)
  811. continue;
  812. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  813. status = qla2x00_eh_wait_on_command(sp->cmd);
  814. spin_lock_irqsave(&ha->hardware_lock, flags);
  815. }
  816. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  817. return status;
  818. }
  819. static char *reset_errors[] = {
  820. "HBA not online",
  821. "HBA not ready",
  822. "Task management failed",
  823. "Waiting for command completions",
  824. };
  825. static int
  826. __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
  827. struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, unsigned int, int))
  828. {
  829. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  830. fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
  831. int err;
  832. fc_block_scsi_eh(cmd);
  833. if (!fcport)
  834. return FAILED;
  835. qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET ISSUED.\n",
  836. vha->host_no, cmd->device->id, cmd->device->lun, name);
  837. err = 0;
  838. if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS)
  839. goto eh_reset_failed;
  840. err = 1;
  841. if (qla2x00_wait_for_loop_ready(vha) != QLA_SUCCESS)
  842. goto eh_reset_failed;
  843. err = 2;
  844. if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
  845. != QLA_SUCCESS)
  846. goto eh_reset_failed;
  847. err = 3;
  848. if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
  849. cmd->device->lun, type) != QLA_SUCCESS)
  850. goto eh_reset_failed;
  851. qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET SUCCEEDED.\n",
  852. vha->host_no, cmd->device->id, cmd->device->lun, name);
  853. return SUCCESS;
  854. eh_reset_failed:
  855. qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET FAILED: %s.\n"
  856. , vha->host_no, cmd->device->id, cmd->device->lun, name,
  857. reset_errors[err]);
  858. return FAILED;
  859. }
  860. static int
  861. qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
  862. {
  863. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  864. struct qla_hw_data *ha = vha->hw;
  865. return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
  866. ha->isp_ops->lun_reset);
  867. }
  868. static int
  869. qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
  870. {
  871. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  872. struct qla_hw_data *ha = vha->hw;
  873. return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
  874. ha->isp_ops->target_reset);
  875. }
  876. /**************************************************************************
  877. * qla2xxx_eh_bus_reset
  878. *
  879. * Description:
  880. * The bus reset function will reset the bus and abort any executing
  881. * commands.
  882. *
  883. * Input:
  884. * cmd = Linux SCSI command packet of the command that cause the
  885. * bus reset.
  886. *
  887. * Returns:
  888. * SUCCESS/FAILURE (defined as macro in scsi.h).
  889. *
  890. **************************************************************************/
  891. static int
  892. qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
  893. {
  894. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  895. fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
  896. int ret = FAILED;
  897. unsigned int id, lun;
  898. unsigned long serial;
  899. fc_block_scsi_eh(cmd);
  900. id = cmd->device->id;
  901. lun = cmd->device->lun;
  902. serial = cmd->serial_number;
  903. if (!fcport)
  904. return ret;
  905. qla_printk(KERN_INFO, vha->hw,
  906. "scsi(%ld:%d:%d): BUS RESET ISSUED.\n", vha->host_no, id, lun);
  907. if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
  908. DEBUG2(printk("%s failed:board disabled\n",__func__));
  909. goto eh_bus_reset_done;
  910. }
  911. if (qla2x00_wait_for_loop_ready(vha) == QLA_SUCCESS) {
  912. if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
  913. ret = SUCCESS;
  914. }
  915. if (ret == FAILED)
  916. goto eh_bus_reset_done;
  917. /* Flush outstanding commands. */
  918. if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
  919. QLA_SUCCESS)
  920. ret = FAILED;
  921. eh_bus_reset_done:
  922. qla_printk(KERN_INFO, vha->hw, "%s: reset %s\n", __func__,
  923. (ret == FAILED) ? "failed" : "succeded");
  924. return ret;
  925. }
  926. /**************************************************************************
  927. * qla2xxx_eh_host_reset
  928. *
  929. * Description:
  930. * The reset function will reset the Adapter.
  931. *
  932. * Input:
  933. * cmd = Linux SCSI command packet of the command that cause the
  934. * adapter reset.
  935. *
  936. * Returns:
  937. * Either SUCCESS or FAILED.
  938. *
  939. * Note:
  940. **************************************************************************/
  941. static int
  942. qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
  943. {
  944. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  945. fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
  946. struct qla_hw_data *ha = vha->hw;
  947. int ret = FAILED;
  948. unsigned int id, lun;
  949. unsigned long serial;
  950. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  951. fc_block_scsi_eh(cmd);
  952. id = cmd->device->id;
  953. lun = cmd->device->lun;
  954. serial = cmd->serial_number;
  955. if (!fcport)
  956. return ret;
  957. qla_printk(KERN_INFO, ha,
  958. "scsi(%ld:%d:%d): ADAPTER RESET ISSUED.\n", vha->host_no, id, lun);
  959. if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS)
  960. goto eh_host_reset_lock;
  961. /*
  962. * Fixme-may be dpc thread is active and processing
  963. * loop_resync,so wait a while for it to
  964. * be completed and then issue big hammer.Otherwise
  965. * it may cause I/O failure as big hammer marks the
  966. * devices as lost kicking of the port_down_timer
  967. * while dpc is stuck for the mailbox to complete.
  968. */
  969. qla2x00_wait_for_loop_ready(vha);
  970. if (vha != base_vha) {
  971. if (qla2x00_vp_abort_isp(vha))
  972. goto eh_host_reset_lock;
  973. } else {
  974. if (IS_QLA82XX(vha->hw)) {
  975. if (!qla82xx_fcoe_ctx_reset(vha)) {
  976. /* Ctx reset success */
  977. ret = SUCCESS;
  978. goto eh_host_reset_lock;
  979. }
  980. /* fall thru if ctx reset failed */
  981. }
  982. if (ha->wq)
  983. flush_workqueue(ha->wq);
  984. set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  985. if (ha->isp_ops->abort_isp(base_vha)) {
  986. clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  987. /* failed. schedule dpc to try */
  988. set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
  989. if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS)
  990. goto eh_host_reset_lock;
  991. }
  992. clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  993. }
  994. /* Waiting for command to be returned to OS.*/
  995. if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
  996. QLA_SUCCESS)
  997. ret = SUCCESS;
  998. eh_host_reset_lock:
  999. qla_printk(KERN_INFO, ha, "%s: reset %s\n", __func__,
  1000. (ret == FAILED) ? "failed" : "succeded");
  1001. return ret;
  1002. }
  1003. /*
  1004. * qla2x00_loop_reset
  1005. * Issue loop reset.
  1006. *
  1007. * Input:
  1008. * ha = adapter block pointer.
  1009. *
  1010. * Returns:
  1011. * 0 = success
  1012. */
  1013. int
  1014. qla2x00_loop_reset(scsi_qla_host_t *vha)
  1015. {
  1016. int ret;
  1017. struct fc_port *fcport;
  1018. struct qla_hw_data *ha = vha->hw;
  1019. if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
  1020. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  1021. if (fcport->port_type != FCT_TARGET)
  1022. continue;
  1023. ret = ha->isp_ops->target_reset(fcport, 0, 0);
  1024. if (ret != QLA_SUCCESS) {
  1025. DEBUG2_3(printk("%s(%ld): bus_reset failed: "
  1026. "target_reset=%d d_id=%x.\n", __func__,
  1027. vha->host_no, ret, fcport->d_id.b24));
  1028. }
  1029. }
  1030. }
  1031. if (ha->flags.enable_lip_full_login && !IS_QLA8XXX_TYPE(ha)) {
  1032. ret = qla2x00_full_login_lip(vha);
  1033. if (ret != QLA_SUCCESS) {
  1034. DEBUG2_3(printk("%s(%ld): failed: "
  1035. "full_login_lip=%d.\n", __func__, vha->host_no,
  1036. ret));
  1037. }
  1038. atomic_set(&vha->loop_state, LOOP_DOWN);
  1039. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  1040. qla2x00_mark_all_devices_lost(vha, 0);
  1041. qla2x00_wait_for_loop_ready(vha);
  1042. }
  1043. if (ha->flags.enable_lip_reset) {
  1044. ret = qla2x00_lip_reset(vha);
  1045. if (ret != QLA_SUCCESS) {
  1046. DEBUG2_3(printk("%s(%ld): failed: "
  1047. "lip_reset=%d.\n", __func__, vha->host_no, ret));
  1048. } else
  1049. qla2x00_wait_for_loop_ready(vha);
  1050. }
  1051. /* Issue marker command only when we are going to start the I/O */
  1052. vha->marker_needed = 1;
  1053. return QLA_SUCCESS;
  1054. }
  1055. void
  1056. qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
  1057. {
  1058. int que, cnt;
  1059. unsigned long flags;
  1060. srb_t *sp;
  1061. struct srb_ctx *ctx;
  1062. struct qla_hw_data *ha = vha->hw;
  1063. struct req_que *req;
  1064. spin_lock_irqsave(&ha->hardware_lock, flags);
  1065. for (que = 0; que < ha->max_req_queues; que++) {
  1066. req = ha->req_q_map[que];
  1067. if (!req)
  1068. continue;
  1069. for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
  1070. sp = req->outstanding_cmds[cnt];
  1071. if (sp) {
  1072. req->outstanding_cmds[cnt] = NULL;
  1073. if (!sp->ctx ||
  1074. (sp->flags & SRB_FCP_CMND_DMA_VALID) ||
  1075. IS_PROT_IO(sp)) {
  1076. sp->cmd->result = res;
  1077. qla2x00_sp_compl(ha, sp);
  1078. } else {
  1079. ctx = sp->ctx;
  1080. if (ctx->type == SRB_LOGIN_CMD ||
  1081. ctx->type == SRB_LOGOUT_CMD) {
  1082. ctx->u.iocb_cmd->free(sp);
  1083. } else {
  1084. struct fc_bsg_job *bsg_job =
  1085. ctx->u.bsg_job;
  1086. if (bsg_job->request->msgcode
  1087. == FC_BSG_HST_CT)
  1088. kfree(sp->fcport);
  1089. bsg_job->req->errors = 0;
  1090. bsg_job->reply->result = res;
  1091. bsg_job->job_done(bsg_job);
  1092. kfree(sp->ctx);
  1093. mempool_free(sp,
  1094. ha->srb_mempool);
  1095. }
  1096. }
  1097. }
  1098. }
  1099. }
  1100. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1101. }
  1102. static int
  1103. qla2xxx_slave_alloc(struct scsi_device *sdev)
  1104. {
  1105. struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
  1106. if (!rport || fc_remote_port_chkready(rport))
  1107. return -ENXIO;
  1108. sdev->hostdata = *(fc_port_t **)rport->dd_data;
  1109. return 0;
  1110. }
  1111. static int
  1112. qla2xxx_slave_configure(struct scsi_device *sdev)
  1113. {
  1114. scsi_qla_host_t *vha = shost_priv(sdev->host);
  1115. struct req_que *req = vha->req;
  1116. if (sdev->tagged_supported)
  1117. scsi_activate_tcq(sdev, req->max_q_depth);
  1118. else
  1119. scsi_deactivate_tcq(sdev, req->max_q_depth);
  1120. return 0;
  1121. }
  1122. static void
  1123. qla2xxx_slave_destroy(struct scsi_device *sdev)
  1124. {
  1125. sdev->hostdata = NULL;
  1126. }
  1127. static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
  1128. {
  1129. fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
  1130. if (!scsi_track_queue_full(sdev, qdepth))
  1131. return;
  1132. DEBUG2(qla_printk(KERN_INFO, fcport->vha->hw,
  1133. "scsi(%ld:%d:%d:%d): Queue depth adjusted-down to %d.\n",
  1134. fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
  1135. sdev->queue_depth));
  1136. }
  1137. static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
  1138. {
  1139. fc_port_t *fcport = sdev->hostdata;
  1140. struct scsi_qla_host *vha = fcport->vha;
  1141. struct qla_hw_data *ha = vha->hw;
  1142. struct req_que *req = NULL;
  1143. req = vha->req;
  1144. if (!req)
  1145. return;
  1146. if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
  1147. return;
  1148. if (sdev->ordered_tags)
  1149. scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
  1150. else
  1151. scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);
  1152. DEBUG2(qla_printk(KERN_INFO, ha,
  1153. "scsi(%ld:%d:%d:%d): Queue depth adjusted-up to %d.\n",
  1154. fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
  1155. sdev->queue_depth));
  1156. }
  1157. static int
  1158. qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
  1159. {
  1160. switch (reason) {
  1161. case SCSI_QDEPTH_DEFAULT:
  1162. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  1163. break;
  1164. case SCSI_QDEPTH_QFULL:
  1165. qla2x00_handle_queue_full(sdev, qdepth);
  1166. break;
  1167. case SCSI_QDEPTH_RAMP_UP:
  1168. qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
  1169. break;
  1170. default:
  1171. return -EOPNOTSUPP;
  1172. }
  1173. return sdev->queue_depth;
  1174. }
  1175. static int
  1176. qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type)
  1177. {
  1178. if (sdev->tagged_supported) {
  1179. scsi_set_tag_type(sdev, tag_type);
  1180. if (tag_type)
  1181. scsi_activate_tcq(sdev, sdev->queue_depth);
  1182. else
  1183. scsi_deactivate_tcq(sdev, sdev->queue_depth);
  1184. } else
  1185. tag_type = 0;
  1186. return tag_type;
  1187. }
  1188. /**
  1189. * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
  1190. * @ha: HA context
  1191. *
  1192. * At exit, the @ha's flags.enable_64bit_addressing set to indicated
  1193. * supported addressing method.
  1194. */
  1195. static void
  1196. qla2x00_config_dma_addressing(struct qla_hw_data *ha)
  1197. {
  1198. /* Assume a 32bit DMA mask. */
  1199. ha->flags.enable_64bit_addressing = 0;
  1200. if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
  1201. /* Any upper-dword bits set? */
  1202. if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
  1203. !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
  1204. /* Ok, a 64bit DMA mask is applicable. */
  1205. ha->flags.enable_64bit_addressing = 1;
  1206. ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
  1207. ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
  1208. return;
  1209. }
  1210. }
  1211. dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
  1212. pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
  1213. }
  1214. static void
  1215. qla2x00_enable_intrs(struct qla_hw_data *ha)
  1216. {
  1217. unsigned long flags = 0;
  1218. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1219. spin_lock_irqsave(&ha->hardware_lock, flags);
  1220. ha->interrupts_on = 1;
  1221. /* enable risc and host interrupts */
  1222. WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
  1223. RD_REG_WORD(&reg->ictrl);
  1224. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1225. }
  1226. static void
  1227. qla2x00_disable_intrs(struct qla_hw_data *ha)
  1228. {
  1229. unsigned long flags = 0;
  1230. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1231. spin_lock_irqsave(&ha->hardware_lock, flags);
  1232. ha->interrupts_on = 0;
  1233. /* disable risc and host interrupts */
  1234. WRT_REG_WORD(&reg->ictrl, 0);
  1235. RD_REG_WORD(&reg->ictrl);
  1236. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1237. }
  1238. static void
  1239. qla24xx_enable_intrs(struct qla_hw_data *ha)
  1240. {
  1241. unsigned long flags = 0;
  1242. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  1243. spin_lock_irqsave(&ha->hardware_lock, flags);
  1244. ha->interrupts_on = 1;
  1245. WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
  1246. RD_REG_DWORD(&reg->ictrl);
  1247. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1248. }
  1249. static void
  1250. qla24xx_disable_intrs(struct qla_hw_data *ha)
  1251. {
  1252. unsigned long flags = 0;
  1253. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  1254. if (IS_NOPOLLING_TYPE(ha))
  1255. return;
  1256. spin_lock_irqsave(&ha->hardware_lock, flags);
  1257. ha->interrupts_on = 0;
  1258. WRT_REG_DWORD(&reg->ictrl, 0);
  1259. RD_REG_DWORD(&reg->ictrl);
  1260. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1261. }
  1262. static struct isp_operations qla2100_isp_ops = {
  1263. .pci_config = qla2100_pci_config,
  1264. .reset_chip = qla2x00_reset_chip,
  1265. .chip_diag = qla2x00_chip_diag,
  1266. .config_rings = qla2x00_config_rings,
  1267. .reset_adapter = qla2x00_reset_adapter,
  1268. .nvram_config = qla2x00_nvram_config,
  1269. .update_fw_options = qla2x00_update_fw_options,
  1270. .load_risc = qla2x00_load_risc,
  1271. .pci_info_str = qla2x00_pci_info_str,
  1272. .fw_version_str = qla2x00_fw_version_str,
  1273. .intr_handler = qla2100_intr_handler,
  1274. .enable_intrs = qla2x00_enable_intrs,
  1275. .disable_intrs = qla2x00_disable_intrs,
  1276. .abort_command = qla2x00_abort_command,
  1277. .target_reset = qla2x00_abort_target,
  1278. .lun_reset = qla2x00_lun_reset,
  1279. .fabric_login = qla2x00_login_fabric,
  1280. .fabric_logout = qla2x00_fabric_logout,
  1281. .calc_req_entries = qla2x00_calc_iocbs_32,
  1282. .build_iocbs = qla2x00_build_scsi_iocbs_32,
  1283. .prep_ms_iocb = qla2x00_prep_ms_iocb,
  1284. .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
  1285. .read_nvram = qla2x00_read_nvram_data,
  1286. .write_nvram = qla2x00_write_nvram_data,
  1287. .fw_dump = qla2100_fw_dump,
  1288. .beacon_on = NULL,
  1289. .beacon_off = NULL,
  1290. .beacon_blink = NULL,
  1291. .read_optrom = qla2x00_read_optrom_data,
  1292. .write_optrom = qla2x00_write_optrom_data,
  1293. .get_flash_version = qla2x00_get_flash_version,
  1294. .start_scsi = qla2x00_start_scsi,
  1295. .abort_isp = qla2x00_abort_isp,
  1296. };
  1297. static struct isp_operations qla2300_isp_ops = {
  1298. .pci_config = qla2300_pci_config,
  1299. .reset_chip = qla2x00_reset_chip,
  1300. .chip_diag = qla2x00_chip_diag,
  1301. .config_rings = qla2x00_config_rings,
  1302. .reset_adapter = qla2x00_reset_adapter,
  1303. .nvram_config = qla2x00_nvram_config,
  1304. .update_fw_options = qla2x00_update_fw_options,
  1305. .load_risc = qla2x00_load_risc,
  1306. .pci_info_str = qla2x00_pci_info_str,
  1307. .fw_version_str = qla2x00_fw_version_str,
  1308. .intr_handler = qla2300_intr_handler,
  1309. .enable_intrs = qla2x00_enable_intrs,
  1310. .disable_intrs = qla2x00_disable_intrs,
  1311. .abort_command = qla2x00_abort_command,
  1312. .target_reset = qla2x00_abort_target,
  1313. .lun_reset = qla2x00_lun_reset,
  1314. .fabric_login = qla2x00_login_fabric,
  1315. .fabric_logout = qla2x00_fabric_logout,
  1316. .calc_req_entries = qla2x00_calc_iocbs_32,
  1317. .build_iocbs = qla2x00_build_scsi_iocbs_32,
  1318. .prep_ms_iocb = qla2x00_prep_ms_iocb,
  1319. .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
  1320. .read_nvram = qla2x00_read_nvram_data,
  1321. .write_nvram = qla2x00_write_nvram_data,
  1322. .fw_dump = qla2300_fw_dump,
  1323. .beacon_on = qla2x00_beacon_on,
  1324. .beacon_off = qla2x00_beacon_off,
  1325. .beacon_blink = qla2x00_beacon_blink,
  1326. .read_optrom = qla2x00_read_optrom_data,
  1327. .write_optrom = qla2x00_write_optrom_data,
  1328. .get_flash_version = qla2x00_get_flash_version,
  1329. .start_scsi = qla2x00_start_scsi,
  1330. .abort_isp = qla2x00_abort_isp,
  1331. };
  1332. static struct isp_operations qla24xx_isp_ops = {
  1333. .pci_config = qla24xx_pci_config,
  1334. .reset_chip = qla24xx_reset_chip,
  1335. .chip_diag = qla24xx_chip_diag,
  1336. .config_rings = qla24xx_config_rings,
  1337. .reset_adapter = qla24xx_reset_adapter,
  1338. .nvram_config = qla24xx_nvram_config,
  1339. .update_fw_options = qla24xx_update_fw_options,
  1340. .load_risc = qla24xx_load_risc,
  1341. .pci_info_str = qla24xx_pci_info_str,
  1342. .fw_version_str = qla24xx_fw_version_str,
  1343. .intr_handler = qla24xx_intr_handler,
  1344. .enable_intrs = qla24xx_enable_intrs,
  1345. .disable_intrs = qla24xx_disable_intrs,
  1346. .abort_command = qla24xx_abort_command,
  1347. .target_reset = qla24xx_abort_target,
  1348. .lun_reset = qla24xx_lun_reset,
  1349. .fabric_login = qla24xx_login_fabric,
  1350. .fabric_logout = qla24xx_fabric_logout,
  1351. .calc_req_entries = NULL,
  1352. .build_iocbs = NULL,
  1353. .prep_ms_iocb = qla24xx_prep_ms_iocb,
  1354. .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
  1355. .read_nvram = qla24xx_read_nvram_data,
  1356. .write_nvram = qla24xx_write_nvram_data,
  1357. .fw_dump = qla24xx_fw_dump,
  1358. .beacon_on = qla24xx_beacon_on,
  1359. .beacon_off = qla24xx_beacon_off,
  1360. .beacon_blink = qla24xx_beacon_blink,
  1361. .read_optrom = qla24xx_read_optrom_data,
  1362. .write_optrom = qla24xx_write_optrom_data,
  1363. .get_flash_version = qla24xx_get_flash_version,
  1364. .start_scsi = qla24xx_start_scsi,
  1365. .abort_isp = qla2x00_abort_isp,
  1366. };
  1367. static struct isp_operations qla25xx_isp_ops = {
  1368. .pci_config = qla25xx_pci_config,
  1369. .reset_chip = qla24xx_reset_chip,
  1370. .chip_diag = qla24xx_chip_diag,
  1371. .config_rings = qla24xx_config_rings,
  1372. .reset_adapter = qla24xx_reset_adapter,
  1373. .nvram_config = qla24xx_nvram_config,
  1374. .update_fw_options = qla24xx_update_fw_options,
  1375. .load_risc = qla24xx_load_risc,
  1376. .pci_info_str = qla24xx_pci_info_str,
  1377. .fw_version_str = qla24xx_fw_version_str,
  1378. .intr_handler = qla24xx_intr_handler,
  1379. .enable_intrs = qla24xx_enable_intrs,
  1380. .disable_intrs = qla24xx_disable_intrs,
  1381. .abort_command = qla24xx_abort_command,
  1382. .target_reset = qla24xx_abort_target,
  1383. .lun_reset = qla24xx_lun_reset,
  1384. .fabric_login = qla24xx_login_fabric,
  1385. .fabric_logout = qla24xx_fabric_logout,
  1386. .calc_req_entries = NULL,
  1387. .build_iocbs = NULL,
  1388. .prep_ms_iocb = qla24xx_prep_ms_iocb,
  1389. .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
  1390. .read_nvram = qla25xx_read_nvram_data,
  1391. .write_nvram = qla25xx_write_nvram_data,
  1392. .fw_dump = qla25xx_fw_dump,
  1393. .beacon_on = qla24xx_beacon_on,
  1394. .beacon_off = qla24xx_beacon_off,
  1395. .beacon_blink = qla24xx_beacon_blink,
  1396. .read_optrom = qla25xx_read_optrom_data,
  1397. .write_optrom = qla24xx_write_optrom_data,
  1398. .get_flash_version = qla24xx_get_flash_version,
  1399. .start_scsi = qla24xx_dif_start_scsi,
  1400. .abort_isp = qla2x00_abort_isp,
  1401. };
  1402. static struct isp_operations qla81xx_isp_ops = {
  1403. .pci_config = qla25xx_pci_config,
  1404. .reset_chip = qla24xx_reset_chip,
  1405. .chip_diag = qla24xx_chip_diag,
  1406. .config_rings = qla24xx_config_rings,
  1407. .reset_adapter = qla24xx_reset_adapter,
  1408. .nvram_config = qla81xx_nvram_config,
  1409. .update_fw_options = qla81xx_update_fw_options,
  1410. .load_risc = qla81xx_load_risc,
  1411. .pci_info_str = qla24xx_pci_info_str,
  1412. .fw_version_str = qla24xx_fw_version_str,
  1413. .intr_handler = qla24xx_intr_handler,
  1414. .enable_intrs = qla24xx_enable_intrs,
  1415. .disable_intrs = qla24xx_disable_intrs,
  1416. .abort_command = qla24xx_abort_command,
  1417. .target_reset = qla24xx_abort_target,
  1418. .lun_reset = qla24xx_lun_reset,
  1419. .fabric_login = qla24xx_login_fabric,
  1420. .fabric_logout = qla24xx_fabric_logout,
  1421. .calc_req_entries = NULL,
  1422. .build_iocbs = NULL,
  1423. .prep_ms_iocb = qla24xx_prep_ms_iocb,
  1424. .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
  1425. .read_nvram = NULL,
  1426. .write_nvram = NULL,
  1427. .fw_dump = qla81xx_fw_dump,
  1428. .beacon_on = qla24xx_beacon_on,
  1429. .beacon_off = qla24xx_beacon_off,
  1430. .beacon_blink = qla24xx_beacon_blink,
  1431. .read_optrom = qla25xx_read_optrom_data,
  1432. .write_optrom = qla24xx_write_optrom_data,
  1433. .get_flash_version = qla24xx_get_flash_version,
  1434. .start_scsi = qla24xx_dif_start_scsi,
  1435. .abort_isp = qla2x00_abort_isp,
  1436. };
  1437. static struct isp_operations qla82xx_isp_ops = {
  1438. .pci_config = qla82xx_pci_config,
  1439. .reset_chip = qla82xx_reset_chip,
  1440. .chip_diag = qla24xx_chip_diag,
  1441. .config_rings = qla82xx_config_rings,
  1442. .reset_adapter = qla24xx_reset_adapter,
  1443. .nvram_config = qla81xx_nvram_config,
  1444. .update_fw_options = qla24xx_update_fw_options,
  1445. .load_risc = qla82xx_load_risc,
  1446. .pci_info_str = qla82xx_pci_info_str,
  1447. .fw_version_str = qla24xx_fw_version_str,
  1448. .intr_handler = qla82xx_intr_handler,
  1449. .enable_intrs = qla82xx_enable_intrs,
  1450. .disable_intrs = qla82xx_disable_intrs,
  1451. .abort_command = qla24xx_abort_command,
  1452. .target_reset = qla24xx_abort_target,
  1453. .lun_reset = qla24xx_lun_reset,
  1454. .fabric_login = qla24xx_login_fabric,
  1455. .fabric_logout = qla24xx_fabric_logout,
  1456. .calc_req_entries = NULL,
  1457. .build_iocbs = NULL,
  1458. .prep_ms_iocb = qla24xx_prep_ms_iocb,
  1459. .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
  1460. .read_nvram = qla24xx_read_nvram_data,
  1461. .write_nvram = qla24xx_write_nvram_data,
  1462. .fw_dump = qla24xx_fw_dump,
  1463. .beacon_on = qla24xx_beacon_on,
  1464. .beacon_off = qla24xx_beacon_off,
  1465. .beacon_blink = qla24xx_beacon_blink,
  1466. .read_optrom = qla82xx_read_optrom_data,
  1467. .write_optrom = qla82xx_write_optrom_data,
  1468. .get_flash_version = qla24xx_get_flash_version,
  1469. .start_scsi = qla82xx_start_scsi,
  1470. .abort_isp = qla82xx_abort_isp,
  1471. };
  1472. static inline void
  1473. qla2x00_set_isp_flags(struct qla_hw_data *ha)
  1474. {
  1475. ha->device_type = DT_EXTENDED_IDS;
  1476. switch (ha->pdev->device) {
  1477. case PCI_DEVICE_ID_QLOGIC_ISP2100:
  1478. ha->device_type |= DT_ISP2100;
  1479. ha->device_type &= ~DT_EXTENDED_IDS;
  1480. ha->fw_srisc_address = RISC_START_ADDRESS_2100;
  1481. break;
  1482. case PCI_DEVICE_ID_QLOGIC_ISP2200:
  1483. ha->device_type |= DT_ISP2200;
  1484. ha->device_type &= ~DT_EXTENDED_IDS;
  1485. ha->fw_srisc_address = RISC_START_ADDRESS_2100;
  1486. break;
  1487. case PCI_DEVICE_ID_QLOGIC_ISP2300:
  1488. ha->device_type |= DT_ISP2300;
  1489. ha->device_type |= DT_ZIO_SUPPORTED;
  1490. ha->fw_srisc_address = RISC_START_ADDRESS_2300;
  1491. break;
  1492. case PCI_DEVICE_ID_QLOGIC_ISP2312:
  1493. ha->device_type |= DT_ISP2312;
  1494. ha->device_type |= DT_ZIO_SUPPORTED;
  1495. ha->fw_srisc_address = RISC_START_ADDRESS_2300;
  1496. break;
  1497. case PCI_DEVICE_ID_QLOGIC_ISP2322:
  1498. ha->device_type |= DT_ISP2322;
  1499. ha->device_type |= DT_ZIO_SUPPORTED;
  1500. if (ha->pdev->subsystem_vendor == 0x1028 &&
  1501. ha->pdev->subsystem_device == 0x0170)
  1502. ha->device_type |= DT_OEM_001;
  1503. ha->fw_srisc_address = RISC_START_ADDRESS_2300;
  1504. break;
  1505. case PCI_DEVICE_ID_QLOGIC_ISP6312:
  1506. ha->device_type |= DT_ISP6312;
  1507. ha->fw_srisc_address = RISC_START_ADDRESS_2300;
  1508. break;
  1509. case PCI_DEVICE_ID_QLOGIC_ISP6322:
  1510. ha->device_type |= DT_ISP6322;
  1511. ha->fw_srisc_address = RISC_START_ADDRESS_2300;
  1512. break;
  1513. case PCI_DEVICE_ID_QLOGIC_ISP2422:
  1514. ha->device_type |= DT_ISP2422;
  1515. ha->device_type |= DT_ZIO_SUPPORTED;
  1516. ha->device_type |= DT_FWI2;
  1517. ha->device_type |= DT_IIDMA;
  1518. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1519. break;
  1520. case PCI_DEVICE_ID_QLOGIC_ISP2432:
  1521. ha->device_type |= DT_ISP2432;
  1522. ha->device_type |= DT_ZIO_SUPPORTED;
  1523. ha->device_type |= DT_FWI2;
  1524. ha->device_type |= DT_IIDMA;
  1525. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1526. break;
  1527. case PCI_DEVICE_ID_QLOGIC_ISP8432:
  1528. ha->device_type |= DT_ISP8432;
  1529. ha->device_type |= DT_ZIO_SUPPORTED;
  1530. ha->device_type |= DT_FWI2;
  1531. ha->device_type |= DT_IIDMA;
  1532. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1533. break;
  1534. case PCI_DEVICE_ID_QLOGIC_ISP5422:
  1535. ha->device_type |= DT_ISP5422;
  1536. ha->device_type |= DT_FWI2;
  1537. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1538. break;
  1539. case PCI_DEVICE_ID_QLOGIC_ISP5432:
  1540. ha->device_type |= DT_ISP5432;
  1541. ha->device_type |= DT_FWI2;
  1542. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1543. break;
  1544. case PCI_DEVICE_ID_QLOGIC_ISP2532:
  1545. ha->device_type |= DT_ISP2532;
  1546. ha->device_type |= DT_ZIO_SUPPORTED;
  1547. ha->device_type |= DT_FWI2;
  1548. ha->device_type |= DT_IIDMA;
  1549. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1550. break;
  1551. case PCI_DEVICE_ID_QLOGIC_ISP8001:
  1552. ha->device_type |= DT_ISP8001;
  1553. ha->device_type |= DT_ZIO_SUPPORTED;
  1554. ha->device_type |= DT_FWI2;
  1555. ha->device_type |= DT_IIDMA;
  1556. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1557. break;
  1558. case PCI_DEVICE_ID_QLOGIC_ISP8021:
  1559. ha->device_type |= DT_ISP8021;
  1560. ha->device_type |= DT_ZIO_SUPPORTED;
  1561. ha->device_type |= DT_FWI2;
  1562. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1563. /* Initialize 82XX ISP flags */
  1564. qla82xx_init_flags(ha);
  1565. break;
  1566. }
  1567. if (IS_QLA82XX(ha))
  1568. ha->port_no = !(ha->portnum & 1);
  1569. else
  1570. /* Get adapter physical port no from interrupt pin register. */
  1571. pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
  1572. if (ha->port_no & 1)
  1573. ha->flags.port0 = 1;
  1574. else
  1575. ha->flags.port0 = 0;
  1576. }
  1577. static int
  1578. qla2x00_iospace_config(struct qla_hw_data *ha)
  1579. {
  1580. resource_size_t pio;
  1581. uint16_t msix;
  1582. int cpus;
  1583. if (IS_QLA82XX(ha))
  1584. return qla82xx_iospace_config(ha);
  1585. if (pci_request_selected_regions(ha->pdev, ha->bars,
  1586. QLA2XXX_DRIVER_NAME)) {
  1587. qla_printk(KERN_WARNING, ha,
  1588. "Failed to reserve PIO/MMIO regions (%s)\n",
  1589. pci_name(ha->pdev));
  1590. goto iospace_error_exit;
  1591. }
  1592. if (!(ha->bars & 1))
  1593. goto skip_pio;
  1594. /* We only need PIO for Flash operations on ISP2312 v2 chips. */
  1595. pio = pci_resource_start(ha->pdev, 0);
  1596. if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
  1597. if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
  1598. qla_printk(KERN_WARNING, ha,
  1599. "Invalid PCI I/O region size (%s)...\n",
  1600. pci_name(ha->pdev));
  1601. pio = 0;
  1602. }
  1603. } else {
  1604. qla_printk(KERN_WARNING, ha,
  1605. "region #0 not a PIO resource (%s)...\n",
  1606. pci_name(ha->pdev));
  1607. pio = 0;
  1608. }
  1609. ha->pio_address = pio;
  1610. skip_pio:
  1611. /* Use MMIO operations for all accesses. */
  1612. if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
  1613. qla_printk(KERN_ERR, ha,
  1614. "region #1 not an MMIO resource (%s), aborting\n",
  1615. pci_name(ha->pdev));
  1616. goto iospace_error_exit;
  1617. }
  1618. if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
  1619. qla_printk(KERN_ERR, ha,
  1620. "Invalid PCI mem region size (%s), aborting\n",
  1621. pci_name(ha->pdev));
  1622. goto iospace_error_exit;
  1623. }
  1624. ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
  1625. if (!ha->iobase) {
  1626. qla_printk(KERN_ERR, ha,
  1627. "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
  1628. goto iospace_error_exit;
  1629. }
  1630. /* Determine queue resources */
  1631. ha->max_req_queues = ha->max_rsp_queues = 1;
  1632. if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
  1633. (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
  1634. (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
  1635. goto mqiobase_exit;
  1636. ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
  1637. pci_resource_len(ha->pdev, 3));
  1638. if (ha->mqiobase) {
  1639. /* Read MSIX vector size of the board */
  1640. pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
  1641. ha->msix_count = msix;
  1642. /* Max queues are bounded by available msix vectors */
  1643. /* queue 0 uses two msix vectors */
  1644. if (ql2xmultique_tag) {
  1645. cpus = num_online_cpus();
  1646. ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
  1647. (cpus + 1) : (ha->msix_count - 1);
  1648. ha->max_req_queues = 2;
  1649. } else if (ql2xmaxqueues > 1) {
  1650. ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
  1651. QLA_MQ_SIZE : ql2xmaxqueues;
  1652. DEBUG2(qla_printk(KERN_INFO, ha, "QoS mode set, max no"
  1653. " of request queues:%d\n", ha->max_req_queues));
  1654. }
  1655. qla_printk(KERN_INFO, ha,
  1656. "MSI-X vector count: %d\n", msix);
  1657. } else
  1658. qla_printk(KERN_INFO, ha, "BAR 3 not enabled\n");
  1659. mqiobase_exit:
  1660. ha->msix_count = ha->max_rsp_queues + 1;
  1661. return (0);
  1662. iospace_error_exit:
  1663. return (-ENOMEM);
  1664. }
  1665. static void
  1666. qla2xxx_scan_start(struct Scsi_Host *shost)
  1667. {
  1668. scsi_qla_host_t *vha = shost_priv(shost);
  1669. if (vha->hw->flags.running_gold_fw)
  1670. return;
  1671. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  1672. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  1673. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  1674. set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
  1675. }
  1676. static int
  1677. qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
  1678. {
  1679. scsi_qla_host_t *vha = shost_priv(shost);
  1680. if (!vha->host)
  1681. return 1;
  1682. if (time > vha->hw->loop_reset_delay * HZ)
  1683. return 1;
  1684. return atomic_read(&vha->loop_state) == LOOP_READY;
  1685. }
  1686. /*
  1687. * PCI driver interface
  1688. */
  1689. static int __devinit
  1690. qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
  1691. {
  1692. int ret = -ENODEV;
  1693. struct Scsi_Host *host;
  1694. scsi_qla_host_t *base_vha = NULL;
  1695. struct qla_hw_data *ha;
  1696. char pci_info[30];
  1697. char fw_str[30];
  1698. struct scsi_host_template *sht;
  1699. int bars, max_id, mem_only = 0;
  1700. uint16_t req_length = 0, rsp_length = 0;
  1701. struct req_que *req = NULL;
  1702. struct rsp_que *rsp = NULL;
  1703. bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
  1704. sht = &qla2xxx_driver_template;
  1705. if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
  1706. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
  1707. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
  1708. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
  1709. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
  1710. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
  1711. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
  1712. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021) {
  1713. bars = pci_select_bars(pdev, IORESOURCE_MEM);
  1714. mem_only = 1;
  1715. }
  1716. if (mem_only) {
  1717. if (pci_enable_device_mem(pdev))
  1718. goto probe_out;
  1719. } else {
  1720. if (pci_enable_device(pdev))
  1721. goto probe_out;
  1722. }
  1723. /* This may fail but that's ok */
  1724. pci_enable_pcie_error_reporting(pdev);
  1725. ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
  1726. if (!ha) {
  1727. DEBUG(printk("Unable to allocate memory for ha\n"));
  1728. goto probe_out;
  1729. }
  1730. ha->pdev = pdev;
  1731. /* Clear our data area */
  1732. ha->bars = bars;
  1733. ha->mem_only = mem_only;
  1734. spin_lock_init(&ha->hardware_lock);
  1735. /* Set ISP-type information. */
  1736. qla2x00_set_isp_flags(ha);
  1737. /* Set EEH reset type to fundamental if required by hba */
  1738. if ( IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha)) {
  1739. pdev->needs_freset = 1;
  1740. }
  1741. /* Configure PCI I/O space */
  1742. ret = qla2x00_iospace_config(ha);
  1743. if (ret)
  1744. goto probe_hw_failed;
  1745. qla_printk(KERN_INFO, ha,
  1746. "Found an ISP%04X, irq %d, iobase 0x%p\n", pdev->device, pdev->irq,
  1747. ha->iobase);
  1748. ha->prev_topology = 0;
  1749. ha->init_cb_size = sizeof(init_cb_t);
  1750. ha->link_data_rate = PORT_SPEED_UNKNOWN;
  1751. ha->optrom_size = OPTROM_SIZE_2300;
  1752. /* Assign ISP specific operations. */
  1753. max_id = MAX_TARGETS_2200;
  1754. if (IS_QLA2100(ha)) {
  1755. max_id = MAX_TARGETS_2100;
  1756. ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
  1757. req_length = REQUEST_ENTRY_CNT_2100;
  1758. rsp_length = RESPONSE_ENTRY_CNT_2100;
  1759. ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
  1760. ha->gid_list_info_size = 4;
  1761. ha->flash_conf_off = ~0;
  1762. ha->flash_data_off = ~0;
  1763. ha->nvram_conf_off = ~0;
  1764. ha->nvram_data_off = ~0;
  1765. ha->isp_ops = &qla2100_isp_ops;
  1766. } else if (IS_QLA2200(ha)) {
  1767. ha->mbx_count = MAILBOX_REGISTER_COUNT;
  1768. req_length = REQUEST_ENTRY_CNT_2200;
  1769. rsp_length = RESPONSE_ENTRY_CNT_2100;
  1770. ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
  1771. ha->gid_list_info_size = 4;
  1772. ha->flash_conf_off = ~0;
  1773. ha->flash_data_off = ~0;
  1774. ha->nvram_conf_off = ~0;
  1775. ha->nvram_data_off = ~0;
  1776. ha->isp_ops = &qla2100_isp_ops;
  1777. } else if (IS_QLA23XX(ha)) {
  1778. ha->mbx_count = MAILBOX_REGISTER_COUNT;
  1779. req_length = REQUEST_ENTRY_CNT_2200;
  1780. rsp_length = RESPONSE_ENTRY_CNT_2300;
  1781. ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
  1782. ha->gid_list_info_size = 6;
  1783. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1784. ha->optrom_size = OPTROM_SIZE_2322;
  1785. ha->flash_conf_off = ~0;
  1786. ha->flash_data_off = ~0;
  1787. ha->nvram_conf_off = ~0;
  1788. ha->nvram_data_off = ~0;
  1789. ha->isp_ops = &qla2300_isp_ops;
  1790. } else if (IS_QLA24XX_TYPE(ha)) {
  1791. ha->mbx_count = MAILBOX_REGISTER_COUNT;
  1792. req_length = REQUEST_ENTRY_CNT_24XX;
  1793. rsp_length = RESPONSE_ENTRY_CNT_2300;
  1794. ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
  1795. ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
  1796. ha->gid_list_info_size = 8;
  1797. ha->optrom_size = OPTROM_SIZE_24XX;
  1798. ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
  1799. ha->isp_ops = &qla24xx_isp_ops;
  1800. ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
  1801. ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
  1802. ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
  1803. ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
  1804. } else if (IS_QLA25XX(ha)) {
  1805. ha->mbx_count = MAILBOX_REGISTER_COUNT;
  1806. req_length = REQUEST_ENTRY_CNT_24XX;
  1807. rsp_length = RESPONSE_ENTRY_CNT_2300;
  1808. ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
  1809. ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
  1810. ha->gid_list_info_size = 8;
  1811. ha->optrom_size = OPTROM_SIZE_25XX;
  1812. ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
  1813. ha->isp_ops = &qla25xx_isp_ops;
  1814. ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
  1815. ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
  1816. ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
  1817. ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
  1818. } else if (IS_QLA81XX(ha)) {
  1819. ha->mbx_count = MAILBOX_REGISTER_COUNT;
  1820. req_length = REQUEST_ENTRY_CNT_24XX;
  1821. rsp_length = RESPONSE_ENTRY_CNT_2300;
  1822. ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
  1823. ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
  1824. ha->gid_list_info_size = 8;
  1825. ha->optrom_size = OPTROM_SIZE_81XX;
  1826. ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
  1827. ha->isp_ops = &qla81xx_isp_ops;
  1828. ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
  1829. ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
  1830. ha->nvram_conf_off = ~0;
  1831. ha->nvram_data_off = ~0;
  1832. } else if (IS_QLA82XX(ha)) {
  1833. ha->mbx_count = MAILBOX_REGISTER_COUNT;
  1834. req_length = REQUEST_ENTRY_CNT_82XX;
  1835. rsp_length = RESPONSE_ENTRY_CNT_82XX;
  1836. ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
  1837. ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
  1838. ha->gid_list_info_size = 8;
  1839. ha->optrom_size = OPTROM_SIZE_82XX;
  1840. ha->isp_ops = &qla82xx_isp_ops;
  1841. ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
  1842. ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
  1843. ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
  1844. ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
  1845. }
  1846. mutex_init(&ha->vport_lock);
  1847. init_completion(&ha->mbx_cmd_comp);
  1848. complete(&ha->mbx_cmd_comp);
  1849. init_completion(&ha->mbx_intr_comp);
  1850. init_completion(&ha->dcbx_comp);
  1851. set_bit(0, (unsigned long *) ha->vp_idx_map);
  1852. qla2x00_config_dma_addressing(ha);
  1853. ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
  1854. if (!ret) {
  1855. qla_printk(KERN_WARNING, ha,
  1856. "[ERROR] Failed to allocate memory for adapter\n");
  1857. goto probe_hw_failed;
  1858. }
  1859. req->max_q_depth = MAX_Q_DEPTH;
  1860. if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
  1861. req->max_q_depth = ql2xmaxqdepth;
  1862. base_vha = qla2x00_create_host(sht, ha);
  1863. if (!base_vha) {
  1864. qla_printk(KERN_WARNING, ha,
  1865. "[ERROR] Failed to allocate memory for scsi_host\n");
  1866. ret = -ENOMEM;
  1867. qla2x00_mem_free(ha);
  1868. qla2x00_free_req_que(ha, req);
  1869. qla2x00_free_rsp_que(ha, rsp);
  1870. goto probe_hw_failed;
  1871. }
  1872. pci_set_drvdata(pdev, base_vha);
  1873. host = base_vha->host;
  1874. base_vha->req = req;
  1875. host->can_queue = req->length + 128;
  1876. if (IS_QLA2XXX_MIDTYPE(ha))
  1877. base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
  1878. else
  1879. base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
  1880. base_vha->vp_idx;
  1881. if (IS_QLA2100(ha))
  1882. host->sg_tablesize = 32;
  1883. host->max_id = max_id;
  1884. host->this_id = 255;
  1885. host->cmd_per_lun = 3;
  1886. host->unique_id = host->host_no;
  1887. if ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && ql2xenabledif)
  1888. host->max_cmd_len = 32;
  1889. else
  1890. host->max_cmd_len = MAX_CMDSZ;
  1891. host->max_channel = MAX_BUSES - 1;
  1892. host->max_lun = MAX_LUNS;
  1893. host->transportt = qla2xxx_transport_template;
  1894. sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
  1895. /* Set up the irqs */
  1896. ret = qla2x00_request_irqs(ha, rsp);
  1897. if (ret)
  1898. goto probe_init_failed;
  1899. pci_save_state(pdev);
  1900. /* Alloc arrays of request and response ring ptrs */
  1901. que_init:
  1902. if (!qla2x00_alloc_queues(ha)) {
  1903. qla_printk(KERN_WARNING, ha,
  1904. "[ERROR] Failed to allocate memory for queue"
  1905. " pointers\n");
  1906. goto probe_init_failed;
  1907. }
  1908. ha->rsp_q_map[0] = rsp;
  1909. ha->req_q_map[0] = req;
  1910. rsp->req = req;
  1911. req->rsp = rsp;
  1912. set_bit(0, ha->req_qid_map);
  1913. set_bit(0, ha->rsp_qid_map);
  1914. /* FWI2-capable only. */
  1915. req->req_q_in = &ha->iobase->isp24.req_q_in;
  1916. req->req_q_out = &ha->iobase->isp24.req_q_out;
  1917. rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
  1918. rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
  1919. if (ha->mqenable) {
  1920. req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
  1921. req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
  1922. rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
  1923. rsp->rsp_q_out = &ha->mqiobase->isp25mq.rsp_q_out;
  1924. }
  1925. if (IS_QLA82XX(ha)) {
  1926. req->req_q_out = &ha->iobase->isp82.req_q_out[0];
  1927. rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
  1928. rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
  1929. }
  1930. if (qla2x00_initialize_adapter(base_vha)) {
  1931. qla_printk(KERN_WARNING, ha,
  1932. "Failed to initialize adapter\n");
  1933. DEBUG2(printk("scsi(%ld): Failed to initialize adapter - "
  1934. "Adapter flags %x.\n",
  1935. base_vha->host_no, base_vha->device_flags));
  1936. if (IS_QLA82XX(ha)) {
  1937. qla82xx_idc_lock(ha);
  1938. qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
  1939. QLA82XX_DEV_FAILED);
  1940. qla82xx_idc_unlock(ha);
  1941. qla_printk(KERN_INFO, ha, "HW State: FAILED\n");
  1942. }
  1943. ret = -ENODEV;
  1944. goto probe_failed;
  1945. }
  1946. if (ha->mqenable) {
  1947. if (qla25xx_setup_mode(base_vha)) {
  1948. qla_printk(KERN_WARNING, ha,
  1949. "Can't create queues, falling back to single"
  1950. " queue mode\n");
  1951. goto que_init;
  1952. }
  1953. }
  1954. if (ha->flags.running_gold_fw)
  1955. goto skip_dpc;
  1956. /*
  1957. * Startup the kernel thread for this host adapter
  1958. */
  1959. ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
  1960. "%s_dpc", base_vha->host_str);
  1961. if (IS_ERR(ha->dpc_thread)) {
  1962. qla_printk(KERN_WARNING, ha,
  1963. "Unable to start DPC thread!\n");
  1964. ret = PTR_ERR(ha->dpc_thread);
  1965. goto probe_failed;
  1966. }
  1967. skip_dpc:
  1968. list_add_tail(&base_vha->list, &ha->vp_list);
  1969. base_vha->host->irq = ha->pdev->irq;
  1970. /* Initialized the timer */
  1971. qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
  1972. DEBUG2(printk("DEBUG: detect hba %ld at address = %p\n",
  1973. base_vha->host_no, ha));
  1974. if ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && ql2xenabledif) {
  1975. if (ha->fw_attributes & BIT_4) {
  1976. base_vha->flags.difdix_supported = 1;
  1977. DEBUG18(qla_printk(KERN_INFO, ha,
  1978. "Registering for DIF/DIX type 1 and 3"
  1979. " protection.\n"));
  1980. scsi_host_set_prot(host,
  1981. SHOST_DIF_TYPE1_PROTECTION
  1982. | SHOST_DIF_TYPE2_PROTECTION
  1983. | SHOST_DIF_TYPE3_PROTECTION
  1984. | SHOST_DIX_TYPE1_PROTECTION
  1985. | SHOST_DIX_TYPE2_PROTECTION
  1986. | SHOST_DIX_TYPE3_PROTECTION);
  1987. scsi_host_set_guard(host, SHOST_DIX_GUARD_CRC);
  1988. } else
  1989. base_vha->flags.difdix_supported = 0;
  1990. }
  1991. ha->isp_ops->enable_intrs(ha);
  1992. ret = scsi_add_host(host, &pdev->dev);
  1993. if (ret)
  1994. goto probe_failed;
  1995. base_vha->flags.init_done = 1;
  1996. base_vha->flags.online = 1;
  1997. scsi_scan_host(host);
  1998. qla2x00_alloc_sysfs_attr(base_vha);
  1999. qla2x00_init_host_attr(base_vha);
  2000. qla2x00_dfs_setup(base_vha);
  2001. qla_printk(KERN_INFO, ha, "\n"
  2002. " QLogic Fibre Channel HBA Driver: %s\n"
  2003. " QLogic %s - %s\n"
  2004. " ISP%04X: %s @ %s hdma%c, host#=%ld, fw=%s\n",
  2005. qla2x00_version_str, ha->model_number,
  2006. ha->model_desc ? ha->model_desc : "", pdev->device,
  2007. ha->isp_ops->pci_info_str(base_vha, pci_info), pci_name(pdev),
  2008. ha->flags.enable_64bit_addressing ? '+' : '-', base_vha->host_no,
  2009. ha->isp_ops->fw_version_str(base_vha, fw_str));
  2010. return 0;
  2011. probe_init_failed:
  2012. qla2x00_free_req_que(ha, req);
  2013. qla2x00_free_rsp_que(ha, rsp);
  2014. ha->max_req_queues = ha->max_rsp_queues = 0;
  2015. probe_failed:
  2016. if (base_vha->timer_active)
  2017. qla2x00_stop_timer(base_vha);
  2018. base_vha->flags.online = 0;
  2019. if (ha->dpc_thread) {
  2020. struct task_struct *t = ha->dpc_thread;
  2021. ha->dpc_thread = NULL;
  2022. kthread_stop(t);
  2023. }
  2024. qla2x00_free_device(base_vha);
  2025. scsi_host_put(base_vha->host);
  2026. probe_hw_failed:
  2027. if (IS_QLA82XX(ha)) {
  2028. qla82xx_idc_lock(ha);
  2029. qla82xx_clear_drv_active(ha);
  2030. qla82xx_idc_unlock(ha);
  2031. iounmap((device_reg_t __iomem *)ha->nx_pcibase);
  2032. if (!ql2xdbwr)
  2033. iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
  2034. } else {
  2035. if (ha->iobase)
  2036. iounmap(ha->iobase);
  2037. }
  2038. pci_release_selected_regions(ha->pdev, ha->bars);
  2039. kfree(ha);
  2040. ha = NULL;
  2041. probe_out:
  2042. pci_disable_device(pdev);
  2043. return ret;
  2044. }
  2045. static void
  2046. qla2x00_remove_one(struct pci_dev *pdev)
  2047. {
  2048. scsi_qla_host_t *base_vha, *vha, *temp;
  2049. struct qla_hw_data *ha;
  2050. base_vha = pci_get_drvdata(pdev);
  2051. ha = base_vha->hw;
  2052. list_for_each_entry_safe(vha, temp, &ha->vp_list, list) {
  2053. if (vha && vha->fc_vport)
  2054. fc_vport_terminate(vha->fc_vport);
  2055. }
  2056. set_bit(UNLOADING, &base_vha->dpc_flags);
  2057. qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
  2058. qla2x00_dfs_remove(base_vha);
  2059. qla84xx_put_chip(base_vha);
  2060. /* Disable timer */
  2061. if (base_vha->timer_active)
  2062. qla2x00_stop_timer(base_vha);
  2063. base_vha->flags.online = 0;
  2064. /* Flush the work queue and remove it */
  2065. if (ha->wq) {
  2066. flush_workqueue(ha->wq);
  2067. destroy_workqueue(ha->wq);
  2068. ha->wq = NULL;
  2069. }
  2070. /* Kill the kernel thread for this host */
  2071. if (ha->dpc_thread) {
  2072. struct task_struct *t = ha->dpc_thread;
  2073. /*
  2074. * qla2xxx_wake_dpc checks for ->dpc_thread
  2075. * so we need to zero it out.
  2076. */
  2077. ha->dpc_thread = NULL;
  2078. kthread_stop(t);
  2079. }
  2080. qla2x00_free_sysfs_attr(base_vha);
  2081. fc_remove_host(base_vha->host);
  2082. scsi_remove_host(base_vha->host);
  2083. qla2x00_free_device(base_vha);
  2084. scsi_host_put(base_vha->host);
  2085. if (IS_QLA82XX(ha)) {
  2086. qla82xx_idc_lock(ha);
  2087. qla82xx_clear_drv_active(ha);
  2088. qla82xx_idc_unlock(ha);
  2089. iounmap((device_reg_t __iomem *)ha->nx_pcibase);
  2090. if (!ql2xdbwr)
  2091. iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
  2092. } else {
  2093. if (ha->iobase)
  2094. iounmap(ha->iobase);
  2095. if (ha->mqiobase)
  2096. iounmap(ha->mqiobase);
  2097. }
  2098. pci_release_selected_regions(ha->pdev, ha->bars);
  2099. kfree(ha);
  2100. ha = NULL;
  2101. pci_disable_pcie_error_reporting(pdev);
  2102. pci_disable_device(pdev);
  2103. pci_set_drvdata(pdev, NULL);
  2104. }
  2105. static void
  2106. qla2x00_free_device(scsi_qla_host_t *vha)
  2107. {
  2108. struct qla_hw_data *ha = vha->hw;
  2109. qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
  2110. /* Disable timer */
  2111. if (vha->timer_active)
  2112. qla2x00_stop_timer(vha);
  2113. /* Kill the kernel thread for this host */
  2114. if (ha->dpc_thread) {
  2115. struct task_struct *t = ha->dpc_thread;
  2116. /*
  2117. * qla2xxx_wake_dpc checks for ->dpc_thread
  2118. * so we need to zero it out.
  2119. */
  2120. ha->dpc_thread = NULL;
  2121. kthread_stop(t);
  2122. }
  2123. qla25xx_delete_queues(vha);
  2124. if (ha->flags.fce_enabled)
  2125. qla2x00_disable_fce_trace(vha, NULL, NULL);
  2126. if (ha->eft)
  2127. qla2x00_disable_eft_trace(vha);
  2128. /* Stop currently executing firmware. */
  2129. qla2x00_try_to_stop_firmware(vha);
  2130. vha->flags.online = 0;
  2131. /* turn-off interrupts on the card */
  2132. if (ha->interrupts_on) {
  2133. vha->flags.init_done = 0;
  2134. ha->isp_ops->disable_intrs(ha);
  2135. }
  2136. qla2x00_free_irqs(vha);
  2137. qla2x00_free_fcports(vha);
  2138. qla2x00_mem_free(ha);
  2139. qla2x00_free_queues(ha);
  2140. }
  2141. void qla2x00_free_fcports(struct scsi_qla_host *vha)
  2142. {
  2143. fc_port_t *fcport, *tfcport;
  2144. list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
  2145. list_del(&fcport->list);
  2146. kfree(fcport);
  2147. fcport = NULL;
  2148. }
  2149. }
  2150. static inline void
  2151. qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
  2152. int defer)
  2153. {
  2154. struct fc_rport *rport;
  2155. scsi_qla_host_t *base_vha;
  2156. if (!fcport->rport)
  2157. return;
  2158. rport = fcport->rport;
  2159. if (defer) {
  2160. base_vha = pci_get_drvdata(vha->hw->pdev);
  2161. spin_lock_irq(vha->host->host_lock);
  2162. fcport->drport = rport;
  2163. spin_unlock_irq(vha->host->host_lock);
  2164. set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
  2165. qla2xxx_wake_dpc(base_vha);
  2166. } else
  2167. fc_remote_port_delete(rport);
  2168. }
  2169. /*
  2170. * qla2x00_mark_device_lost Updates fcport state when device goes offline.
  2171. *
  2172. * Input: ha = adapter block pointer. fcport = port structure pointer.
  2173. *
  2174. * Return: None.
  2175. *
  2176. * Context:
  2177. */
  2178. void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
  2179. int do_login, int defer)
  2180. {
  2181. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  2182. vha->vp_idx == fcport->vp_idx) {
  2183. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  2184. qla2x00_schedule_rport_del(vha, fcport, defer);
  2185. }
  2186. /*
  2187. * We may need to retry the login, so don't change the state of the
  2188. * port but do the retries.
  2189. */
  2190. if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
  2191. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  2192. if (!do_login)
  2193. return;
  2194. if (fcport->login_retry == 0) {
  2195. fcport->login_retry = vha->hw->login_retry_count;
  2196. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  2197. DEBUG(printk("scsi(%ld): Port login retry: "
  2198. "%02x%02x%02x%02x%02x%02x%02x%02x, "
  2199. "id = 0x%04x retry cnt=%d\n",
  2200. vha->host_no,
  2201. fcport->port_name[0],
  2202. fcport->port_name[1],
  2203. fcport->port_name[2],
  2204. fcport->port_name[3],
  2205. fcport->port_name[4],
  2206. fcport->port_name[5],
  2207. fcport->port_name[6],
  2208. fcport->port_name[7],
  2209. fcport->loop_id,
  2210. fcport->login_retry));
  2211. }
  2212. }
  2213. /*
  2214. * qla2x00_mark_all_devices_lost
  2215. * Updates fcport state when device goes offline.
  2216. *
  2217. * Input:
  2218. * ha = adapter block pointer.
  2219. * fcport = port structure pointer.
  2220. *
  2221. * Return:
  2222. * None.
  2223. *
  2224. * Context:
  2225. */
  2226. void
  2227. qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
  2228. {
  2229. fc_port_t *fcport;
  2230. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2231. if (vha->vp_idx != 0 && vha->vp_idx != fcport->vp_idx)
  2232. continue;
  2233. /*
  2234. * No point in marking the device as lost, if the device is
  2235. * already DEAD.
  2236. */
  2237. if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
  2238. continue;
  2239. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  2240. if (defer)
  2241. qla2x00_schedule_rport_del(vha, fcport, defer);
  2242. else if (vha->vp_idx == fcport->vp_idx)
  2243. qla2x00_schedule_rport_del(vha, fcport, defer);
  2244. }
  2245. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  2246. }
  2247. }
  2248. /*
  2249. * qla2x00_mem_alloc
  2250. * Allocates adapter memory.
  2251. *
  2252. * Returns:
  2253. * 0 = success.
  2254. * !0 = failure.
  2255. */
  2256. static int
  2257. qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
  2258. struct req_que **req, struct rsp_que **rsp)
  2259. {
  2260. char name[16];
  2261. ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
  2262. &ha->init_cb_dma, GFP_KERNEL);
  2263. if (!ha->init_cb)
  2264. goto fail;
  2265. ha->gid_list = dma_alloc_coherent(&ha->pdev->dev, GID_LIST_SIZE,
  2266. &ha->gid_list_dma, GFP_KERNEL);
  2267. if (!ha->gid_list)
  2268. goto fail_free_init_cb;
  2269. ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
  2270. if (!ha->srb_mempool)
  2271. goto fail_free_gid_list;
  2272. if (IS_QLA82XX(ha)) {
  2273. /* Allocate cache for CT6 Ctx. */
  2274. if (!ctx_cachep) {
  2275. ctx_cachep = kmem_cache_create("qla2xxx_ctx",
  2276. sizeof(struct ct6_dsd), 0,
  2277. SLAB_HWCACHE_ALIGN, NULL);
  2278. if (!ctx_cachep)
  2279. goto fail_free_gid_list;
  2280. }
  2281. ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
  2282. ctx_cachep);
  2283. if (!ha->ctx_mempool)
  2284. goto fail_free_srb_mempool;
  2285. }
  2286. /* Get memory for cached NVRAM */
  2287. ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
  2288. if (!ha->nvram)
  2289. goto fail_free_ctx_mempool;
  2290. snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
  2291. ha->pdev->device);
  2292. ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
  2293. DMA_POOL_SIZE, 8, 0);
  2294. if (!ha->s_dma_pool)
  2295. goto fail_free_nvram;
  2296. if (IS_QLA82XX(ha) || ql2xenabledif) {
  2297. ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
  2298. DSD_LIST_DMA_POOL_SIZE, 8, 0);
  2299. if (!ha->dl_dma_pool) {
  2300. qla_printk(KERN_WARNING, ha,
  2301. "Memory Allocation failed - dl_dma_pool\n");
  2302. goto fail_s_dma_pool;
  2303. }
  2304. ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
  2305. FCP_CMND_DMA_POOL_SIZE, 8, 0);
  2306. if (!ha->fcp_cmnd_dma_pool) {
  2307. qla_printk(KERN_WARNING, ha,
  2308. "Memory Allocation failed - fcp_cmnd_dma_pool\n");
  2309. goto fail_dl_dma_pool;
  2310. }
  2311. }
  2312. /* Allocate memory for SNS commands */
  2313. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  2314. /* Get consistent memory allocated for SNS commands */
  2315. ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
  2316. sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
  2317. if (!ha->sns_cmd)
  2318. goto fail_dma_pool;
  2319. } else {
  2320. /* Get consistent memory allocated for MS IOCB */
  2321. ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
  2322. &ha->ms_iocb_dma);
  2323. if (!ha->ms_iocb)
  2324. goto fail_dma_pool;
  2325. /* Get consistent memory allocated for CT SNS commands */
  2326. ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
  2327. sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
  2328. if (!ha->ct_sns)
  2329. goto fail_free_ms_iocb;
  2330. }
  2331. /* Allocate memory for request ring */
  2332. *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
  2333. if (!*req) {
  2334. DEBUG(printk("Unable to allocate memory for req\n"));
  2335. goto fail_req;
  2336. }
  2337. (*req)->length = req_len;
  2338. (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
  2339. ((*req)->length + 1) * sizeof(request_t),
  2340. &(*req)->dma, GFP_KERNEL);
  2341. if (!(*req)->ring) {
  2342. DEBUG(printk("Unable to allocate memory for req_ring\n"));
  2343. goto fail_req_ring;
  2344. }
  2345. /* Allocate memory for response ring */
  2346. *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
  2347. if (!*rsp) {
  2348. qla_printk(KERN_WARNING, ha,
  2349. "Unable to allocate memory for rsp\n");
  2350. goto fail_rsp;
  2351. }
  2352. (*rsp)->hw = ha;
  2353. (*rsp)->length = rsp_len;
  2354. (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
  2355. ((*rsp)->length + 1) * sizeof(response_t),
  2356. &(*rsp)->dma, GFP_KERNEL);
  2357. if (!(*rsp)->ring) {
  2358. qla_printk(KERN_WARNING, ha,
  2359. "Unable to allocate memory for rsp_ring\n");
  2360. goto fail_rsp_ring;
  2361. }
  2362. (*req)->rsp = *rsp;
  2363. (*rsp)->req = *req;
  2364. /* Allocate memory for NVRAM data for vports */
  2365. if (ha->nvram_npiv_size) {
  2366. ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
  2367. ha->nvram_npiv_size, GFP_KERNEL);
  2368. if (!ha->npiv_info) {
  2369. qla_printk(KERN_WARNING, ha,
  2370. "Unable to allocate memory for npiv info\n");
  2371. goto fail_npiv_info;
  2372. }
  2373. } else
  2374. ha->npiv_info = NULL;
  2375. /* Get consistent memory allocated for EX-INIT-CB. */
  2376. if (IS_QLA8XXX_TYPE(ha)) {
  2377. ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
  2378. &ha->ex_init_cb_dma);
  2379. if (!ha->ex_init_cb)
  2380. goto fail_ex_init_cb;
  2381. }
  2382. INIT_LIST_HEAD(&ha->gbl_dsd_list);
  2383. /* Get consistent memory allocated for Async Port-Database. */
  2384. if (!IS_FWI2_CAPABLE(ha)) {
  2385. ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
  2386. &ha->async_pd_dma);
  2387. if (!ha->async_pd)
  2388. goto fail_async_pd;
  2389. }
  2390. INIT_LIST_HEAD(&ha->vp_list);
  2391. return 1;
  2392. fail_async_pd:
  2393. dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
  2394. fail_ex_init_cb:
  2395. kfree(ha->npiv_info);
  2396. fail_npiv_info:
  2397. dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
  2398. sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
  2399. (*rsp)->ring = NULL;
  2400. (*rsp)->dma = 0;
  2401. fail_rsp_ring:
  2402. kfree(*rsp);
  2403. fail_rsp:
  2404. dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
  2405. sizeof(request_t), (*req)->ring, (*req)->dma);
  2406. (*req)->ring = NULL;
  2407. (*req)->dma = 0;
  2408. fail_req_ring:
  2409. kfree(*req);
  2410. fail_req:
  2411. dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
  2412. ha->ct_sns, ha->ct_sns_dma);
  2413. ha->ct_sns = NULL;
  2414. ha->ct_sns_dma = 0;
  2415. fail_free_ms_iocb:
  2416. dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
  2417. ha->ms_iocb = NULL;
  2418. ha->ms_iocb_dma = 0;
  2419. fail_dma_pool:
  2420. if (IS_QLA82XX(ha) || ql2xenabledif) {
  2421. dma_pool_destroy(ha->fcp_cmnd_dma_pool);
  2422. ha->fcp_cmnd_dma_pool = NULL;
  2423. }
  2424. fail_dl_dma_pool:
  2425. if (IS_QLA82XX(ha) || ql2xenabledif) {
  2426. dma_pool_destroy(ha->dl_dma_pool);
  2427. ha->dl_dma_pool = NULL;
  2428. }
  2429. fail_s_dma_pool:
  2430. dma_pool_destroy(ha->s_dma_pool);
  2431. ha->s_dma_pool = NULL;
  2432. fail_free_nvram:
  2433. kfree(ha->nvram);
  2434. ha->nvram = NULL;
  2435. fail_free_ctx_mempool:
  2436. mempool_destroy(ha->ctx_mempool);
  2437. ha->ctx_mempool = NULL;
  2438. fail_free_srb_mempool:
  2439. mempool_destroy(ha->srb_mempool);
  2440. ha->srb_mempool = NULL;
  2441. fail_free_gid_list:
  2442. dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
  2443. ha->gid_list_dma);
  2444. ha->gid_list = NULL;
  2445. ha->gid_list_dma = 0;
  2446. fail_free_init_cb:
  2447. dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
  2448. ha->init_cb_dma);
  2449. ha->init_cb = NULL;
  2450. ha->init_cb_dma = 0;
  2451. fail:
  2452. DEBUG(printk("%s: Memory allocation failure\n", __func__));
  2453. return -ENOMEM;
  2454. }
  2455. /*
  2456. * qla2x00_mem_free
  2457. * Frees all adapter allocated memory.
  2458. *
  2459. * Input:
  2460. * ha = adapter block pointer.
  2461. */
  2462. static void
  2463. qla2x00_mem_free(struct qla_hw_data *ha)
  2464. {
  2465. if (ha->srb_mempool)
  2466. mempool_destroy(ha->srb_mempool);
  2467. if (ha->fce)
  2468. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
  2469. ha->fce_dma);
  2470. if (ha->fw_dump) {
  2471. if (ha->eft)
  2472. dma_free_coherent(&ha->pdev->dev,
  2473. ntohl(ha->fw_dump->eft_size), ha->eft, ha->eft_dma);
  2474. vfree(ha->fw_dump);
  2475. }
  2476. if (ha->dcbx_tlv)
  2477. dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
  2478. ha->dcbx_tlv, ha->dcbx_tlv_dma);
  2479. if (ha->xgmac_data)
  2480. dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
  2481. ha->xgmac_data, ha->xgmac_data_dma);
  2482. if (ha->sns_cmd)
  2483. dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
  2484. ha->sns_cmd, ha->sns_cmd_dma);
  2485. if (ha->ct_sns)
  2486. dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
  2487. ha->ct_sns, ha->ct_sns_dma);
  2488. if (ha->sfp_data)
  2489. dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
  2490. if (ha->edc_data)
  2491. dma_pool_free(ha->s_dma_pool, ha->edc_data, ha->edc_data_dma);
  2492. if (ha->ms_iocb)
  2493. dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
  2494. if (ha->ex_init_cb)
  2495. dma_pool_free(ha->s_dma_pool,
  2496. ha->ex_init_cb, ha->ex_init_cb_dma);
  2497. if (ha->async_pd)
  2498. dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
  2499. if (ha->s_dma_pool)
  2500. dma_pool_destroy(ha->s_dma_pool);
  2501. if (ha->gid_list)
  2502. dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
  2503. ha->gid_list_dma);
  2504. if (IS_QLA82XX(ha)) {
  2505. if (!list_empty(&ha->gbl_dsd_list)) {
  2506. struct dsd_dma *dsd_ptr, *tdsd_ptr;
  2507. /* clean up allocated prev pool */
  2508. list_for_each_entry_safe(dsd_ptr,
  2509. tdsd_ptr, &ha->gbl_dsd_list, list) {
  2510. dma_pool_free(ha->dl_dma_pool,
  2511. dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
  2512. list_del(&dsd_ptr->list);
  2513. kfree(dsd_ptr);
  2514. }
  2515. }
  2516. }
  2517. if (ha->dl_dma_pool)
  2518. dma_pool_destroy(ha->dl_dma_pool);
  2519. if (ha->fcp_cmnd_dma_pool)
  2520. dma_pool_destroy(ha->fcp_cmnd_dma_pool);
  2521. if (ha->ctx_mempool)
  2522. mempool_destroy(ha->ctx_mempool);
  2523. if (ha->init_cb)
  2524. dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
  2525. ha->init_cb, ha->init_cb_dma);
  2526. vfree(ha->optrom_buffer);
  2527. kfree(ha->nvram);
  2528. kfree(ha->npiv_info);
  2529. ha->srb_mempool = NULL;
  2530. ha->ctx_mempool = NULL;
  2531. ha->eft = NULL;
  2532. ha->eft_dma = 0;
  2533. ha->sns_cmd = NULL;
  2534. ha->sns_cmd_dma = 0;
  2535. ha->ct_sns = NULL;
  2536. ha->ct_sns_dma = 0;
  2537. ha->ms_iocb = NULL;
  2538. ha->ms_iocb_dma = 0;
  2539. ha->init_cb = NULL;
  2540. ha->init_cb_dma = 0;
  2541. ha->ex_init_cb = NULL;
  2542. ha->ex_init_cb_dma = 0;
  2543. ha->async_pd = NULL;
  2544. ha->async_pd_dma = 0;
  2545. ha->s_dma_pool = NULL;
  2546. ha->dl_dma_pool = NULL;
  2547. ha->fcp_cmnd_dma_pool = NULL;
  2548. ha->gid_list = NULL;
  2549. ha->gid_list_dma = 0;
  2550. ha->fw_dump = NULL;
  2551. ha->fw_dumped = 0;
  2552. ha->fw_dump_reading = 0;
  2553. }
  2554. struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
  2555. struct qla_hw_data *ha)
  2556. {
  2557. struct Scsi_Host *host;
  2558. struct scsi_qla_host *vha = NULL;
  2559. host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
  2560. if (host == NULL) {
  2561. printk(KERN_WARNING
  2562. "qla2xxx: Couldn't allocate host from scsi layer!\n");
  2563. goto fail;
  2564. }
  2565. /* Clear our data area */
  2566. vha = shost_priv(host);
  2567. memset(vha, 0, sizeof(scsi_qla_host_t));
  2568. vha->host = host;
  2569. vha->host_no = host->host_no;
  2570. vha->hw = ha;
  2571. INIT_LIST_HEAD(&vha->vp_fcports);
  2572. INIT_LIST_HEAD(&vha->work_list);
  2573. INIT_LIST_HEAD(&vha->list);
  2574. spin_lock_init(&vha->work_lock);
  2575. sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
  2576. return vha;
  2577. fail:
  2578. return vha;
  2579. }
  2580. static struct qla_work_evt *
  2581. qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
  2582. {
  2583. struct qla_work_evt *e;
  2584. e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
  2585. if (!e)
  2586. return NULL;
  2587. INIT_LIST_HEAD(&e->list);
  2588. e->type = type;
  2589. e->flags = QLA_EVT_FLAG_FREE;
  2590. return e;
  2591. }
  2592. static int
  2593. qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
  2594. {
  2595. unsigned long flags;
  2596. spin_lock_irqsave(&vha->work_lock, flags);
  2597. list_add_tail(&e->list, &vha->work_list);
  2598. spin_unlock_irqrestore(&vha->work_lock, flags);
  2599. qla2xxx_wake_dpc(vha);
  2600. return QLA_SUCCESS;
  2601. }
  2602. int
  2603. qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
  2604. u32 data)
  2605. {
  2606. struct qla_work_evt *e;
  2607. e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
  2608. if (!e)
  2609. return QLA_FUNCTION_FAILED;
  2610. e->u.aen.code = code;
  2611. e->u.aen.data = data;
  2612. return qla2x00_post_work(vha, e);
  2613. }
  2614. int
  2615. qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
  2616. {
  2617. struct qla_work_evt *e;
  2618. e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
  2619. if (!e)
  2620. return QLA_FUNCTION_FAILED;
  2621. memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
  2622. return qla2x00_post_work(vha, e);
  2623. }
  2624. #define qla2x00_post_async_work(name, type) \
  2625. int qla2x00_post_async_##name##_work( \
  2626. struct scsi_qla_host *vha, \
  2627. fc_port_t *fcport, uint16_t *data) \
  2628. { \
  2629. struct qla_work_evt *e; \
  2630. \
  2631. e = qla2x00_alloc_work(vha, type); \
  2632. if (!e) \
  2633. return QLA_FUNCTION_FAILED; \
  2634. \
  2635. e->u.logio.fcport = fcport; \
  2636. if (data) { \
  2637. e->u.logio.data[0] = data[0]; \
  2638. e->u.logio.data[1] = data[1]; \
  2639. } \
  2640. return qla2x00_post_work(vha, e); \
  2641. }
  2642. qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
  2643. qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
  2644. qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
  2645. qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
  2646. qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
  2647. qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
  2648. int
  2649. qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
  2650. {
  2651. struct qla_work_evt *e;
  2652. e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
  2653. if (!e)
  2654. return QLA_FUNCTION_FAILED;
  2655. e->u.uevent.code = code;
  2656. return qla2x00_post_work(vha, e);
  2657. }
  2658. static void
  2659. qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
  2660. {
  2661. char event_string[40];
  2662. char *envp[] = { event_string, NULL };
  2663. switch (code) {
  2664. case QLA_UEVENT_CODE_FW_DUMP:
  2665. snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
  2666. vha->host_no);
  2667. break;
  2668. default:
  2669. /* do nothing */
  2670. break;
  2671. }
  2672. kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
  2673. }
  2674. void
  2675. qla2x00_do_work(struct scsi_qla_host *vha)
  2676. {
  2677. struct qla_work_evt *e, *tmp;
  2678. unsigned long flags;
  2679. LIST_HEAD(work);
  2680. spin_lock_irqsave(&vha->work_lock, flags);
  2681. list_splice_init(&vha->work_list, &work);
  2682. spin_unlock_irqrestore(&vha->work_lock, flags);
  2683. list_for_each_entry_safe(e, tmp, &work, list) {
  2684. list_del_init(&e->list);
  2685. switch (e->type) {
  2686. case QLA_EVT_AEN:
  2687. fc_host_post_event(vha->host, fc_get_event_number(),
  2688. e->u.aen.code, e->u.aen.data);
  2689. break;
  2690. case QLA_EVT_IDC_ACK:
  2691. qla81xx_idc_ack(vha, e->u.idc_ack.mb);
  2692. break;
  2693. case QLA_EVT_ASYNC_LOGIN:
  2694. qla2x00_async_login(vha, e->u.logio.fcport,
  2695. e->u.logio.data);
  2696. break;
  2697. case QLA_EVT_ASYNC_LOGIN_DONE:
  2698. qla2x00_async_login_done(vha, e->u.logio.fcport,
  2699. e->u.logio.data);
  2700. break;
  2701. case QLA_EVT_ASYNC_LOGOUT:
  2702. qla2x00_async_logout(vha, e->u.logio.fcport);
  2703. break;
  2704. case QLA_EVT_ASYNC_LOGOUT_DONE:
  2705. qla2x00_async_logout_done(vha, e->u.logio.fcport,
  2706. e->u.logio.data);
  2707. break;
  2708. case QLA_EVT_ASYNC_ADISC:
  2709. qla2x00_async_adisc(vha, e->u.logio.fcport,
  2710. e->u.logio.data);
  2711. break;
  2712. case QLA_EVT_ASYNC_ADISC_DONE:
  2713. qla2x00_async_adisc_done(vha, e->u.logio.fcport,
  2714. e->u.logio.data);
  2715. break;
  2716. case QLA_EVT_UEVENT:
  2717. qla2x00_uevent_emit(vha, e->u.uevent.code);
  2718. break;
  2719. }
  2720. if (e->flags & QLA_EVT_FLAG_FREE)
  2721. kfree(e);
  2722. }
  2723. }
  2724. /* Relogins all the fcports of a vport
  2725. * Context: dpc thread
  2726. */
  2727. void qla2x00_relogin(struct scsi_qla_host *vha)
  2728. {
  2729. fc_port_t *fcport;
  2730. int status;
  2731. uint16_t next_loopid = 0;
  2732. struct qla_hw_data *ha = vha->hw;
  2733. uint16_t data[2];
  2734. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2735. /*
  2736. * If the port is not ONLINE then try to login
  2737. * to it if we haven't run out of retries.
  2738. */
  2739. if (atomic_read(&fcport->state) != FCS_ONLINE &&
  2740. fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
  2741. fcport->login_retry--;
  2742. if (fcport->flags & FCF_FABRIC_DEVICE) {
  2743. if (fcport->flags & FCF_FCP2_DEVICE)
  2744. ha->isp_ops->fabric_logout(vha,
  2745. fcport->loop_id,
  2746. fcport->d_id.b.domain,
  2747. fcport->d_id.b.area,
  2748. fcport->d_id.b.al_pa);
  2749. if (IS_ALOGIO_CAPABLE(ha)) {
  2750. fcport->flags |= FCF_ASYNC_SENT;
  2751. data[0] = 0;
  2752. data[1] = QLA_LOGIO_LOGIN_RETRIED;
  2753. status = qla2x00_post_async_login_work(
  2754. vha, fcport, data);
  2755. if (status == QLA_SUCCESS)
  2756. continue;
  2757. /* Attempt a retry. */
  2758. status = 1;
  2759. } else
  2760. status = qla2x00_fabric_login(vha,
  2761. fcport, &next_loopid);
  2762. } else
  2763. status = qla2x00_local_device_login(vha,
  2764. fcport);
  2765. if (status == QLA_SUCCESS) {
  2766. fcport->old_loop_id = fcport->loop_id;
  2767. DEBUG(printk("scsi(%ld): port login OK: logged "
  2768. "in ID 0x%x\n", vha->host_no, fcport->loop_id));
  2769. qla2x00_update_fcport(vha, fcport);
  2770. } else if (status == 1) {
  2771. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  2772. /* retry the login again */
  2773. DEBUG(printk("scsi(%ld): Retrying"
  2774. " %d login again loop_id 0x%x\n",
  2775. vha->host_no, fcport->login_retry,
  2776. fcport->loop_id));
  2777. } else {
  2778. fcport->login_retry = 0;
  2779. }
  2780. if (fcport->login_retry == 0 && status != QLA_SUCCESS)
  2781. fcport->loop_id = FC_NO_LOOP_ID;
  2782. }
  2783. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2784. break;
  2785. }
  2786. }
  2787. /**************************************************************************
  2788. * qla2x00_do_dpc
  2789. * This kernel thread is a task that is schedule by the interrupt handler
  2790. * to perform the background processing for interrupts.
  2791. *
  2792. * Notes:
  2793. * This task always run in the context of a kernel thread. It
  2794. * is kick-off by the driver's detect code and starts up
  2795. * up one per adapter. It immediately goes to sleep and waits for
  2796. * some fibre event. When either the interrupt handler or
  2797. * the timer routine detects a event it will one of the task
  2798. * bits then wake us up.
  2799. **************************************************************************/
  2800. static int
  2801. qla2x00_do_dpc(void *data)
  2802. {
  2803. int rval;
  2804. scsi_qla_host_t *base_vha;
  2805. struct qla_hw_data *ha;
  2806. ha = (struct qla_hw_data *)data;
  2807. base_vha = pci_get_drvdata(ha->pdev);
  2808. set_user_nice(current, -20);
  2809. while (!kthread_should_stop()) {
  2810. DEBUG3(printk("qla2x00: DPC handler sleeping\n"));
  2811. set_current_state(TASK_INTERRUPTIBLE);
  2812. schedule();
  2813. __set_current_state(TASK_RUNNING);
  2814. DEBUG3(printk("qla2x00: DPC handler waking up\n"));
  2815. /* Initialization not yet finished. Don't do anything yet. */
  2816. if (!base_vha->flags.init_done)
  2817. continue;
  2818. if (ha->flags.eeh_busy) {
  2819. DEBUG17(qla_printk(KERN_WARNING, ha,
  2820. "qla2x00_do_dpc: dpc_flags: %lx\n",
  2821. base_vha->dpc_flags));
  2822. continue;
  2823. }
  2824. DEBUG3(printk("scsi(%ld): DPC handler\n", base_vha->host_no));
  2825. ha->dpc_active = 1;
  2826. if (ha->flags.mbox_busy) {
  2827. ha->dpc_active = 0;
  2828. continue;
  2829. }
  2830. qla2x00_do_work(base_vha);
  2831. if (IS_QLA82XX(ha)) {
  2832. if (test_and_clear_bit(ISP_UNRECOVERABLE,
  2833. &base_vha->dpc_flags)) {
  2834. qla82xx_idc_lock(ha);
  2835. qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
  2836. QLA82XX_DEV_FAILED);
  2837. qla82xx_idc_unlock(ha);
  2838. qla_printk(KERN_INFO, ha,
  2839. "HW State: FAILED\n");
  2840. qla82xx_device_state_handler(base_vha);
  2841. continue;
  2842. }
  2843. if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
  2844. &base_vha->dpc_flags)) {
  2845. DEBUG(printk(KERN_INFO
  2846. "scsi(%ld): dpc: sched "
  2847. "qla82xx_fcoe_ctx_reset ha = %p\n",
  2848. base_vha->host_no, ha));
  2849. if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
  2850. &base_vha->dpc_flags))) {
  2851. if (qla82xx_fcoe_ctx_reset(base_vha)) {
  2852. /* FCoE-ctx reset failed.
  2853. * Escalate to chip-reset
  2854. */
  2855. set_bit(ISP_ABORT_NEEDED,
  2856. &base_vha->dpc_flags);
  2857. }
  2858. clear_bit(ABORT_ISP_ACTIVE,
  2859. &base_vha->dpc_flags);
  2860. }
  2861. DEBUG(printk("scsi(%ld): dpc:"
  2862. " qla82xx_fcoe_ctx_reset end\n",
  2863. base_vha->host_no));
  2864. }
  2865. }
  2866. if (test_and_clear_bit(ISP_ABORT_NEEDED,
  2867. &base_vha->dpc_flags)) {
  2868. DEBUG(printk("scsi(%ld): dpc: sched "
  2869. "qla2x00_abort_isp ha = %p\n",
  2870. base_vha->host_no, ha));
  2871. if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
  2872. &base_vha->dpc_flags))) {
  2873. if (ha->isp_ops->abort_isp(base_vha)) {
  2874. /* failed. retry later */
  2875. set_bit(ISP_ABORT_NEEDED,
  2876. &base_vha->dpc_flags);
  2877. }
  2878. clear_bit(ABORT_ISP_ACTIVE,
  2879. &base_vha->dpc_flags);
  2880. }
  2881. DEBUG(printk("scsi(%ld): dpc: qla2x00_abort_isp end\n",
  2882. base_vha->host_no));
  2883. }
  2884. if (test_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags)) {
  2885. qla2x00_update_fcports(base_vha);
  2886. clear_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
  2887. }
  2888. if (test_and_clear_bit(RESET_MARKER_NEEDED,
  2889. &base_vha->dpc_flags) &&
  2890. (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
  2891. DEBUG(printk("scsi(%ld): qla2x00_reset_marker()\n",
  2892. base_vha->host_no));
  2893. qla2x00_rst_aen(base_vha);
  2894. clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
  2895. }
  2896. /* Retry each device up to login retry count */
  2897. if ((test_and_clear_bit(RELOGIN_NEEDED,
  2898. &base_vha->dpc_flags)) &&
  2899. !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
  2900. atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
  2901. DEBUG(printk("scsi(%ld): qla2x00_port_login()\n",
  2902. base_vha->host_no));
  2903. qla2x00_relogin(base_vha);
  2904. DEBUG(printk("scsi(%ld): qla2x00_port_login - end\n",
  2905. base_vha->host_no));
  2906. }
  2907. if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
  2908. &base_vha->dpc_flags)) {
  2909. DEBUG(printk("scsi(%ld): qla2x00_loop_resync()\n",
  2910. base_vha->host_no));
  2911. if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
  2912. &base_vha->dpc_flags))) {
  2913. rval = qla2x00_loop_resync(base_vha);
  2914. clear_bit(LOOP_RESYNC_ACTIVE,
  2915. &base_vha->dpc_flags);
  2916. }
  2917. DEBUG(printk("scsi(%ld): qla2x00_loop_resync - end\n",
  2918. base_vha->host_no));
  2919. }
  2920. if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
  2921. atomic_read(&base_vha->loop_state) == LOOP_READY) {
  2922. clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
  2923. qla2xxx_flash_npiv_conf(base_vha);
  2924. }
  2925. if (!ha->interrupts_on)
  2926. ha->isp_ops->enable_intrs(ha);
  2927. if (test_and_clear_bit(BEACON_BLINK_NEEDED,
  2928. &base_vha->dpc_flags))
  2929. ha->isp_ops->beacon_blink(base_vha);
  2930. qla2x00_do_dpc_all_vps(base_vha);
  2931. ha->dpc_active = 0;
  2932. } /* End of while(1) */
  2933. DEBUG(printk("scsi(%ld): DPC handler exiting\n", base_vha->host_no));
  2934. /*
  2935. * Make sure that nobody tries to wake us up again.
  2936. */
  2937. ha->dpc_active = 0;
  2938. /* Cleanup any residual CTX SRBs. */
  2939. qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
  2940. return 0;
  2941. }
  2942. void
  2943. qla2xxx_wake_dpc(struct scsi_qla_host *vha)
  2944. {
  2945. struct qla_hw_data *ha = vha->hw;
  2946. struct task_struct *t = ha->dpc_thread;
  2947. if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
  2948. wake_up_process(t);
  2949. }
  2950. /*
  2951. * qla2x00_rst_aen
  2952. * Processes asynchronous reset.
  2953. *
  2954. * Input:
  2955. * ha = adapter block pointer.
  2956. */
  2957. static void
  2958. qla2x00_rst_aen(scsi_qla_host_t *vha)
  2959. {
  2960. if (vha->flags.online && !vha->flags.reset_active &&
  2961. !atomic_read(&vha->loop_down_timer) &&
  2962. !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
  2963. do {
  2964. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  2965. /*
  2966. * Issue marker command only when we are going to start
  2967. * the I/O.
  2968. */
  2969. vha->marker_needed = 1;
  2970. } while (!atomic_read(&vha->loop_down_timer) &&
  2971. (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
  2972. }
  2973. }
  2974. static void
  2975. qla2x00_sp_free_dma(srb_t *sp)
  2976. {
  2977. struct scsi_cmnd *cmd = sp->cmd;
  2978. struct qla_hw_data *ha = sp->fcport->vha->hw;
  2979. if (sp->flags & SRB_DMA_VALID) {
  2980. scsi_dma_unmap(cmd);
  2981. sp->flags &= ~SRB_DMA_VALID;
  2982. }
  2983. if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
  2984. dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
  2985. scsi_prot_sg_count(cmd), cmd->sc_data_direction);
  2986. sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
  2987. }
  2988. if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
  2989. /* List assured to be having elements */
  2990. qla2x00_clean_dsd_pool(ha, sp);
  2991. sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
  2992. }
  2993. if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
  2994. dma_pool_free(ha->dl_dma_pool, sp->ctx,
  2995. ((struct crc_context *)sp->ctx)->crc_ctx_dma);
  2996. sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
  2997. }
  2998. CMD_SP(cmd) = NULL;
  2999. }
  3000. static void
  3001. qla2x00_sp_final_compl(struct qla_hw_data *ha, srb_t *sp)
  3002. {
  3003. struct scsi_cmnd *cmd = sp->cmd;
  3004. qla2x00_sp_free_dma(sp);
  3005. if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
  3006. struct ct6_dsd *ctx = sp->ctx;
  3007. dma_pool_free(ha->fcp_cmnd_dma_pool, ctx->fcp_cmnd,
  3008. ctx->fcp_cmnd_dma);
  3009. list_splice(&ctx->dsd_list, &ha->gbl_dsd_list);
  3010. ha->gbl_dsd_inuse -= ctx->dsd_use_cnt;
  3011. ha->gbl_dsd_avail += ctx->dsd_use_cnt;
  3012. mempool_free(sp->ctx, ha->ctx_mempool);
  3013. sp->ctx = NULL;
  3014. }
  3015. mempool_free(sp, ha->srb_mempool);
  3016. cmd->scsi_done(cmd);
  3017. }
  3018. void
  3019. qla2x00_sp_compl(struct qla_hw_data *ha, srb_t *sp)
  3020. {
  3021. if (atomic_read(&sp->ref_count) == 0) {
  3022. DEBUG2(qla_printk(KERN_WARNING, ha,
  3023. "SP reference-count to ZERO -- sp=%p\n", sp));
  3024. DEBUG2(BUG());
  3025. return;
  3026. }
  3027. if (!atomic_dec_and_test(&sp->ref_count))
  3028. return;
  3029. qla2x00_sp_final_compl(ha, sp);
  3030. }
  3031. /**************************************************************************
  3032. * qla2x00_timer
  3033. *
  3034. * Description:
  3035. * One second timer
  3036. *
  3037. * Context: Interrupt
  3038. ***************************************************************************/
  3039. void
  3040. qla2x00_timer(scsi_qla_host_t *vha)
  3041. {
  3042. unsigned long cpu_flags = 0;
  3043. fc_port_t *fcport;
  3044. int start_dpc = 0;
  3045. int index;
  3046. srb_t *sp;
  3047. int t;
  3048. uint16_t w;
  3049. struct qla_hw_data *ha = vha->hw;
  3050. struct req_que *req;
  3051. if (ha->flags.eeh_busy) {
  3052. qla2x00_restart_timer(vha, WATCH_INTERVAL);
  3053. return;
  3054. }
  3055. if (IS_QLA82XX(ha))
  3056. qla82xx_watchdog(vha);
  3057. /* Hardware read to raise pending EEH errors during mailbox waits. */
  3058. if (!pci_channel_offline(ha->pdev))
  3059. pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
  3060. /*
  3061. * Ports - Port down timer.
  3062. *
  3063. * Whenever, a port is in the LOST state we start decrementing its port
  3064. * down timer every second until it reaches zero. Once it reaches zero
  3065. * the port it marked DEAD.
  3066. */
  3067. t = 0;
  3068. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  3069. if (fcport->port_type != FCT_TARGET)
  3070. continue;
  3071. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  3072. if (atomic_read(&fcport->port_down_timer) == 0)
  3073. continue;
  3074. if (atomic_dec_and_test(&fcport->port_down_timer) != 0)
  3075. atomic_set(&fcport->state, FCS_DEVICE_DEAD);
  3076. DEBUG(printk("scsi(%ld): fcport-%d - port retry count: "
  3077. "%d remaining\n",
  3078. vha->host_no,
  3079. t, atomic_read(&fcport->port_down_timer)));
  3080. }
  3081. t++;
  3082. } /* End of for fcport */
  3083. /* Loop down handler. */
  3084. if (atomic_read(&vha->loop_down_timer) > 0 &&
  3085. !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))
  3086. && vha->flags.online) {
  3087. if (atomic_read(&vha->loop_down_timer) ==
  3088. vha->loop_down_abort_time) {
  3089. DEBUG(printk("scsi(%ld): Loop Down - aborting the "
  3090. "queues before time expire\n",
  3091. vha->host_no));
  3092. if (!IS_QLA2100(ha) && vha->link_down_timeout)
  3093. atomic_set(&vha->loop_state, LOOP_DEAD);
  3094. /*
  3095. * Schedule an ISP abort to return any FCP2-device
  3096. * commands.
  3097. */
  3098. /* NPIV - scan physical port only */
  3099. if (!vha->vp_idx) {
  3100. spin_lock_irqsave(&ha->hardware_lock,
  3101. cpu_flags);
  3102. req = ha->req_q_map[0];
  3103. for (index = 1;
  3104. index < MAX_OUTSTANDING_COMMANDS;
  3105. index++) {
  3106. fc_port_t *sfcp;
  3107. sp = req->outstanding_cmds[index];
  3108. if (!sp)
  3109. continue;
  3110. if (sp->ctx && !IS_PROT_IO(sp))
  3111. continue;
  3112. sfcp = sp->fcport;
  3113. if (!(sfcp->flags & FCF_FCP2_DEVICE))
  3114. continue;
  3115. set_bit(ISP_ABORT_NEEDED,
  3116. &vha->dpc_flags);
  3117. break;
  3118. }
  3119. spin_unlock_irqrestore(&ha->hardware_lock,
  3120. cpu_flags);
  3121. }
  3122. start_dpc++;
  3123. }
  3124. /* if the loop has been down for 4 minutes, reinit adapter */
  3125. if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
  3126. if (!(vha->device_flags & DFLG_NO_CABLE)) {
  3127. DEBUG(printk("scsi(%ld): Loop down - "
  3128. "aborting ISP.\n",
  3129. vha->host_no));
  3130. qla_printk(KERN_WARNING, ha,
  3131. "Loop down - aborting ISP.\n");
  3132. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  3133. }
  3134. }
  3135. DEBUG3(printk("scsi(%ld): Loop Down - seconds remaining %d\n",
  3136. vha->host_no,
  3137. atomic_read(&vha->loop_down_timer)));
  3138. }
  3139. /* Check if beacon LED needs to be blinked */
  3140. if (ha->beacon_blink_led == 1) {
  3141. set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
  3142. start_dpc++;
  3143. }
  3144. /* Process any deferred work. */
  3145. if (!list_empty(&vha->work_list))
  3146. start_dpc++;
  3147. /* Schedule the DPC routine if needed */
  3148. if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
  3149. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
  3150. test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
  3151. start_dpc ||
  3152. test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
  3153. test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
  3154. test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
  3155. test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
  3156. test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
  3157. test_bit(RELOGIN_NEEDED, &vha->dpc_flags)))
  3158. qla2xxx_wake_dpc(vha);
  3159. qla2x00_restart_timer(vha, WATCH_INTERVAL);
  3160. }
  3161. /* Firmware interface routines. */
  3162. #define FW_BLOBS 8
  3163. #define FW_ISP21XX 0
  3164. #define FW_ISP22XX 1
  3165. #define FW_ISP2300 2
  3166. #define FW_ISP2322 3
  3167. #define FW_ISP24XX 4
  3168. #define FW_ISP25XX 5
  3169. #define FW_ISP81XX 6
  3170. #define FW_ISP82XX 7
  3171. #define FW_FILE_ISP21XX "ql2100_fw.bin"
  3172. #define FW_FILE_ISP22XX "ql2200_fw.bin"
  3173. #define FW_FILE_ISP2300 "ql2300_fw.bin"
  3174. #define FW_FILE_ISP2322 "ql2322_fw.bin"
  3175. #define FW_FILE_ISP24XX "ql2400_fw.bin"
  3176. #define FW_FILE_ISP25XX "ql2500_fw.bin"
  3177. #define FW_FILE_ISP81XX "ql8100_fw.bin"
  3178. #define FW_FILE_ISP82XX "ql8200_fw.bin"
  3179. static DEFINE_MUTEX(qla_fw_lock);
  3180. static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
  3181. { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
  3182. { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
  3183. { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
  3184. { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
  3185. { .name = FW_FILE_ISP24XX, },
  3186. { .name = FW_FILE_ISP25XX, },
  3187. { .name = FW_FILE_ISP81XX, },
  3188. { .name = FW_FILE_ISP82XX, },
  3189. };
  3190. struct fw_blob *
  3191. qla2x00_request_firmware(scsi_qla_host_t *vha)
  3192. {
  3193. struct qla_hw_data *ha = vha->hw;
  3194. struct fw_blob *blob;
  3195. blob = NULL;
  3196. if (IS_QLA2100(ha)) {
  3197. blob = &qla_fw_blobs[FW_ISP21XX];
  3198. } else if (IS_QLA2200(ha)) {
  3199. blob = &qla_fw_blobs[FW_ISP22XX];
  3200. } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  3201. blob = &qla_fw_blobs[FW_ISP2300];
  3202. } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
  3203. blob = &qla_fw_blobs[FW_ISP2322];
  3204. } else if (IS_QLA24XX_TYPE(ha)) {
  3205. blob = &qla_fw_blobs[FW_ISP24XX];
  3206. } else if (IS_QLA25XX(ha)) {
  3207. blob = &qla_fw_blobs[FW_ISP25XX];
  3208. } else if (IS_QLA81XX(ha)) {
  3209. blob = &qla_fw_blobs[FW_ISP81XX];
  3210. } else if (IS_QLA82XX(ha)) {
  3211. blob = &qla_fw_blobs[FW_ISP82XX];
  3212. }
  3213. mutex_lock(&qla_fw_lock);
  3214. if (blob->fw)
  3215. goto out;
  3216. if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
  3217. DEBUG2(printk("scsi(%ld): Failed to load firmware image "
  3218. "(%s).\n", vha->host_no, blob->name));
  3219. blob->fw = NULL;
  3220. blob = NULL;
  3221. goto out;
  3222. }
  3223. out:
  3224. mutex_unlock(&qla_fw_lock);
  3225. return blob;
  3226. }
  3227. static void
  3228. qla2x00_release_firmware(void)
  3229. {
  3230. int idx;
  3231. mutex_lock(&qla_fw_lock);
  3232. for (idx = 0; idx < FW_BLOBS; idx++)
  3233. if (qla_fw_blobs[idx].fw)
  3234. release_firmware(qla_fw_blobs[idx].fw);
  3235. mutex_unlock(&qla_fw_lock);
  3236. }
  3237. static pci_ers_result_t
  3238. qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
  3239. {
  3240. scsi_qla_host_t *vha = pci_get_drvdata(pdev);
  3241. struct qla_hw_data *ha = vha->hw;
  3242. DEBUG2(qla_printk(KERN_WARNING, ha, "error_detected:state %x\n",
  3243. state));
  3244. switch (state) {
  3245. case pci_channel_io_normal:
  3246. ha->flags.eeh_busy = 0;
  3247. return PCI_ERS_RESULT_CAN_RECOVER;
  3248. case pci_channel_io_frozen:
  3249. ha->flags.eeh_busy = 1;
  3250. /* For ISP82XX complete any pending mailbox cmd */
  3251. if (IS_QLA82XX(ha)) {
  3252. ha->flags.fw_hung = 1;
  3253. if (ha->flags.mbox_busy) {
  3254. ha->flags.mbox_int = 1;
  3255. DEBUG2(qla_printk(KERN_ERR, ha,
  3256. "Due to pci channel io frozen, doing premature "
  3257. "completion of mbx command\n"));
  3258. complete(&ha->mbx_intr_comp);
  3259. }
  3260. }
  3261. qla2x00_free_irqs(vha);
  3262. pci_disable_device(pdev);
  3263. /* Return back all IOs */
  3264. qla2x00_abort_all_cmds(vha, DID_RESET << 16);
  3265. return PCI_ERS_RESULT_NEED_RESET;
  3266. case pci_channel_io_perm_failure:
  3267. ha->flags.pci_channel_io_perm_failure = 1;
  3268. qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
  3269. return PCI_ERS_RESULT_DISCONNECT;
  3270. }
  3271. return PCI_ERS_RESULT_NEED_RESET;
  3272. }
  3273. static pci_ers_result_t
  3274. qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
  3275. {
  3276. int risc_paused = 0;
  3277. uint32_t stat;
  3278. unsigned long flags;
  3279. scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
  3280. struct qla_hw_data *ha = base_vha->hw;
  3281. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  3282. struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
  3283. spin_lock_irqsave(&ha->hardware_lock, flags);
  3284. if (IS_QLA2100(ha) || IS_QLA2200(ha)){
  3285. stat = RD_REG_DWORD(&reg->hccr);
  3286. if (stat & HCCR_RISC_PAUSE)
  3287. risc_paused = 1;
  3288. } else if (IS_QLA23XX(ha)) {
  3289. stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
  3290. if (stat & HSR_RISC_PAUSED)
  3291. risc_paused = 1;
  3292. } else if (IS_FWI2_CAPABLE(ha)) {
  3293. stat = RD_REG_DWORD(&reg24->host_status);
  3294. if (stat & HSRX_RISC_PAUSED)
  3295. risc_paused = 1;
  3296. }
  3297. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3298. if (risc_paused) {
  3299. qla_printk(KERN_INFO, ha, "RISC paused -- mmio_enabled, "
  3300. "Dumping firmware!\n");
  3301. ha->isp_ops->fw_dump(base_vha, 0);
  3302. return PCI_ERS_RESULT_NEED_RESET;
  3303. } else
  3304. return PCI_ERS_RESULT_RECOVERED;
  3305. }
  3306. uint32_t qla82xx_error_recovery(scsi_qla_host_t *base_vha)
  3307. {
  3308. uint32_t rval = QLA_FUNCTION_FAILED;
  3309. uint32_t drv_active = 0;
  3310. struct qla_hw_data *ha = base_vha->hw;
  3311. int fn;
  3312. struct pci_dev *other_pdev = NULL;
  3313. DEBUG17(qla_printk(KERN_INFO, ha,
  3314. "scsi(%ld): In qla82xx_error_recovery\n", base_vha->host_no));
  3315. set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  3316. if (base_vha->flags.online) {
  3317. /* Abort all outstanding commands,
  3318. * so as to be requeued later */
  3319. qla2x00_abort_isp_cleanup(base_vha);
  3320. }
  3321. fn = PCI_FUNC(ha->pdev->devfn);
  3322. while (fn > 0) {
  3323. fn--;
  3324. DEBUG17(qla_printk(KERN_INFO, ha,
  3325. "Finding pci device at function = 0x%x\n", fn));
  3326. other_pdev =
  3327. pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
  3328. ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
  3329. fn));
  3330. if (!other_pdev)
  3331. continue;
  3332. if (atomic_read(&other_pdev->enable_cnt)) {
  3333. DEBUG17(qla_printk(KERN_INFO, ha,
  3334. "Found PCI func availabe and enabled at 0x%x\n",
  3335. fn));
  3336. pci_dev_put(other_pdev);
  3337. break;
  3338. }
  3339. pci_dev_put(other_pdev);
  3340. }
  3341. if (!fn) {
  3342. /* Reset owner */
  3343. DEBUG17(qla_printk(KERN_INFO, ha,
  3344. "This devfn is reset owner = 0x%x\n", ha->pdev->devfn));
  3345. qla82xx_idc_lock(ha);
  3346. qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
  3347. QLA82XX_DEV_INITIALIZING);
  3348. qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
  3349. QLA82XX_IDC_VERSION);
  3350. drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
  3351. DEBUG17(qla_printk(KERN_INFO, ha,
  3352. "drv_active = 0x%x\n", drv_active));
  3353. qla82xx_idc_unlock(ha);
  3354. /* Reset if device is not already reset
  3355. * drv_active would be 0 if a reset has already been done
  3356. */
  3357. if (drv_active)
  3358. rval = qla82xx_start_firmware(base_vha);
  3359. else
  3360. rval = QLA_SUCCESS;
  3361. qla82xx_idc_lock(ha);
  3362. if (rval != QLA_SUCCESS) {
  3363. qla_printk(KERN_INFO, ha, "HW State: FAILED\n");
  3364. qla82xx_clear_drv_active(ha);
  3365. qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
  3366. QLA82XX_DEV_FAILED);
  3367. } else {
  3368. qla_printk(KERN_INFO, ha, "HW State: READY\n");
  3369. qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
  3370. QLA82XX_DEV_READY);
  3371. qla82xx_idc_unlock(ha);
  3372. ha->flags.fw_hung = 0;
  3373. rval = qla82xx_restart_isp(base_vha);
  3374. qla82xx_idc_lock(ha);
  3375. /* Clear driver state register */
  3376. qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
  3377. qla82xx_set_drv_active(base_vha);
  3378. }
  3379. qla82xx_idc_unlock(ha);
  3380. } else {
  3381. DEBUG17(qla_printk(KERN_INFO, ha,
  3382. "This devfn is not reset owner = 0x%x\n", ha->pdev->devfn));
  3383. if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
  3384. QLA82XX_DEV_READY)) {
  3385. ha->flags.fw_hung = 0;
  3386. rval = qla82xx_restart_isp(base_vha);
  3387. qla82xx_idc_lock(ha);
  3388. qla82xx_set_drv_active(base_vha);
  3389. qla82xx_idc_unlock(ha);
  3390. }
  3391. }
  3392. clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  3393. return rval;
  3394. }
  3395. static pci_ers_result_t
  3396. qla2xxx_pci_slot_reset(struct pci_dev *pdev)
  3397. {
  3398. pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
  3399. scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
  3400. struct qla_hw_data *ha = base_vha->hw;
  3401. struct rsp_que *rsp;
  3402. int rc, retries = 10;
  3403. DEBUG17(qla_printk(KERN_WARNING, ha, "slot_reset\n"));
  3404. /* Workaround: qla2xxx driver which access hardware earlier
  3405. * needs error state to be pci_channel_io_online.
  3406. * Otherwise mailbox command timesout.
  3407. */
  3408. pdev->error_state = pci_channel_io_normal;
  3409. pci_restore_state(pdev);
  3410. /* pci_restore_state() clears the saved_state flag of the device
  3411. * save restored state which resets saved_state flag
  3412. */
  3413. pci_save_state(pdev);
  3414. if (ha->mem_only)
  3415. rc = pci_enable_device_mem(pdev);
  3416. else
  3417. rc = pci_enable_device(pdev);
  3418. if (rc) {
  3419. qla_printk(KERN_WARNING, ha,
  3420. "Can't re-enable PCI device after reset.\n");
  3421. goto exit_slot_reset;
  3422. }
  3423. rsp = ha->rsp_q_map[0];
  3424. if (qla2x00_request_irqs(ha, rsp))
  3425. goto exit_slot_reset;
  3426. if (ha->isp_ops->pci_config(base_vha))
  3427. goto exit_slot_reset;
  3428. if (IS_QLA82XX(ha)) {
  3429. if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
  3430. ret = PCI_ERS_RESULT_RECOVERED;
  3431. goto exit_slot_reset;
  3432. } else
  3433. goto exit_slot_reset;
  3434. }
  3435. while (ha->flags.mbox_busy && retries--)
  3436. msleep(1000);
  3437. set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  3438. if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
  3439. ret = PCI_ERS_RESULT_RECOVERED;
  3440. clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  3441. exit_slot_reset:
  3442. DEBUG17(qla_printk(KERN_WARNING, ha,
  3443. "slot_reset-return:ret=%x\n", ret));
  3444. return ret;
  3445. }
  3446. static void
  3447. qla2xxx_pci_resume(struct pci_dev *pdev)
  3448. {
  3449. scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
  3450. struct qla_hw_data *ha = base_vha->hw;
  3451. int ret;
  3452. DEBUG17(qla_printk(KERN_WARNING, ha, "pci_resume\n"));
  3453. ret = qla2x00_wait_for_hba_online(base_vha);
  3454. if (ret != QLA_SUCCESS) {
  3455. qla_printk(KERN_ERR, ha,
  3456. "the device failed to resume I/O "
  3457. "from slot/link_reset");
  3458. }
  3459. pci_cleanup_aer_uncorrect_error_status(pdev);
  3460. ha->flags.eeh_busy = 0;
  3461. }
  3462. static struct pci_error_handlers qla2xxx_err_handler = {
  3463. .error_detected = qla2xxx_pci_error_detected,
  3464. .mmio_enabled = qla2xxx_pci_mmio_enabled,
  3465. .slot_reset = qla2xxx_pci_slot_reset,
  3466. .resume = qla2xxx_pci_resume,
  3467. };
  3468. static struct pci_device_id qla2xxx_pci_tbl[] = {
  3469. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
  3470. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
  3471. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
  3472. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
  3473. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
  3474. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
  3475. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
  3476. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
  3477. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
  3478. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
  3479. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
  3480. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
  3481. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
  3482. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
  3483. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
  3484. { 0 },
  3485. };
  3486. MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
  3487. static struct pci_driver qla2xxx_pci_driver = {
  3488. .name = QLA2XXX_DRIVER_NAME,
  3489. .driver = {
  3490. .owner = THIS_MODULE,
  3491. },
  3492. .id_table = qla2xxx_pci_tbl,
  3493. .probe = qla2x00_probe_one,
  3494. .remove = qla2x00_remove_one,
  3495. .err_handler = &qla2xxx_err_handler,
  3496. };
  3497. static struct file_operations apidev_fops = {
  3498. .owner = THIS_MODULE,
  3499. };
  3500. /**
  3501. * qla2x00_module_init - Module initialization.
  3502. **/
  3503. static int __init
  3504. qla2x00_module_init(void)
  3505. {
  3506. int ret = 0;
  3507. /* Allocate cache for SRBs. */
  3508. srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
  3509. SLAB_HWCACHE_ALIGN, NULL);
  3510. if (srb_cachep == NULL) {
  3511. printk(KERN_ERR
  3512. "qla2xxx: Unable to allocate SRB cache...Failing load!\n");
  3513. return -ENOMEM;
  3514. }
  3515. /* Derive version string. */
  3516. strcpy(qla2x00_version_str, QLA2XXX_VERSION);
  3517. if (ql2xextended_error_logging)
  3518. strcat(qla2x00_version_str, "-debug");
  3519. qla2xxx_transport_template =
  3520. fc_attach_transport(&qla2xxx_transport_functions);
  3521. if (!qla2xxx_transport_template) {
  3522. kmem_cache_destroy(srb_cachep);
  3523. return -ENODEV;
  3524. }
  3525. apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
  3526. if (apidev_major < 0) {
  3527. printk(KERN_WARNING "qla2xxx: Unable to register char device "
  3528. "%s\n", QLA2XXX_APIDEV);
  3529. }
  3530. qla2xxx_transport_vport_template =
  3531. fc_attach_transport(&qla2xxx_transport_vport_functions);
  3532. if (!qla2xxx_transport_vport_template) {
  3533. kmem_cache_destroy(srb_cachep);
  3534. fc_release_transport(qla2xxx_transport_template);
  3535. return -ENODEV;
  3536. }
  3537. printk(KERN_INFO "QLogic Fibre Channel HBA Driver: %s\n",
  3538. qla2x00_version_str);
  3539. ret = pci_register_driver(&qla2xxx_pci_driver);
  3540. if (ret) {
  3541. kmem_cache_destroy(srb_cachep);
  3542. fc_release_transport(qla2xxx_transport_template);
  3543. fc_release_transport(qla2xxx_transport_vport_template);
  3544. }
  3545. return ret;
  3546. }
  3547. /**
  3548. * qla2x00_module_exit - Module cleanup.
  3549. **/
  3550. static void __exit
  3551. qla2x00_module_exit(void)
  3552. {
  3553. unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
  3554. pci_unregister_driver(&qla2xxx_pci_driver);
  3555. qla2x00_release_firmware();
  3556. kmem_cache_destroy(srb_cachep);
  3557. if (ctx_cachep)
  3558. kmem_cache_destroy(ctx_cachep);
  3559. fc_release_transport(qla2xxx_transport_template);
  3560. fc_release_transport(qla2xxx_transport_vport_template);
  3561. }
  3562. module_init(qla2x00_module_init);
  3563. module_exit(qla2x00_module_exit);
  3564. MODULE_AUTHOR("QLogic Corporation");
  3565. MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
  3566. MODULE_LICENSE("GPL");
  3567. MODULE_VERSION(QLA2XXX_VERSION);
  3568. MODULE_FIRMWARE(FW_FILE_ISP21XX);
  3569. MODULE_FIRMWARE(FW_FILE_ISP22XX);
  3570. MODULE_FIRMWARE(FW_FILE_ISP2300);
  3571. MODULE_FIRMWARE(FW_FILE_ISP2322);
  3572. MODULE_FIRMWARE(FW_FILE_ISP24XX);
  3573. MODULE_FIRMWARE(FW_FILE_ISP25XX);