twl6030-irq.c 12 KB

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  1. /*
  2. * twl6030-irq.c - TWL6030 irq support
  3. *
  4. * Copyright (C) 2005-2009 Texas Instruments, Inc.
  5. *
  6. * Modifications to defer interrupt handling to a kernel thread:
  7. * Copyright (C) 2006 MontaVista Software, Inc.
  8. *
  9. * Based on tlv320aic23.c:
  10. * Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
  11. *
  12. * Code cleanup and modifications to IRQ handler.
  13. * by syed khasim <x0khasim@ti.com>
  14. *
  15. * TWL6030 specific code and IRQ handling changes by
  16. * Jagadeesh Bhaskar Pakaravoor <j-pakaravoor@ti.com>
  17. * Balaji T K <balajitk@ti.com>
  18. *
  19. * This program is free software; you can redistribute it and/or modify
  20. * it under the terms of the GNU General Public License as published by
  21. * the Free Software Foundation; either version 2 of the License, or
  22. * (at your option) any later version.
  23. *
  24. * This program is distributed in the hope that it will be useful,
  25. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  26. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  27. * GNU General Public License for more details.
  28. *
  29. * You should have received a copy of the GNU General Public License
  30. * along with this program; if not, write to the Free Software
  31. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  32. */
  33. #include <linux/init.h>
  34. #include <linux/export.h>
  35. #include <linux/interrupt.h>
  36. #include <linux/irq.h>
  37. #include <linux/kthread.h>
  38. #include <linux/i2c/twl.h>
  39. #include <linux/platform_device.h>
  40. #include <linux/suspend.h>
  41. #include "twl-core.h"
  42. /*
  43. * TWL6030 (unlike its predecessors, which had two level interrupt handling)
  44. * three interrupt registers INT_STS_A, INT_STS_B and INT_STS_C.
  45. * It exposes status bits saying who has raised an interrupt. There are
  46. * three mask registers that corresponds to these status registers, that
  47. * enables/disables these interrupts.
  48. *
  49. * We set up IRQs starting at a platform-specified base. An interrupt map table,
  50. * specifies mapping between interrupt number and the associated module.
  51. *
  52. */
  53. static int twl6030_interrupt_mapping[24] = {
  54. PWR_INTR_OFFSET, /* Bit 0 PWRON */
  55. PWR_INTR_OFFSET, /* Bit 1 RPWRON */
  56. PWR_INTR_OFFSET, /* Bit 2 BAT_VLOW */
  57. RTC_INTR_OFFSET, /* Bit 3 RTC_ALARM */
  58. RTC_INTR_OFFSET, /* Bit 4 RTC_PERIOD */
  59. HOTDIE_INTR_OFFSET, /* Bit 5 HOT_DIE */
  60. SMPSLDO_INTR_OFFSET, /* Bit 6 VXXX_SHORT */
  61. SMPSLDO_INTR_OFFSET, /* Bit 7 VMMC_SHORT */
  62. SMPSLDO_INTR_OFFSET, /* Bit 8 VUSIM_SHORT */
  63. BATDETECT_INTR_OFFSET, /* Bit 9 BAT */
  64. SIMDETECT_INTR_OFFSET, /* Bit 10 SIM */
  65. MMCDETECT_INTR_OFFSET, /* Bit 11 MMC */
  66. RSV_INTR_OFFSET, /* Bit 12 Reserved */
  67. MADC_INTR_OFFSET, /* Bit 13 GPADC_RT_EOC */
  68. MADC_INTR_OFFSET, /* Bit 14 GPADC_SW_EOC */
  69. GASGAUGE_INTR_OFFSET, /* Bit 15 CC_AUTOCAL */
  70. USBOTG_INTR_OFFSET, /* Bit 16 ID_WKUP */
  71. USBOTG_INTR_OFFSET, /* Bit 17 VBUS_WKUP */
  72. USBOTG_INTR_OFFSET, /* Bit 18 ID */
  73. USB_PRES_INTR_OFFSET, /* Bit 19 VBUS */
  74. CHARGER_INTR_OFFSET, /* Bit 20 CHRG_CTRL */
  75. CHARGERFAULT_INTR_OFFSET, /* Bit 21 EXT_CHRG */
  76. CHARGERFAULT_INTR_OFFSET, /* Bit 22 INT_CHRG */
  77. RSV_INTR_OFFSET, /* Bit 23 Reserved */
  78. };
  79. /*----------------------------------------------------------------------*/
  80. static unsigned twl6030_irq_base;
  81. static int twl_irq;
  82. static bool twl_irq_wake_enabled;
  83. static struct completion irq_event;
  84. static atomic_t twl6030_wakeirqs = ATOMIC_INIT(0);
  85. static int twl6030_irq_pm_notifier(struct notifier_block *notifier,
  86. unsigned long pm_event, void *unused)
  87. {
  88. int chained_wakeups;
  89. switch (pm_event) {
  90. case PM_SUSPEND_PREPARE:
  91. chained_wakeups = atomic_read(&twl6030_wakeirqs);
  92. if (chained_wakeups && !twl_irq_wake_enabled) {
  93. if (enable_irq_wake(twl_irq))
  94. pr_err("twl6030 IRQ wake enable failed\n");
  95. else
  96. twl_irq_wake_enabled = true;
  97. } else if (!chained_wakeups && twl_irq_wake_enabled) {
  98. disable_irq_wake(twl_irq);
  99. twl_irq_wake_enabled = false;
  100. }
  101. disable_irq(twl_irq);
  102. break;
  103. case PM_POST_SUSPEND:
  104. enable_irq(twl_irq);
  105. break;
  106. default:
  107. break;
  108. }
  109. return NOTIFY_DONE;
  110. }
  111. static struct notifier_block twl6030_irq_pm_notifier_block = {
  112. .notifier_call = twl6030_irq_pm_notifier,
  113. };
  114. /*
  115. * This thread processes interrupts reported by the Primary Interrupt Handler.
  116. */
  117. static int twl6030_irq_thread(void *data)
  118. {
  119. long irq = (long)data;
  120. static unsigned i2c_errors;
  121. static const unsigned max_i2c_errors = 100;
  122. int ret;
  123. while (!kthread_should_stop()) {
  124. int i;
  125. union {
  126. u8 bytes[4];
  127. u32 int_sts;
  128. } sts;
  129. /* Wait for IRQ, then read PIH irq status (also blocking) */
  130. wait_for_completion_interruptible(&irq_event);
  131. /* read INT_STS_A, B and C in one shot using a burst read */
  132. ret = twl_i2c_read(TWL_MODULE_PIH, sts.bytes,
  133. REG_INT_STS_A, 3);
  134. if (ret) {
  135. pr_warning("twl6030: I2C error %d reading PIH ISR\n",
  136. ret);
  137. if (++i2c_errors >= max_i2c_errors) {
  138. printk(KERN_ERR "Maximum I2C error count"
  139. " exceeded. Terminating %s.\n",
  140. __func__);
  141. break;
  142. }
  143. complete(&irq_event);
  144. continue;
  145. }
  146. sts.bytes[3] = 0; /* Only 24 bits are valid*/
  147. /*
  148. * Since VBUS status bit is not reliable for VBUS disconnect
  149. * use CHARGER VBUS detection status bit instead.
  150. */
  151. if (sts.bytes[2] & 0x10)
  152. sts.bytes[2] |= 0x08;
  153. for (i = 0; sts.int_sts; sts.int_sts >>= 1, i++) {
  154. local_irq_disable();
  155. if (sts.int_sts & 0x1) {
  156. int module_irq = twl6030_irq_base +
  157. twl6030_interrupt_mapping[i];
  158. generic_handle_irq(module_irq);
  159. }
  160. local_irq_enable();
  161. }
  162. /*
  163. * NOTE:
  164. * Simulation confirms that documentation is wrong w.r.t the
  165. * interrupt status clear operation. A single *byte* write to
  166. * any one of STS_A to STS_C register results in all three
  167. * STS registers being reset. Since it does not matter which
  168. * value is written, all three registers are cleared on a
  169. * single byte write, so we just use 0x0 to clear.
  170. */
  171. ret = twl_i2c_write_u8(TWL_MODULE_PIH, 0x00, REG_INT_STS_A);
  172. if (ret)
  173. pr_warning("twl6030: I2C error in clearing PIH ISR\n");
  174. enable_irq(irq);
  175. }
  176. return 0;
  177. }
  178. /*
  179. * handle_twl6030_int() is the desc->handle method for the twl6030 interrupt.
  180. * This is a chained interrupt, so there is no desc->action method for it.
  181. * Now we need to query the interrupt controller in the twl6030 to determine
  182. * which module is generating the interrupt request. However, we can't do i2c
  183. * transactions in interrupt context, so we must defer that work to a kernel
  184. * thread. All we do here is acknowledge and mask the interrupt and wakeup
  185. * the kernel thread.
  186. */
  187. static irqreturn_t handle_twl6030_pih(int irq, void *devid)
  188. {
  189. disable_irq_nosync(irq);
  190. complete(devid);
  191. return IRQ_HANDLED;
  192. }
  193. /*----------------------------------------------------------------------*/
  194. static inline void activate_irq(int irq)
  195. {
  196. #ifdef CONFIG_ARM
  197. /* ARM requires an extra step to clear IRQ_NOREQUEST, which it
  198. * sets on behalf of every irq_chip. Also sets IRQ_NOPROBE.
  199. */
  200. set_irq_flags(irq, IRQF_VALID);
  201. #else
  202. /* same effect on other architectures */
  203. irq_set_noprobe(irq);
  204. #endif
  205. }
  206. static int twl6030_irq_set_wake(struct irq_data *d, unsigned int on)
  207. {
  208. if (on)
  209. atomic_inc(&twl6030_wakeirqs);
  210. else
  211. atomic_dec(&twl6030_wakeirqs);
  212. return 0;
  213. }
  214. /*----------------------------------------------------------------------*/
  215. static unsigned twl6030_irq_next;
  216. /*----------------------------------------------------------------------*/
  217. int twl6030_interrupt_unmask(u8 bit_mask, u8 offset)
  218. {
  219. int ret;
  220. u8 unmask_value;
  221. ret = twl_i2c_read_u8(TWL_MODULE_PIH, &unmask_value,
  222. REG_INT_STS_A + offset);
  223. unmask_value &= (~(bit_mask));
  224. ret |= twl_i2c_write_u8(TWL_MODULE_PIH, unmask_value,
  225. REG_INT_STS_A + offset); /* unmask INT_MSK_A/B/C */
  226. return ret;
  227. }
  228. EXPORT_SYMBOL(twl6030_interrupt_unmask);
  229. int twl6030_interrupt_mask(u8 bit_mask, u8 offset)
  230. {
  231. int ret;
  232. u8 mask_value;
  233. ret = twl_i2c_read_u8(TWL_MODULE_PIH, &mask_value,
  234. REG_INT_STS_A + offset);
  235. mask_value |= (bit_mask);
  236. ret |= twl_i2c_write_u8(TWL_MODULE_PIH, mask_value,
  237. REG_INT_STS_A + offset); /* mask INT_MSK_A/B/C */
  238. return ret;
  239. }
  240. EXPORT_SYMBOL(twl6030_interrupt_mask);
  241. int twl6030_mmc_card_detect_config(void)
  242. {
  243. int ret;
  244. u8 reg_val = 0;
  245. /* Unmasking the Card detect Interrupt line for MMC1 from Phoenix */
  246. twl6030_interrupt_unmask(TWL6030_MMCDETECT_INT_MASK,
  247. REG_INT_MSK_LINE_B);
  248. twl6030_interrupt_unmask(TWL6030_MMCDETECT_INT_MASK,
  249. REG_INT_MSK_STS_B);
  250. /*
  251. * Initially Configuring MMC_CTRL for receiving interrupts &
  252. * Card status on TWL6030 for MMC1
  253. */
  254. ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &reg_val, TWL6030_MMCCTRL);
  255. if (ret < 0) {
  256. pr_err("twl6030: Failed to read MMCCTRL, error %d\n", ret);
  257. return ret;
  258. }
  259. reg_val &= ~VMMC_AUTO_OFF;
  260. reg_val |= SW_FC;
  261. ret = twl_i2c_write_u8(TWL6030_MODULE_ID0, reg_val, TWL6030_MMCCTRL);
  262. if (ret < 0) {
  263. pr_err("twl6030: Failed to write MMCCTRL, error %d\n", ret);
  264. return ret;
  265. }
  266. /* Configuring PullUp-PullDown register */
  267. ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &reg_val,
  268. TWL6030_CFG_INPUT_PUPD3);
  269. if (ret < 0) {
  270. pr_err("twl6030: Failed to read CFG_INPUT_PUPD3, error %d\n",
  271. ret);
  272. return ret;
  273. }
  274. reg_val &= ~(MMC_PU | MMC_PD);
  275. ret = twl_i2c_write_u8(TWL6030_MODULE_ID0, reg_val,
  276. TWL6030_CFG_INPUT_PUPD3);
  277. if (ret < 0) {
  278. pr_err("twl6030: Failed to write CFG_INPUT_PUPD3, error %d\n",
  279. ret);
  280. return ret;
  281. }
  282. return twl6030_irq_base + MMCDETECT_INTR_OFFSET;
  283. }
  284. EXPORT_SYMBOL(twl6030_mmc_card_detect_config);
  285. int twl6030_mmc_card_detect(struct device *dev, int slot)
  286. {
  287. int ret = -EIO;
  288. u8 read_reg = 0;
  289. struct platform_device *pdev = to_platform_device(dev);
  290. if (pdev->id) {
  291. /* TWL6030 provide's Card detect support for
  292. * only MMC1 controller.
  293. */
  294. pr_err("Unknown MMC controller %d in %s\n", pdev->id, __func__);
  295. return ret;
  296. }
  297. /*
  298. * BIT0 of MMC_CTRL on TWL6030 provides card status for MMC1
  299. * 0 - Card not present ,1 - Card present
  300. */
  301. ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &read_reg,
  302. TWL6030_MMCCTRL);
  303. if (ret >= 0)
  304. ret = read_reg & STS_MMC;
  305. return ret;
  306. }
  307. EXPORT_SYMBOL(twl6030_mmc_card_detect);
  308. int twl6030_init_irq(int irq_num, unsigned irq_base, unsigned irq_end)
  309. {
  310. int status = 0;
  311. int i;
  312. struct task_struct *task;
  313. int ret;
  314. u8 mask[4];
  315. static struct irq_chip twl6030_irq_chip;
  316. mask[1] = 0xFF;
  317. mask[2] = 0xFF;
  318. mask[3] = 0xFF;
  319. ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0],
  320. REG_INT_MSK_LINE_A, 3); /* MASK ALL INT LINES */
  321. ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0],
  322. REG_INT_MSK_STS_A, 3); /* MASK ALL INT STS */
  323. ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0],
  324. REG_INT_STS_A, 3); /* clear INT_STS_A,B,C */
  325. twl6030_irq_base = irq_base;
  326. /* install an irq handler for each of the modules;
  327. * clone dummy irq_chip since PIH can't *do* anything
  328. */
  329. twl6030_irq_chip = dummy_irq_chip;
  330. twl6030_irq_chip.name = "twl6030";
  331. twl6030_irq_chip.irq_set_type = NULL;
  332. twl6030_irq_chip.irq_set_wake = twl6030_irq_set_wake;
  333. for (i = irq_base; i < irq_end; i++) {
  334. irq_set_chip_and_handler(i, &twl6030_irq_chip,
  335. handle_simple_irq);
  336. irq_set_chip_data(i, (void *)irq_num);
  337. activate_irq(i);
  338. }
  339. twl6030_irq_next = i;
  340. pr_info("twl6030: %s (irq %d) chaining IRQs %d..%d\n", "PIH",
  341. irq_num, irq_base, twl6030_irq_next - 1);
  342. /* install an irq handler to demultiplex the TWL6030 interrupt */
  343. init_completion(&irq_event);
  344. status = request_irq(irq_num, handle_twl6030_pih, 0,
  345. "TWL6030-PIH", &irq_event);
  346. if (status < 0) {
  347. pr_err("twl6030: could not claim irq%d: %d\n", irq_num, status);
  348. goto fail_irq;
  349. }
  350. task = kthread_run(twl6030_irq_thread, (void *)irq_num, "twl6030-irq");
  351. if (IS_ERR(task)) {
  352. pr_err("twl6030: could not create irq %d thread!\n", irq_num);
  353. status = PTR_ERR(task);
  354. goto fail_kthread;
  355. }
  356. twl_irq = irq_num;
  357. register_pm_notifier(&twl6030_irq_pm_notifier_block);
  358. return status;
  359. fail_kthread:
  360. free_irq(irq_num, &irq_event);
  361. fail_irq:
  362. for (i = irq_base; i < irq_end; i++)
  363. irq_set_chip_and_handler(i, NULL, NULL);
  364. return status;
  365. }
  366. int twl6030_exit_irq(void)
  367. {
  368. unregister_pm_notifier(&twl6030_irq_pm_notifier_block);
  369. if (twl6030_irq_base) {
  370. pr_err("twl6030: can't yet clean up IRQs?\n");
  371. return -ENOSYS;
  372. }
  373. return 0;
  374. }