devices.c 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689
  1. #include <linux/module.h>
  2. #include <linux/kernel.h>
  3. #include <linux/init.h>
  4. #include <linux/platform_device.h>
  5. #include <linux/dma-mapping.h>
  6. #include <asm/arch/gpio.h>
  7. #include <asm/arch/udc.h>
  8. #include <asm/arch/pxafb.h>
  9. #include <asm/arch/mmc.h>
  10. #include <asm/arch/irda.h>
  11. #include <asm/arch/i2c.h>
  12. #include <asm/arch/ohci.h>
  13. #include <asm/arch/pxa27x_keypad.h>
  14. #include "devices.h"
  15. void __init pxa_register_device(struct platform_device *dev, void *data)
  16. {
  17. int ret;
  18. dev->dev.platform_data = data;
  19. ret = platform_device_register(dev);
  20. if (ret)
  21. dev_err(&dev->dev, "unable to register device: %d\n", ret);
  22. }
  23. static struct resource pxamci_resources[] = {
  24. [0] = {
  25. .start = 0x41100000,
  26. .end = 0x41100fff,
  27. .flags = IORESOURCE_MEM,
  28. },
  29. [1] = {
  30. .start = IRQ_MMC,
  31. .end = IRQ_MMC,
  32. .flags = IORESOURCE_IRQ,
  33. },
  34. [2] = {
  35. .start = 21,
  36. .end = 21,
  37. .flags = IORESOURCE_DMA,
  38. },
  39. [3] = {
  40. .start = 22,
  41. .end = 22,
  42. .flags = IORESOURCE_DMA,
  43. },
  44. };
  45. static u64 pxamci_dmamask = 0xffffffffUL;
  46. struct platform_device pxa_device_mci = {
  47. .name = "pxa2xx-mci",
  48. .id = 0,
  49. .dev = {
  50. .dma_mask = &pxamci_dmamask,
  51. .coherent_dma_mask = 0xffffffff,
  52. },
  53. .num_resources = ARRAY_SIZE(pxamci_resources),
  54. .resource = pxamci_resources,
  55. };
  56. void __init pxa_set_mci_info(struct pxamci_platform_data *info)
  57. {
  58. pxa_register_device(&pxa_device_mci, info);
  59. }
  60. static struct pxa2xx_udc_mach_info pxa_udc_info;
  61. void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
  62. {
  63. memcpy(&pxa_udc_info, info, sizeof *info);
  64. }
  65. static struct resource pxa2xx_udc_resources[] = {
  66. [0] = {
  67. .start = 0x40600000,
  68. .end = 0x4060ffff,
  69. .flags = IORESOURCE_MEM,
  70. },
  71. [1] = {
  72. .start = IRQ_USB,
  73. .end = IRQ_USB,
  74. .flags = IORESOURCE_IRQ,
  75. },
  76. };
  77. static u64 udc_dma_mask = ~(u32)0;
  78. struct platform_device pxa_device_udc = {
  79. .name = "pxa2xx-udc",
  80. .id = -1,
  81. .resource = pxa2xx_udc_resources,
  82. .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
  83. .dev = {
  84. .platform_data = &pxa_udc_info,
  85. .dma_mask = &udc_dma_mask,
  86. }
  87. };
  88. static struct resource pxafb_resources[] = {
  89. [0] = {
  90. .start = 0x44000000,
  91. .end = 0x4400ffff,
  92. .flags = IORESOURCE_MEM,
  93. },
  94. [1] = {
  95. .start = IRQ_LCD,
  96. .end = IRQ_LCD,
  97. .flags = IORESOURCE_IRQ,
  98. },
  99. };
  100. static u64 fb_dma_mask = ~(u64)0;
  101. struct platform_device pxa_device_fb = {
  102. .name = "pxa2xx-fb",
  103. .id = -1,
  104. .dev = {
  105. .dma_mask = &fb_dma_mask,
  106. .coherent_dma_mask = 0xffffffff,
  107. },
  108. .num_resources = ARRAY_SIZE(pxafb_resources),
  109. .resource = pxafb_resources,
  110. };
  111. void __init set_pxa_fb_info(struct pxafb_mach_info *info)
  112. {
  113. pxa_register_device(&pxa_device_fb, info);
  114. }
  115. void __init set_pxa_fb_parent(struct device *parent_dev)
  116. {
  117. pxa_device_fb.dev.parent = parent_dev;
  118. }
  119. static struct resource pxa_resource_ffuart[] = {
  120. {
  121. .start = __PREG(FFUART),
  122. .end = __PREG(FFUART) + 35,
  123. .flags = IORESOURCE_MEM,
  124. }, {
  125. .start = IRQ_FFUART,
  126. .end = IRQ_FFUART,
  127. .flags = IORESOURCE_IRQ,
  128. }
  129. };
  130. struct platform_device pxa_device_ffuart= {
  131. .name = "pxa2xx-uart",
  132. .id = 0,
  133. .resource = pxa_resource_ffuart,
  134. .num_resources = ARRAY_SIZE(pxa_resource_ffuart),
  135. };
  136. static struct resource pxa_resource_btuart[] = {
  137. {
  138. .start = __PREG(BTUART),
  139. .end = __PREG(BTUART) + 35,
  140. .flags = IORESOURCE_MEM,
  141. }, {
  142. .start = IRQ_BTUART,
  143. .end = IRQ_BTUART,
  144. .flags = IORESOURCE_IRQ,
  145. }
  146. };
  147. struct platform_device pxa_device_btuart = {
  148. .name = "pxa2xx-uart",
  149. .id = 1,
  150. .resource = pxa_resource_btuart,
  151. .num_resources = ARRAY_SIZE(pxa_resource_btuart),
  152. };
  153. static struct resource pxa_resource_stuart[] = {
  154. {
  155. .start = __PREG(STUART),
  156. .end = __PREG(STUART) + 35,
  157. .flags = IORESOURCE_MEM,
  158. }, {
  159. .start = IRQ_STUART,
  160. .end = IRQ_STUART,
  161. .flags = IORESOURCE_IRQ,
  162. }
  163. };
  164. struct platform_device pxa_device_stuart = {
  165. .name = "pxa2xx-uart",
  166. .id = 2,
  167. .resource = pxa_resource_stuart,
  168. .num_resources = ARRAY_SIZE(pxa_resource_stuart),
  169. };
  170. static struct resource pxa_resource_hwuart[] = {
  171. {
  172. .start = __PREG(HWUART),
  173. .end = __PREG(HWUART) + 47,
  174. .flags = IORESOURCE_MEM,
  175. }, {
  176. .start = IRQ_HWUART,
  177. .end = IRQ_HWUART,
  178. .flags = IORESOURCE_IRQ,
  179. }
  180. };
  181. struct platform_device pxa_device_hwuart = {
  182. .name = "pxa2xx-uart",
  183. .id = 3,
  184. .resource = pxa_resource_hwuart,
  185. .num_resources = ARRAY_SIZE(pxa_resource_hwuart),
  186. };
  187. static struct resource pxai2c_resources[] = {
  188. {
  189. .start = 0x40301680,
  190. .end = 0x403016a3,
  191. .flags = IORESOURCE_MEM,
  192. }, {
  193. .start = IRQ_I2C,
  194. .end = IRQ_I2C,
  195. .flags = IORESOURCE_IRQ,
  196. },
  197. };
  198. struct platform_device pxa_device_i2c = {
  199. .name = "pxa2xx-i2c",
  200. .id = 0,
  201. .resource = pxai2c_resources,
  202. .num_resources = ARRAY_SIZE(pxai2c_resources),
  203. };
  204. void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
  205. {
  206. pxa_register_device(&pxa_device_i2c, info);
  207. }
  208. static struct resource pxai2s_resources[] = {
  209. {
  210. .start = 0x40400000,
  211. .end = 0x40400083,
  212. .flags = IORESOURCE_MEM,
  213. }, {
  214. .start = IRQ_I2S,
  215. .end = IRQ_I2S,
  216. .flags = IORESOURCE_IRQ,
  217. },
  218. };
  219. struct platform_device pxa_device_i2s = {
  220. .name = "pxa2xx-i2s",
  221. .id = -1,
  222. .resource = pxai2s_resources,
  223. .num_resources = ARRAY_SIZE(pxai2s_resources),
  224. };
  225. static u64 pxaficp_dmamask = ~(u32)0;
  226. struct platform_device pxa_device_ficp = {
  227. .name = "pxa2xx-ir",
  228. .id = -1,
  229. .dev = {
  230. .dma_mask = &pxaficp_dmamask,
  231. .coherent_dma_mask = 0xffffffff,
  232. },
  233. };
  234. void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
  235. {
  236. pxa_register_device(&pxa_device_ficp, info);
  237. }
  238. struct platform_device pxa_device_rtc = {
  239. .name = "sa1100-rtc",
  240. .id = -1,
  241. };
  242. #ifdef CONFIG_PXA25x
  243. static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
  244. static struct resource pxa25x_resource_ssp[] = {
  245. [0] = {
  246. .start = 0x41000000,
  247. .end = 0x4100001f,
  248. .flags = IORESOURCE_MEM,
  249. },
  250. [1] = {
  251. .start = IRQ_SSP,
  252. .end = IRQ_SSP,
  253. .flags = IORESOURCE_IRQ,
  254. },
  255. [2] = {
  256. /* DRCMR for RX */
  257. .start = 13,
  258. .end = 13,
  259. .flags = IORESOURCE_DMA,
  260. },
  261. [3] = {
  262. /* DRCMR for TX */
  263. .start = 14,
  264. .end = 14,
  265. .flags = IORESOURCE_DMA,
  266. },
  267. };
  268. struct platform_device pxa25x_device_ssp = {
  269. .name = "pxa25x-ssp",
  270. .id = 0,
  271. .dev = {
  272. .dma_mask = &pxa25x_ssp_dma_mask,
  273. .coherent_dma_mask = DMA_BIT_MASK(32),
  274. },
  275. .resource = pxa25x_resource_ssp,
  276. .num_resources = ARRAY_SIZE(pxa25x_resource_ssp),
  277. };
  278. static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
  279. static struct resource pxa25x_resource_nssp[] = {
  280. [0] = {
  281. .start = 0x41400000,
  282. .end = 0x4140002f,
  283. .flags = IORESOURCE_MEM,
  284. },
  285. [1] = {
  286. .start = IRQ_NSSP,
  287. .end = IRQ_NSSP,
  288. .flags = IORESOURCE_IRQ,
  289. },
  290. [2] = {
  291. /* DRCMR for RX */
  292. .start = 15,
  293. .end = 15,
  294. .flags = IORESOURCE_DMA,
  295. },
  296. [3] = {
  297. /* DRCMR for TX */
  298. .start = 16,
  299. .end = 16,
  300. .flags = IORESOURCE_DMA,
  301. },
  302. };
  303. struct platform_device pxa25x_device_nssp = {
  304. .name = "pxa25x-nssp",
  305. .id = 1,
  306. .dev = {
  307. .dma_mask = &pxa25x_nssp_dma_mask,
  308. .coherent_dma_mask = DMA_BIT_MASK(32),
  309. },
  310. .resource = pxa25x_resource_nssp,
  311. .num_resources = ARRAY_SIZE(pxa25x_resource_nssp),
  312. };
  313. static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
  314. static struct resource pxa25x_resource_assp[] = {
  315. [0] = {
  316. .start = 0x41500000,
  317. .end = 0x4150002f,
  318. .flags = IORESOURCE_MEM,
  319. },
  320. [1] = {
  321. .start = IRQ_ASSP,
  322. .end = IRQ_ASSP,
  323. .flags = IORESOURCE_IRQ,
  324. },
  325. [2] = {
  326. /* DRCMR for RX */
  327. .start = 23,
  328. .end = 23,
  329. .flags = IORESOURCE_DMA,
  330. },
  331. [3] = {
  332. /* DRCMR for TX */
  333. .start = 24,
  334. .end = 24,
  335. .flags = IORESOURCE_DMA,
  336. },
  337. };
  338. struct platform_device pxa25x_device_assp = {
  339. /* ASSP is basically equivalent to NSSP */
  340. .name = "pxa25x-nssp",
  341. .id = 2,
  342. .dev = {
  343. .dma_mask = &pxa25x_assp_dma_mask,
  344. .coherent_dma_mask = DMA_BIT_MASK(32),
  345. },
  346. .resource = pxa25x_resource_assp,
  347. .num_resources = ARRAY_SIZE(pxa25x_resource_assp),
  348. };
  349. #endif /* CONFIG_PXA25x */
  350. #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
  351. static struct resource pxa27x_resource_keypad[] = {
  352. [0] = {
  353. .start = 0x41500000,
  354. .end = 0x4150004c,
  355. .flags = IORESOURCE_MEM,
  356. },
  357. [1] = {
  358. .start = IRQ_KEYPAD,
  359. .end = IRQ_KEYPAD,
  360. .flags = IORESOURCE_IRQ,
  361. },
  362. };
  363. struct platform_device pxa27x_device_keypad = {
  364. .name = "pxa27x-keypad",
  365. .id = -1,
  366. .resource = pxa27x_resource_keypad,
  367. .num_resources = ARRAY_SIZE(pxa27x_resource_keypad),
  368. };
  369. void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
  370. {
  371. pxa_register_device(&pxa27x_device_keypad, info);
  372. }
  373. static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
  374. static struct resource pxa27x_resource_ohci[] = {
  375. [0] = {
  376. .start = 0x4C000000,
  377. .end = 0x4C00ff6f,
  378. .flags = IORESOURCE_MEM,
  379. },
  380. [1] = {
  381. .start = IRQ_USBH1,
  382. .end = IRQ_USBH1,
  383. .flags = IORESOURCE_IRQ,
  384. },
  385. };
  386. struct platform_device pxa27x_device_ohci = {
  387. .name = "pxa27x-ohci",
  388. .id = -1,
  389. .dev = {
  390. .dma_mask = &pxa27x_ohci_dma_mask,
  391. .coherent_dma_mask = DMA_BIT_MASK(32),
  392. },
  393. .num_resources = ARRAY_SIZE(pxa27x_resource_ohci),
  394. .resource = pxa27x_resource_ohci,
  395. };
  396. void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
  397. {
  398. pxa_register_device(&pxa27x_device_ohci, info);
  399. }
  400. static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
  401. static struct resource pxa27x_resource_ssp1[] = {
  402. [0] = {
  403. .start = 0x41000000,
  404. .end = 0x4100003f,
  405. .flags = IORESOURCE_MEM,
  406. },
  407. [1] = {
  408. .start = IRQ_SSP,
  409. .end = IRQ_SSP,
  410. .flags = IORESOURCE_IRQ,
  411. },
  412. [2] = {
  413. /* DRCMR for RX */
  414. .start = 13,
  415. .end = 13,
  416. .flags = IORESOURCE_DMA,
  417. },
  418. [3] = {
  419. /* DRCMR for TX */
  420. .start = 14,
  421. .end = 14,
  422. .flags = IORESOURCE_DMA,
  423. },
  424. };
  425. struct platform_device pxa27x_device_ssp1 = {
  426. .name = "pxa27x-ssp",
  427. .id = 0,
  428. .dev = {
  429. .dma_mask = &pxa27x_ssp1_dma_mask,
  430. .coherent_dma_mask = DMA_BIT_MASK(32),
  431. },
  432. .resource = pxa27x_resource_ssp1,
  433. .num_resources = ARRAY_SIZE(pxa27x_resource_ssp1),
  434. };
  435. static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
  436. static struct resource pxa27x_resource_ssp2[] = {
  437. [0] = {
  438. .start = 0x41700000,
  439. .end = 0x4170003f,
  440. .flags = IORESOURCE_MEM,
  441. },
  442. [1] = {
  443. .start = IRQ_SSP2,
  444. .end = IRQ_SSP2,
  445. .flags = IORESOURCE_IRQ,
  446. },
  447. [2] = {
  448. /* DRCMR for RX */
  449. .start = 15,
  450. .end = 15,
  451. .flags = IORESOURCE_DMA,
  452. },
  453. [3] = {
  454. /* DRCMR for TX */
  455. .start = 16,
  456. .end = 16,
  457. .flags = IORESOURCE_DMA,
  458. },
  459. };
  460. struct platform_device pxa27x_device_ssp2 = {
  461. .name = "pxa27x-ssp",
  462. .id = 1,
  463. .dev = {
  464. .dma_mask = &pxa27x_ssp2_dma_mask,
  465. .coherent_dma_mask = DMA_BIT_MASK(32),
  466. },
  467. .resource = pxa27x_resource_ssp2,
  468. .num_resources = ARRAY_SIZE(pxa27x_resource_ssp2),
  469. };
  470. static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
  471. static struct resource pxa27x_resource_ssp3[] = {
  472. [0] = {
  473. .start = 0x41900000,
  474. .end = 0x4190003f,
  475. .flags = IORESOURCE_MEM,
  476. },
  477. [1] = {
  478. .start = IRQ_SSP3,
  479. .end = IRQ_SSP3,
  480. .flags = IORESOURCE_IRQ,
  481. },
  482. [2] = {
  483. /* DRCMR for RX */
  484. .start = 66,
  485. .end = 66,
  486. .flags = IORESOURCE_DMA,
  487. },
  488. [3] = {
  489. /* DRCMR for TX */
  490. .start = 67,
  491. .end = 67,
  492. .flags = IORESOURCE_DMA,
  493. },
  494. };
  495. struct platform_device pxa27x_device_ssp3 = {
  496. .name = "pxa27x-ssp",
  497. .id = 2,
  498. .dev = {
  499. .dma_mask = &pxa27x_ssp3_dma_mask,
  500. .coherent_dma_mask = DMA_BIT_MASK(32),
  501. },
  502. .resource = pxa27x_resource_ssp3,
  503. .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3),
  504. };
  505. #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
  506. #ifdef CONFIG_PXA3xx
  507. static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
  508. static struct resource pxa3xx_resource_ssp4[] = {
  509. [0] = {
  510. .start = 0x41a00000,
  511. .end = 0x41a0003f,
  512. .flags = IORESOURCE_MEM,
  513. },
  514. [1] = {
  515. .start = IRQ_SSP4,
  516. .end = IRQ_SSP4,
  517. .flags = IORESOURCE_IRQ,
  518. },
  519. [2] = {
  520. /* DRCMR for RX */
  521. .start = 2,
  522. .end = 2,
  523. .flags = IORESOURCE_DMA,
  524. },
  525. [3] = {
  526. /* DRCMR for TX */
  527. .start = 3,
  528. .end = 3,
  529. .flags = IORESOURCE_DMA,
  530. },
  531. };
  532. struct platform_device pxa3xx_device_ssp4 = {
  533. /* PXA3xx SSP is basically equivalent to PXA27x */
  534. .name = "pxa27x-ssp",
  535. .id = 3,
  536. .dev = {
  537. .dma_mask = &pxa3xx_ssp4_dma_mask,
  538. .coherent_dma_mask = DMA_BIT_MASK(32),
  539. },
  540. .resource = pxa3xx_resource_ssp4,
  541. .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4),
  542. };
  543. static struct resource pxa3xx_resources_mci2[] = {
  544. [0] = {
  545. .start = 0x42000000,
  546. .end = 0x42000fff,
  547. .flags = IORESOURCE_MEM,
  548. },
  549. [1] = {
  550. .start = IRQ_MMC2,
  551. .end = IRQ_MMC2,
  552. .flags = IORESOURCE_IRQ,
  553. },
  554. [2] = {
  555. .start = 93,
  556. .end = 93,
  557. .flags = IORESOURCE_DMA,
  558. },
  559. [3] = {
  560. .start = 94,
  561. .end = 94,
  562. .flags = IORESOURCE_DMA,
  563. },
  564. };
  565. struct platform_device pxa3xx_device_mci2 = {
  566. .name = "pxa2xx-mci",
  567. .id = 1,
  568. .dev = {
  569. .dma_mask = &pxamci_dmamask,
  570. .coherent_dma_mask = 0xffffffff,
  571. },
  572. .num_resources = ARRAY_SIZE(pxa3xx_resources_mci2),
  573. .resource = pxa3xx_resources_mci2,
  574. };
  575. void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
  576. {
  577. pxa_register_device(&pxa3xx_device_mci2, info);
  578. }
  579. static struct resource pxa3xx_resources_mci3[] = {
  580. [0] = {
  581. .start = 0x42500000,
  582. .end = 0x42500fff,
  583. .flags = IORESOURCE_MEM,
  584. },
  585. [1] = {
  586. .start = IRQ_MMC3,
  587. .end = IRQ_MMC3,
  588. .flags = IORESOURCE_IRQ,
  589. },
  590. [2] = {
  591. .start = 100,
  592. .end = 100,
  593. .flags = IORESOURCE_DMA,
  594. },
  595. [3] = {
  596. .start = 101,
  597. .end = 101,
  598. .flags = IORESOURCE_DMA,
  599. },
  600. };
  601. struct platform_device pxa3xx_device_mci3 = {
  602. .name = "pxa2xx-mci",
  603. .id = 2,
  604. .dev = {
  605. .dma_mask = &pxamci_dmamask,
  606. .coherent_dma_mask = 0xffffffff,
  607. },
  608. .num_resources = ARRAY_SIZE(pxa3xx_resources_mci3),
  609. .resource = pxa3xx_resources_mci3,
  610. };
  611. void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
  612. {
  613. pxa_register_device(&pxa3xx_device_mci3, info);
  614. }
  615. #endif /* CONFIG_PXA3xx */