pinctrl.h 4.6 KB

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  1. /*
  2. * Interface the pinctrl subsystem
  3. *
  4. * Copyright (C) 2011 ST-Ericsson SA
  5. * Written on behalf of Linaro for ST-Ericsson
  6. * This interface is used in the core to keep track of pins.
  7. *
  8. * Author: Linus Walleij <linus.walleij@linaro.org>
  9. *
  10. * License terms: GNU General Public License (GPL) version 2
  11. */
  12. #ifndef __LINUX_PINCTRL_PINCTRL_H
  13. #define __LINUX_PINCTRL_PINCTRL_H
  14. #ifdef CONFIG_PINCTRL
  15. #include <linux/radix-tree.h>
  16. #include <linux/list.h>
  17. #include <linux/seq_file.h>
  18. #include "pinctrl-state.h"
  19. struct device;
  20. struct pinctrl_dev;
  21. struct pinctrl_map;
  22. struct pinmux_ops;
  23. struct pinconf_ops;
  24. struct gpio_chip;
  25. struct device_node;
  26. /**
  27. * struct pinctrl_pin_desc - boards/machines provide information on their
  28. * pins, pads or other muxable units in this struct
  29. * @number: unique pin number from the global pin number space
  30. * @name: a name for this pin
  31. */
  32. struct pinctrl_pin_desc {
  33. unsigned number;
  34. const char *name;
  35. };
  36. /* Convenience macro to define a single named or anonymous pin descriptor */
  37. #define PINCTRL_PIN(a, b) { .number = a, .name = b }
  38. #define PINCTRL_PIN_ANON(a) { .number = a }
  39. /**
  40. * struct pinctrl_gpio_range - each pin controller can provide subranges of
  41. * the GPIO number space to be handled by the controller
  42. * @node: list node for internal use
  43. * @name: a name for the chip in this range
  44. * @id: an ID number for the chip in this range
  45. * @base: base offset of the GPIO range
  46. * @pin_base: base pin number of the GPIO range
  47. * @npins: number of pins in the GPIO range, including the base number
  48. * @gc: an optional pointer to a gpio_chip
  49. */
  50. struct pinctrl_gpio_range {
  51. struct list_head node;
  52. const char *name;
  53. unsigned int id;
  54. unsigned int base;
  55. unsigned int pin_base;
  56. unsigned int npins;
  57. struct gpio_chip *gc;
  58. };
  59. /**
  60. * struct pinctrl_ops - global pin control operations, to be implemented by
  61. * pin controller drivers.
  62. * @get_groups_count: Returns the count of total number of groups registered.
  63. * @get_group_name: return the group name of the pin group
  64. * @get_group_pins: return an array of pins corresponding to a certain
  65. * group selector @pins, and the size of the array in @num_pins
  66. * @pin_dbg_show: optional debugfs display hook that will provide per-device
  67. * info for a certain pin in debugfs
  68. */
  69. struct pinctrl_ops {
  70. int (*get_groups_count) (struct pinctrl_dev *pctldev);
  71. const char *(*get_group_name) (struct pinctrl_dev *pctldev,
  72. unsigned selector);
  73. int (*get_group_pins) (struct pinctrl_dev *pctldev,
  74. unsigned selector,
  75. const unsigned **pins,
  76. unsigned *num_pins);
  77. void (*pin_dbg_show) (struct pinctrl_dev *pctldev, struct seq_file *s,
  78. unsigned offset);
  79. int (*dt_node_to_map) (struct pinctrl_dev *pctldev,
  80. struct device_node *np_config,
  81. struct pinctrl_map **map, unsigned *num_maps);
  82. void (*dt_free_map) (struct pinctrl_dev *pctldev,
  83. struct pinctrl_map *map, unsigned num_maps);
  84. };
  85. /**
  86. * struct pinctrl_desc - pin controller descriptor, register this to pin
  87. * control subsystem
  88. * @name: name for the pin controller
  89. * @pins: an array of pin descriptors describing all the pins handled by
  90. * this pin controller
  91. * @npins: number of descriptors in the array, usually just ARRAY_SIZE()
  92. * of the pins field above
  93. * @pctlops: pin control operation vtable, to support global concepts like
  94. * grouping of pins, this is optional.
  95. * @pmxops: pinmux operations vtable, if you support pinmuxing in your driver
  96. * @confops: pin config operations vtable, if you support pin configuration in
  97. * your driver
  98. * @owner: module providing the pin controller, used for refcounting
  99. */
  100. struct pinctrl_desc {
  101. const char *name;
  102. struct pinctrl_pin_desc const *pins;
  103. unsigned int npins;
  104. struct pinctrl_ops *pctlops;
  105. struct pinmux_ops *pmxops;
  106. struct pinconf_ops *confops;
  107. struct module *owner;
  108. };
  109. /* External interface to pin controller */
  110. extern struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc,
  111. struct device *dev, void *driver_data);
  112. extern void pinctrl_unregister(struct pinctrl_dev *pctldev);
  113. extern bool pin_is_valid(struct pinctrl_dev *pctldev, int pin);
  114. extern void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev,
  115. struct pinctrl_gpio_range *range);
  116. extern void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev,
  117. struct pinctrl_gpio_range *range);
  118. extern const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev);
  119. extern void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev);
  120. #else
  121. struct pinctrl_dev;
  122. /* Sufficiently stupid default functions when pinctrl is not in use */
  123. static inline bool pin_is_valid(struct pinctrl_dev *pctldev, int pin)
  124. {
  125. return pin >= 0;
  126. }
  127. #endif /* !CONFIG_PINCTRL */
  128. #endif /* __LINUX_PINCTRL_PINCTRL_H */