gpio.c 19 KB

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  1. /*
  2. *
  3. * arch/arm/mach-u300/gpio.c
  4. *
  5. *
  6. * Copyright (C) 2007-2009 ST-Ericsson AB
  7. * License terms: GNU General Public License (GPL) version 2
  8. * U300 GPIO module.
  9. * This can driver either of the two basic GPIO cores
  10. * available in the U300 platforms:
  11. * COH 901 335 - Used in DB3150 (U300 1.0) and DB3200 (U330 1.0)
  12. * COH 901 571/3 - Used in DB3210 (U365 2.0) and DB3350 (U335 1.0)
  13. * Notice that you also have inline macros in <asm-arch/gpio.h>
  14. * Author: Linus Walleij <linus.walleij@stericsson.com>
  15. * Author: Jonas Aaberg <jonas.aberg@stericsson.com>
  16. *
  17. */
  18. #include <linux/module.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/delay.h>
  21. #include <linux/errno.h>
  22. #include <linux/io.h>
  23. #include <linux/clk.h>
  24. #include <linux/err.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/gpio.h>
  27. /* Need access to SYSCON registers for PADmuxing */
  28. #include <mach/syscon.h>
  29. #include "padmux.h"
  30. /* Reference to GPIO block clock */
  31. static struct clk *clk;
  32. /* Memory resource */
  33. static struct resource *memres;
  34. static void __iomem *virtbase;
  35. struct u300_gpio_port {
  36. const char *name;
  37. int irq;
  38. int number;
  39. };
  40. static struct u300_gpio_port gpio_ports[] = {
  41. {
  42. .name = "gpio0",
  43. .number = 0,
  44. },
  45. {
  46. .name = "gpio1",
  47. .number = 1,
  48. },
  49. {
  50. .name = "gpio2",
  51. .number = 2,
  52. },
  53. #ifdef U300_COH901571_3
  54. {
  55. .name = "gpio3",
  56. .number = 3,
  57. },
  58. {
  59. .name = "gpio4",
  60. .number = 4,
  61. },
  62. #ifdef CONFIG_MACH_U300_BS335
  63. {
  64. .name = "gpio5",
  65. .number = 5,
  66. },
  67. {
  68. .name = "gpio6",
  69. .number = 6,
  70. },
  71. #endif
  72. #endif
  73. };
  74. #ifdef U300_COH901571_3
  75. /* Default input value */
  76. #define DEFAULT_OUTPUT_LOW 0
  77. #define DEFAULT_OUTPUT_HIGH 1
  78. /* GPIO Pull-Up status */
  79. #define DISABLE_PULL_UP 0
  80. #define ENABLE_PULL_UP 1
  81. #define GPIO_NOT_USED 0
  82. #define GPIO_IN 1
  83. #define GPIO_OUT 2
  84. struct u300_gpio_configuration_data {
  85. unsigned char pin_usage;
  86. unsigned char default_output_value;
  87. unsigned char pull_up;
  88. };
  89. /* Initial configuration */
  90. const struct u300_gpio_configuration_data
  91. u300_gpio_config[U300_GPIO_NUM_PORTS][U300_GPIO_PINS_PER_PORT] = {
  92. #ifdef CONFIG_MACH_U300_BS335
  93. /* Port 0, pins 0-7 */
  94. {
  95. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  96. {GPIO_OUT, DEFAULT_OUTPUT_HIGH, DISABLE_PULL_UP},
  97. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  98. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  99. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  100. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  101. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  102. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP}
  103. },
  104. /* Port 1, pins 0-7 */
  105. {
  106. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  107. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  108. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  109. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  110. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  111. {GPIO_OUT, DEFAULT_OUTPUT_HIGH, DISABLE_PULL_UP},
  112. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  113. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP}
  114. },
  115. /* Port 2, pins 0-7 */
  116. {
  117. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  118. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  119. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  120. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  121. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  122. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  123. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  124. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP}
  125. },
  126. /* Port 3, pins 0-7 */
  127. {
  128. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  129. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  130. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  131. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  132. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  133. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  134. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  135. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP}
  136. },
  137. /* Port 4, pins 0-7 */
  138. {
  139. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  140. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  141. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  142. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  143. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  144. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  145. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  146. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP}
  147. },
  148. /* Port 5, pins 0-7 */
  149. {
  150. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  151. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  152. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  153. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  154. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  155. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  156. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  157. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP}
  158. },
  159. /* Port 6, pind 0-7 */
  160. {
  161. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  162. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  163. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  164. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  165. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  166. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  167. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  168. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP}
  169. }
  170. #endif
  171. #ifdef CONFIG_MACH_U300_BS365
  172. /* Port 0, pins 0-7 */
  173. {
  174. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  175. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  176. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  177. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  178. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  179. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  180. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  181. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP}
  182. },
  183. /* Port 1, pins 0-7 */
  184. {
  185. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  186. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  187. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  188. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  189. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  190. {GPIO_OUT, DEFAULT_OUTPUT_HIGH, DISABLE_PULL_UP},
  191. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  192. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP}
  193. },
  194. /* Port 2, pins 0-7 */
  195. {
  196. {GPIO_IN, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  197. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  198. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  199. {GPIO_OUT, DEFAULT_OUTPUT_LOW, DISABLE_PULL_UP},
  200. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  201. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  202. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  203. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP}
  204. },
  205. /* Port 3, pins 0-7 */
  206. {
  207. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  208. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  209. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  210. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  211. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  212. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  213. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  214. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP}
  215. },
  216. /* Port 4, pins 0-7 */
  217. {
  218. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  219. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  220. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  221. {GPIO_IN, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  222. /* These 4 pins doesn't exist on DB3210 */
  223. {GPIO_OUT, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  224. {GPIO_OUT, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  225. {GPIO_OUT, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP},
  226. {GPIO_OUT, DEFAULT_OUTPUT_LOW, ENABLE_PULL_UP}
  227. }
  228. #endif
  229. };
  230. #endif
  231. /* No users == we can power down GPIO */
  232. static int gpio_users;
  233. struct gpio_struct {
  234. int (*callback)(void *);
  235. void *data;
  236. int users;
  237. };
  238. static struct gpio_struct gpio_pin[U300_GPIO_MAX];
  239. /*
  240. * Let drivers register callback in order to get notified when there is
  241. * an interrupt on the gpio pin
  242. */
  243. int gpio_register_callback(unsigned gpio, int (*func)(void *arg), void *data)
  244. {
  245. if (gpio_pin[gpio].callback)
  246. printk(KERN_WARNING "GPIO: %s: WARNING: callback already " \
  247. "registered for gpio pin#%d\n", __func__, gpio);
  248. gpio_pin[gpio].callback = func;
  249. gpio_pin[gpio].data = data;
  250. return 0;
  251. }
  252. EXPORT_SYMBOL(gpio_register_callback);
  253. int gpio_unregister_callback(unsigned gpio)
  254. {
  255. if (!gpio_pin[gpio].callback)
  256. printk(KERN_WARNING "GPIO: %s: WARNING: callback already " \
  257. "unregistered for gpio pin#%d\n", __func__, gpio);
  258. gpio_pin[gpio].callback = NULL;
  259. gpio_pin[gpio].data = NULL;
  260. return 0;
  261. }
  262. EXPORT_SYMBOL(gpio_unregister_callback);
  263. int gpio_request(unsigned gpio, const char *label)
  264. {
  265. if (gpio_pin[gpio].users)
  266. return -EINVAL;
  267. else
  268. gpio_pin[gpio].users++;
  269. gpio_users++;
  270. return 0;
  271. }
  272. EXPORT_SYMBOL(gpio_request);
  273. void gpio_free(unsigned gpio)
  274. {
  275. gpio_users--;
  276. gpio_pin[gpio].users--;
  277. if (unlikely(gpio_pin[gpio].users < 0)) {
  278. printk(KERN_WARNING "GPIO: Warning: gpio#%d release mismatch\n",
  279. gpio);
  280. gpio_pin[gpio].users = 0;
  281. }
  282. return;
  283. }
  284. EXPORT_SYMBOL(gpio_free);
  285. /* This returns zero or nonzero */
  286. int gpio_get_value(unsigned gpio)
  287. {
  288. return readl(virtbase + U300_GPIO_PXPDIR +
  289. PIN_TO_PORT(gpio) * U300_GPIO_PORTX_SPACING) & (1 << (gpio & 0x07));
  290. }
  291. EXPORT_SYMBOL(gpio_get_value);
  292. /*
  293. * We hope that the compiler will optimize away the unused branch
  294. * in case "value" is a constant
  295. */
  296. void gpio_set_value(unsigned gpio, int value)
  297. {
  298. u32 val;
  299. unsigned long flags;
  300. local_irq_save(flags);
  301. if (value) {
  302. /* set */
  303. val = readl(virtbase + U300_GPIO_PXPDOR +
  304. PIN_TO_PORT(gpio) * U300_GPIO_PORTX_SPACING)
  305. & (1 << (gpio & 0x07));
  306. writel(val | (1 << (gpio & 0x07)), virtbase +
  307. U300_GPIO_PXPDOR +
  308. PIN_TO_PORT(gpio) * U300_GPIO_PORTX_SPACING);
  309. } else {
  310. /* clear */
  311. val = readl(virtbase + U300_GPIO_PXPDOR +
  312. PIN_TO_PORT(gpio) * U300_GPIO_PORTX_SPACING)
  313. & (1 << (gpio & 0x07));
  314. writel(val & ~(1 << (gpio & 0x07)), virtbase +
  315. U300_GPIO_PXPDOR +
  316. PIN_TO_PORT(gpio) * U300_GPIO_PORTX_SPACING);
  317. }
  318. local_irq_restore(flags);
  319. }
  320. EXPORT_SYMBOL(gpio_set_value);
  321. int gpio_direction_input(unsigned gpio)
  322. {
  323. unsigned long flags;
  324. u32 val;
  325. if (gpio > U300_GPIO_MAX)
  326. return -EINVAL;
  327. local_irq_save(flags);
  328. val = readl(virtbase + U300_GPIO_PXPCR + PIN_TO_PORT(gpio) *
  329. U300_GPIO_PORTX_SPACING);
  330. /* Mask out this pin*/
  331. val &= ~(U300_GPIO_PXPCR_PIN_MODE_MASK << ((gpio & 0x07) << 1));
  332. /* This is not needed since it sets the bits to zero.*/
  333. /* val |= (U300_GPIO_PXPCR_PIN_MODE_INPUT << (gpio*2)); */
  334. writel(val, virtbase + U300_GPIO_PXPCR + PIN_TO_PORT(gpio) *
  335. U300_GPIO_PORTX_SPACING);
  336. local_irq_restore(flags);
  337. return 0;
  338. }
  339. EXPORT_SYMBOL(gpio_direction_input);
  340. int gpio_direction_output(unsigned gpio, int value)
  341. {
  342. unsigned long flags;
  343. u32 val;
  344. if (gpio > U300_GPIO_MAX)
  345. return -EINVAL;
  346. local_irq_save(flags);
  347. val = readl(virtbase + U300_GPIO_PXPCR + PIN_TO_PORT(gpio) *
  348. U300_GPIO_PORTX_SPACING);
  349. /* Mask out this pin */
  350. val &= ~(U300_GPIO_PXPCR_PIN_MODE_MASK << ((gpio & 0x07) << 1));
  351. /*
  352. * FIXME: configure for push/pull, open drain or open source per pin
  353. * in setup. The current driver will only support push/pull.
  354. */
  355. val |= (U300_GPIO_PXPCR_PIN_MODE_OUTPUT_PUSH_PULL
  356. << ((gpio & 0x07) << 1));
  357. writel(val, virtbase + U300_GPIO_PXPCR + PIN_TO_PORT(gpio) *
  358. U300_GPIO_PORTX_SPACING);
  359. gpio_set_value(gpio, value);
  360. local_irq_restore(flags);
  361. return 0;
  362. }
  363. EXPORT_SYMBOL(gpio_direction_output);
  364. /*
  365. * Enable an IRQ, edge is rising edge (!= 0) or falling edge (==0).
  366. */
  367. void enable_irq_on_gpio_pin(unsigned gpio, int edge)
  368. {
  369. u32 val;
  370. unsigned long flags;
  371. local_irq_save(flags);
  372. val = readl(virtbase + U300_GPIO_PXIEN + PIN_TO_PORT(gpio) *
  373. U300_GPIO_PORTX_SPACING);
  374. val |= (1 << (gpio & 0x07));
  375. writel(val, virtbase + U300_GPIO_PXIEN + PIN_TO_PORT(gpio) *
  376. U300_GPIO_PORTX_SPACING);
  377. val = readl(virtbase + U300_GPIO_PXICR + PIN_TO_PORT(gpio) *
  378. U300_GPIO_PORTX_SPACING);
  379. if (edge)
  380. val |= (1 << (gpio & 0x07));
  381. else
  382. val &= ~(1 << (gpio & 0x07));
  383. writel(val, virtbase + U300_GPIO_PXICR + PIN_TO_PORT(gpio) *
  384. U300_GPIO_PORTX_SPACING);
  385. local_irq_restore(flags);
  386. }
  387. EXPORT_SYMBOL(enable_irq_on_gpio_pin);
  388. void disable_irq_on_gpio_pin(unsigned gpio)
  389. {
  390. u32 val;
  391. unsigned long flags;
  392. local_irq_save(flags);
  393. val = readl(virtbase + U300_GPIO_PXIEN + PIN_TO_PORT(gpio) *
  394. U300_GPIO_PORTX_SPACING);
  395. val &= ~(1 << (gpio & 0x07));
  396. writel(val, virtbase + U300_GPIO_PXIEN + PIN_TO_PORT(gpio) *
  397. U300_GPIO_PORTX_SPACING);
  398. local_irq_restore(flags);
  399. }
  400. EXPORT_SYMBOL(disable_irq_on_gpio_pin);
  401. /* Enable (value == 0) or disable (value == 1) internal pullup */
  402. void gpio_pullup(unsigned gpio, int value)
  403. {
  404. u32 val;
  405. unsigned long flags;
  406. local_irq_save(flags);
  407. if (value) {
  408. val = readl(virtbase + U300_GPIO_PXPER + PIN_TO_PORT(gpio) *
  409. U300_GPIO_PORTX_SPACING);
  410. writel(val | (1 << (gpio & 0x07)), virtbase + U300_GPIO_PXPER +
  411. PIN_TO_PORT(gpio) * U300_GPIO_PORTX_SPACING);
  412. } else {
  413. val = readl(virtbase + U300_GPIO_PXPER + PIN_TO_PORT(gpio) *
  414. U300_GPIO_PORTX_SPACING);
  415. writel(val & ~(1 << (gpio & 0x07)), virtbase + U300_GPIO_PXPER +
  416. PIN_TO_PORT(gpio) * U300_GPIO_PORTX_SPACING);
  417. }
  418. local_irq_restore(flags);
  419. }
  420. EXPORT_SYMBOL(gpio_pullup);
  421. static irqreturn_t gpio_irq_handler(int irq, void *dev_id)
  422. {
  423. struct u300_gpio_port *port = dev_id;
  424. u32 val;
  425. int pin;
  426. /* Read event register */
  427. val = readl(virtbase + U300_GPIO_PXIEV + port->number *
  428. U300_GPIO_PORTX_SPACING);
  429. /* Mask with enable register */
  430. val &= readl(virtbase + U300_GPIO_PXIEV + port->number *
  431. U300_GPIO_PORTX_SPACING);
  432. /* Mask relevant bits */
  433. val &= U300_GPIO_PXIEV_ALL_IRQ_EVENT_MASK;
  434. /* ACK IRQ (clear event) */
  435. writel(val, virtbase + U300_GPIO_PXIEV + port->number *
  436. U300_GPIO_PORTX_SPACING);
  437. /* Print message */
  438. while (val != 0) {
  439. unsigned gpio;
  440. pin = __ffs(val);
  441. /* mask off this pin */
  442. val &= ~(1 << pin);
  443. gpio = (port->number << 3) + pin;
  444. if (gpio_pin[gpio].callback)
  445. (void)gpio_pin[gpio].callback(gpio_pin[gpio].data);
  446. else
  447. printk(KERN_DEBUG "GPIO: Stray GPIO IRQ on line %d\n",
  448. gpio);
  449. }
  450. return IRQ_HANDLED;
  451. }
  452. static void gpio_set_initial_values(void)
  453. {
  454. #ifdef U300_COH901571_3
  455. int i, j;
  456. unsigned long flags;
  457. u32 val;
  458. /* Write default values to all pins */
  459. for (i = 0; i < U300_GPIO_NUM_PORTS; i++) {
  460. val = 0;
  461. for (j = 0; j < 8; j++)
  462. val |= (u32) (u300_gpio_config[i][j].default_output_value != DEFAULT_OUTPUT_LOW) << j;
  463. local_irq_save(flags);
  464. writel(val, virtbase + U300_GPIO_PXPDOR + i * U300_GPIO_PORTX_SPACING);
  465. local_irq_restore(flags);
  466. }
  467. /*
  468. * Put all pins that are set to either 'GPIO_OUT' or 'GPIO_NOT_USED'
  469. * to output and 'GPIO_IN' to input for each port. And initalize
  470. * default value on outputs.
  471. */
  472. for (i = 0; i < U300_GPIO_NUM_PORTS; i++) {
  473. for (j = 0; j < U300_GPIO_PINS_PER_PORT; j++) {
  474. local_irq_save(flags);
  475. val = readl(virtbase + U300_GPIO_PXPCR +
  476. i * U300_GPIO_PORTX_SPACING);
  477. /* Mask out this pin */
  478. val &= ~(U300_GPIO_PXPCR_PIN_MODE_MASK << (j << 1));
  479. if (u300_gpio_config[i][j].pin_usage != GPIO_IN)
  480. val |= (U300_GPIO_PXPCR_PIN_MODE_OUTPUT_PUSH_PULL << (j << 1));
  481. writel(val, virtbase + U300_GPIO_PXPCR +
  482. i * U300_GPIO_PORTX_SPACING);
  483. local_irq_restore(flags);
  484. }
  485. }
  486. /* Enable or disable the internal pull-ups in the GPIO ASIC block */
  487. for (i = 0; i < U300_GPIO_MAX; i++) {
  488. val = 0;
  489. for (j = 0; j < 8; j++)
  490. val |= (u32)((u300_gpio_config[i][j].pull_up == DISABLE_PULL_UP)) << j;
  491. local_irq_save(flags);
  492. writel(val, virtbase + U300_GPIO_PXPER + i * U300_GPIO_PORTX_SPACING);
  493. local_irq_restore(flags);
  494. }
  495. #endif
  496. }
  497. static int __devinit gpio_probe(struct platform_device *pdev)
  498. {
  499. u32 val;
  500. int err = 0;
  501. int i;
  502. int num_irqs;
  503. memset(gpio_pin, 0, sizeof(gpio_pin));
  504. /* Get GPIO clock */
  505. clk = clk_get(&pdev->dev, NULL);
  506. if (IS_ERR(clk)) {
  507. err = PTR_ERR(clk);
  508. printk(KERN_ERR "GPIO: could not get GPIO clock\n");
  509. goto err_no_clk;
  510. }
  511. err = clk_enable(clk);
  512. if (err) {
  513. printk(KERN_ERR "GPIO: could not enable GPIO clock\n");
  514. goto err_no_clk_enable;
  515. }
  516. memres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  517. if (!memres)
  518. goto err_no_resource;
  519. if (request_mem_region(memres->start, memres->end - memres->start, "GPIO Controller")
  520. == NULL) {
  521. err = -ENODEV;
  522. goto err_no_ioregion;
  523. }
  524. virtbase = ioremap(memres->start, memres->end - memres->start + 1);
  525. if (!virtbase) {
  526. err = -ENOMEM;
  527. goto err_no_ioremap;
  528. }
  529. #ifdef U300_COH901335
  530. printk(KERN_INFO "GPIO: Initializing GPIO Controller COH 901 335\n");
  531. /* Turn on the GPIO block */
  532. writel(U300_GPIO_CR_BLOCK_CLOCK_ENABLE, virtbase + U300_GPIO_CR);
  533. #endif
  534. #ifdef U300_COH901571_3
  535. printk(KERN_INFO "GPIO: Initializing GPIO Controller COH 901 571/3\n");
  536. val = readl(virtbase + U300_GPIO_CR);
  537. printk(KERN_INFO "GPIO: COH901571/3 block version: %d, " \
  538. "number of cores: %d\n",
  539. ((val & 0x0000FE00) >> 9),
  540. ((val & 0x000001FC) >> 2));
  541. writel(U300_GPIO_CR_BLOCK_CLKRQ_ENABLE, virtbase + U300_GPIO_CR);
  542. #endif
  543. /* Set up some padmuxing here */
  544. #ifdef CONFIG_MMC
  545. pmx_set_mission_mode_mmc();
  546. #endif
  547. #ifdef CONFIG_SPI_PL022
  548. pmx_set_mission_mode_spi();
  549. #endif
  550. gpio_set_initial_values();
  551. for (num_irqs = 0 ; num_irqs < U300_GPIO_NUM_PORTS; num_irqs++) {
  552. gpio_ports[num_irqs].irq =
  553. platform_get_irq_byname(pdev,
  554. gpio_ports[num_irqs].name);
  555. err = request_irq(gpio_ports[num_irqs].irq,
  556. gpio_irq_handler, IRQF_DISABLED,
  557. gpio_ports[num_irqs].name,
  558. &gpio_ports[num_irqs]);
  559. if (err) {
  560. printk(KERN_CRIT "GPIO: Cannot allocate IRQ for %s!\n",
  561. gpio_ports[num_irqs].name);
  562. goto err_no_irq;
  563. }
  564. /* Turns off PortX_irq_force */
  565. writel(0x0, virtbase + U300_GPIO_PXIFR +
  566. num_irqs * U300_GPIO_PORTX_SPACING);
  567. }
  568. printk(KERN_INFO "GPIO: U300 gpio module loaded\n");
  569. return 0;
  570. err_no_irq:
  571. for (i = 0; i < num_irqs; i++)
  572. free_irq(gpio_ports[i].irq, &gpio_ports[i]);
  573. iounmap(virtbase);
  574. err_no_ioremap:
  575. release_mem_region(memres->start, memres->end - memres->start);
  576. err_no_ioregion:
  577. err_no_resource:
  578. clk_disable(clk);
  579. err_no_clk_enable:
  580. clk_put(clk);
  581. err_no_clk:
  582. printk(KERN_INFO "GPIO: module ERROR:%d\n", err);
  583. return err;
  584. }
  585. static int __devexit gpio_remove(struct platform_device *pdev)
  586. {
  587. int i;
  588. /* Turn off the GPIO block */
  589. writel(0x00000000U, virtbase + U300_GPIO_CR);
  590. for (i = 0 ; i < U300_GPIO_NUM_PORTS; i++)
  591. free_irq(gpio_ports[i].irq, &gpio_ports[i]);
  592. iounmap(virtbase);
  593. release_mem_region(memres->start, memres->end - memres->start);
  594. clk_disable(clk);
  595. clk_put(clk);
  596. return 0;
  597. }
  598. static struct platform_driver gpio_driver = {
  599. .driver = {
  600. .name = "u300-gpio",
  601. },
  602. .probe = gpio_probe,
  603. .remove = __devexit_p(gpio_remove),
  604. };
  605. static int __init u300_gpio_init(void)
  606. {
  607. return platform_driver_register(&gpio_driver);
  608. }
  609. static void __exit u300_gpio_exit(void)
  610. {
  611. platform_driver_unregister(&gpio_driver);
  612. }
  613. arch_initcall(u300_gpio_init);
  614. module_exit(u300_gpio_exit);
  615. MODULE_AUTHOR("Linus Walleij <linus.walleij@stericsson.com>");
  616. #ifdef U300_COH901571_3
  617. MODULE_DESCRIPTION("ST-Ericsson AB COH 901 571/3 GPIO driver");
  618. #endif
  619. #ifdef U300_COH901335
  620. MODULE_DESCRIPTION("ST-Ericsson AB COH 901 335 GPIO driver");
  621. #endif
  622. MODULE_LICENSE("GPL");