regcache.c 9.7 KB

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  1. /*
  2. * Register cache access API
  3. *
  4. * Copyright 2011 Wolfson Microelectronics plc
  5. *
  6. * Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/slab.h>
  13. #include <linux/export.h>
  14. #include <trace/events/regmap.h>
  15. #include <linux/bsearch.h>
  16. #include <linux/sort.h>
  17. #include "internal.h"
  18. static const struct regcache_ops *cache_types[] = {
  19. &regcache_indexed_ops,
  20. &regcache_rbtree_ops,
  21. &regcache_lzo_ops,
  22. };
  23. static int regcache_hw_init(struct regmap *map)
  24. {
  25. int i, j;
  26. int ret;
  27. int count;
  28. unsigned int val;
  29. void *tmp_buf;
  30. if (!map->num_reg_defaults_raw)
  31. return -EINVAL;
  32. if (!map->reg_defaults_raw) {
  33. dev_warn(map->dev, "No cache defaults, reading back from HW\n");
  34. tmp_buf = kmalloc(map->cache_size_raw, GFP_KERNEL);
  35. if (!tmp_buf)
  36. return -EINVAL;
  37. ret = regmap_bulk_read(map, 0, tmp_buf,
  38. map->num_reg_defaults_raw);
  39. if (ret < 0) {
  40. kfree(tmp_buf);
  41. return ret;
  42. }
  43. map->reg_defaults_raw = tmp_buf;
  44. map->cache_free = 1;
  45. }
  46. /* calculate the size of reg_defaults */
  47. for (count = 0, i = 0; i < map->num_reg_defaults_raw; i++) {
  48. val = regcache_get_val(map->reg_defaults_raw,
  49. i, map->cache_word_size);
  50. if (!val)
  51. continue;
  52. count++;
  53. }
  54. map->reg_defaults = kmalloc(count * sizeof(struct reg_default),
  55. GFP_KERNEL);
  56. if (!map->reg_defaults) {
  57. ret = -ENOMEM;
  58. goto err_free;
  59. }
  60. /* fill the reg_defaults */
  61. map->num_reg_defaults = count;
  62. for (i = 0, j = 0; i < map->num_reg_defaults_raw; i++) {
  63. val = regcache_get_val(map->reg_defaults_raw,
  64. i, map->cache_word_size);
  65. if (!val)
  66. continue;
  67. map->reg_defaults[j].reg = i;
  68. map->reg_defaults[j].def = val;
  69. j++;
  70. }
  71. return 0;
  72. err_free:
  73. if (map->cache_free)
  74. kfree(map->reg_defaults_raw);
  75. return ret;
  76. }
  77. int regcache_init(struct regmap *map)
  78. {
  79. int ret;
  80. int i;
  81. void *tmp_buf;
  82. if (map->cache_type == REGCACHE_NONE) {
  83. map->cache_bypass = true;
  84. return 0;
  85. }
  86. for (i = 0; i < ARRAY_SIZE(cache_types); i++)
  87. if (cache_types[i]->type == map->cache_type)
  88. break;
  89. if (i == ARRAY_SIZE(cache_types)) {
  90. dev_err(map->dev, "Could not match compress type: %d\n",
  91. map->cache_type);
  92. return -EINVAL;
  93. }
  94. map->cache = NULL;
  95. map->cache_ops = cache_types[i];
  96. if (!map->cache_ops->read ||
  97. !map->cache_ops->write ||
  98. !map->cache_ops->name)
  99. return -EINVAL;
  100. /* We still need to ensure that the reg_defaults
  101. * won't vanish from under us. We'll need to make
  102. * a copy of it.
  103. */
  104. if (map->reg_defaults) {
  105. if (!map->num_reg_defaults)
  106. return -EINVAL;
  107. tmp_buf = kmemdup(map->reg_defaults, map->num_reg_defaults *
  108. sizeof(struct reg_default), GFP_KERNEL);
  109. if (!tmp_buf)
  110. return -ENOMEM;
  111. map->reg_defaults = tmp_buf;
  112. } else if (map->num_reg_defaults_raw) {
  113. /* Some devices such as PMICs don't have cache defaults,
  114. * we cope with this by reading back the HW registers and
  115. * crafting the cache defaults by hand.
  116. */
  117. ret = regcache_hw_init(map);
  118. if (ret < 0)
  119. return ret;
  120. }
  121. if (!map->max_register)
  122. map->max_register = map->num_reg_defaults_raw;
  123. if (map->cache_ops->init) {
  124. dev_dbg(map->dev, "Initializing %s cache\n",
  125. map->cache_ops->name);
  126. ret = map->cache_ops->init(map);
  127. if (ret)
  128. goto err_free;
  129. }
  130. return 0;
  131. err_free:
  132. kfree(map->reg_defaults);
  133. if (map->cache_free)
  134. kfree(map->reg_defaults_raw);
  135. return ret;
  136. }
  137. void regcache_exit(struct regmap *map)
  138. {
  139. if (map->cache_type == REGCACHE_NONE)
  140. return;
  141. BUG_ON(!map->cache_ops);
  142. kfree(map->reg_defaults);
  143. if (map->cache_free)
  144. kfree(map->reg_defaults_raw);
  145. if (map->cache_ops->exit) {
  146. dev_dbg(map->dev, "Destroying %s cache\n",
  147. map->cache_ops->name);
  148. map->cache_ops->exit(map);
  149. }
  150. }
  151. /**
  152. * regcache_read: Fetch the value of a given register from the cache.
  153. *
  154. * @map: map to configure.
  155. * @reg: The register index.
  156. * @value: The value to be returned.
  157. *
  158. * Return a negative value on failure, 0 on success.
  159. */
  160. int regcache_read(struct regmap *map,
  161. unsigned int reg, unsigned int *value)
  162. {
  163. if (map->cache_type == REGCACHE_NONE)
  164. return -ENOSYS;
  165. BUG_ON(!map->cache_ops);
  166. if (!regmap_readable(map, reg))
  167. return -EIO;
  168. if (!regmap_volatile(map, reg))
  169. return map->cache_ops->read(map, reg, value);
  170. return -EINVAL;
  171. }
  172. EXPORT_SYMBOL_GPL(regcache_read);
  173. /**
  174. * regcache_write: Set the value of a given register in the cache.
  175. *
  176. * @map: map to configure.
  177. * @reg: The register index.
  178. * @value: The new register value.
  179. *
  180. * Return a negative value on failure, 0 on success.
  181. */
  182. int regcache_write(struct regmap *map,
  183. unsigned int reg, unsigned int value)
  184. {
  185. if (map->cache_type == REGCACHE_NONE)
  186. return 0;
  187. BUG_ON(!map->cache_ops);
  188. if (!regmap_writeable(map, reg))
  189. return -EIO;
  190. if (!regmap_volatile(map, reg))
  191. return map->cache_ops->write(map, reg, value);
  192. return 0;
  193. }
  194. EXPORT_SYMBOL_GPL(regcache_write);
  195. /**
  196. * regcache_sync: Sync the register cache with the hardware.
  197. *
  198. * @map: map to configure.
  199. *
  200. * Any registers that should not be synced should be marked as
  201. * volatile. In general drivers can choose not to use the provided
  202. * syncing functionality if they so require.
  203. *
  204. * Return a negative value on failure, 0 on success.
  205. */
  206. int regcache_sync(struct regmap *map)
  207. {
  208. int ret = 0;
  209. unsigned int val;
  210. unsigned int i;
  211. const char *name;
  212. unsigned int bypass;
  213. BUG_ON(!map->cache_ops);
  214. mutex_lock(&map->lock);
  215. /* Remember the initial bypass state */
  216. bypass = map->cache_bypass;
  217. dev_dbg(map->dev, "Syncing %s cache\n",
  218. map->cache_ops->name);
  219. name = map->cache_ops->name;
  220. trace_regcache_sync(map->dev, name, "start");
  221. if (!map->cache_dirty)
  222. goto out;
  223. if (map->cache_ops->sync) {
  224. ret = map->cache_ops->sync(map);
  225. } else {
  226. for (i = 0; i < map->num_reg_defaults; i++) {
  227. ret = regcache_read(map, i, &val);
  228. if (ret < 0)
  229. goto out;
  230. map->cache_bypass = 1;
  231. ret = _regmap_write(map, i, val);
  232. map->cache_bypass = 0;
  233. if (ret < 0)
  234. goto out;
  235. dev_dbg(map->dev, "Synced register %#x, value %#x\n",
  236. map->reg_defaults[i].reg,
  237. map->reg_defaults[i].def);
  238. }
  239. }
  240. out:
  241. trace_regcache_sync(map->dev, name, "stop");
  242. /* Restore the bypass state */
  243. map->cache_bypass = bypass;
  244. mutex_unlock(&map->lock);
  245. return ret;
  246. }
  247. EXPORT_SYMBOL_GPL(regcache_sync);
  248. /**
  249. * regcache_cache_only: Put a register map into cache only mode
  250. *
  251. * @map: map to configure
  252. * @cache_only: flag if changes should be written to the hardware
  253. *
  254. * When a register map is marked as cache only writes to the register
  255. * map API will only update the register cache, they will not cause
  256. * any hardware changes. This is useful for allowing portions of
  257. * drivers to act as though the device were functioning as normal when
  258. * it is disabled for power saving reasons.
  259. */
  260. void regcache_cache_only(struct regmap *map, bool enable)
  261. {
  262. mutex_lock(&map->lock);
  263. WARN_ON(map->cache_bypass && enable);
  264. map->cache_only = enable;
  265. mutex_unlock(&map->lock);
  266. }
  267. EXPORT_SYMBOL_GPL(regcache_cache_only);
  268. /**
  269. * regcache_mark_dirty: Mark the register cache as dirty
  270. *
  271. * @map: map to mark
  272. *
  273. * Mark the register cache as dirty, for example due to the device
  274. * having been powered down for suspend. If the cache is not marked
  275. * as dirty then the cache sync will be suppressed.
  276. */
  277. void regcache_mark_dirty(struct regmap *map)
  278. {
  279. mutex_lock(&map->lock);
  280. map->cache_dirty = true;
  281. mutex_unlock(&map->lock);
  282. }
  283. EXPORT_SYMBOL_GPL(regcache_mark_dirty);
  284. /**
  285. * regcache_cache_bypass: Put a register map into cache bypass mode
  286. *
  287. * @map: map to configure
  288. * @cache_bypass: flag if changes should not be written to the hardware
  289. *
  290. * When a register map is marked with the cache bypass option, writes
  291. * to the register map API will only update the hardware and not the
  292. * the cache directly. This is useful when syncing the cache back to
  293. * the hardware.
  294. */
  295. void regcache_cache_bypass(struct regmap *map, bool enable)
  296. {
  297. mutex_lock(&map->lock);
  298. WARN_ON(map->cache_only && enable);
  299. map->cache_bypass = enable;
  300. mutex_unlock(&map->lock);
  301. }
  302. EXPORT_SYMBOL_GPL(regcache_cache_bypass);
  303. bool regcache_set_val(void *base, unsigned int idx,
  304. unsigned int val, unsigned int word_size)
  305. {
  306. switch (word_size) {
  307. case 1: {
  308. u8 *cache = base;
  309. if (cache[idx] == val)
  310. return true;
  311. cache[idx] = val;
  312. break;
  313. }
  314. case 2: {
  315. u16 *cache = base;
  316. if (cache[idx] == val)
  317. return true;
  318. cache[idx] = val;
  319. break;
  320. }
  321. default:
  322. BUG();
  323. }
  324. /* unreachable */
  325. return false;
  326. }
  327. unsigned int regcache_get_val(const void *base, unsigned int idx,
  328. unsigned int word_size)
  329. {
  330. if (!base)
  331. return -EINVAL;
  332. switch (word_size) {
  333. case 1: {
  334. const u8 *cache = base;
  335. return cache[idx];
  336. }
  337. case 2: {
  338. const u16 *cache = base;
  339. return cache[idx];
  340. }
  341. default:
  342. BUG();
  343. }
  344. /* unreachable */
  345. return -1;
  346. }
  347. static int regcache_default_cmp(const void *a, const void *b)
  348. {
  349. const struct reg_default *_a = a;
  350. const struct reg_default *_b = b;
  351. return _a->reg - _b->reg;
  352. }
  353. int regcache_lookup_reg(struct regmap *map, unsigned int reg)
  354. {
  355. struct reg_default key;
  356. struct reg_default *r;
  357. key.reg = reg;
  358. key.def = 0;
  359. r = bsearch(&key, map->reg_defaults, map->num_reg_defaults,
  360. sizeof(struct reg_default), regcache_default_cmp);
  361. if (r)
  362. return r - map->reg_defaults;
  363. else
  364. return -ENOENT;
  365. }
  366. int regcache_insert_reg(struct regmap *map, unsigned int reg,
  367. unsigned int val)
  368. {
  369. void *tmp;
  370. tmp = krealloc(map->reg_defaults,
  371. (map->num_reg_defaults + 1) * sizeof(struct reg_default),
  372. GFP_KERNEL);
  373. if (!tmp)
  374. return -ENOMEM;
  375. map->reg_defaults = tmp;
  376. map->num_reg_defaults++;
  377. map->reg_defaults[map->num_reg_defaults - 1].reg = reg;
  378. map->reg_defaults[map->num_reg_defaults - 1].def = val;
  379. sort(map->reg_defaults, map->num_reg_defaults,
  380. sizeof(struct reg_default), regcache_default_cmp, NULL);
  381. return 0;
  382. }