main.c 59 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424
  1. /*
  2. * Copyright (c) 2008-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/nl80211.h>
  17. #include <linux/delay.h>
  18. #include "ath9k.h"
  19. #include "btcoex.h"
  20. static u8 parse_mpdudensity(u8 mpdudensity)
  21. {
  22. /*
  23. * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  24. * 0 for no restriction
  25. * 1 for 1/4 us
  26. * 2 for 1/2 us
  27. * 3 for 1 us
  28. * 4 for 2 us
  29. * 5 for 4 us
  30. * 6 for 8 us
  31. * 7 for 16 us
  32. */
  33. switch (mpdudensity) {
  34. case 0:
  35. return 0;
  36. case 1:
  37. case 2:
  38. case 3:
  39. /* Our lower layer calculations limit our precision to
  40. 1 microsecond */
  41. return 1;
  42. case 4:
  43. return 2;
  44. case 5:
  45. return 4;
  46. case 6:
  47. return 8;
  48. case 7:
  49. return 16;
  50. default:
  51. return 0;
  52. }
  53. }
  54. static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
  55. {
  56. bool pending = false;
  57. spin_lock_bh(&txq->axq_lock);
  58. if (txq->axq_depth || !list_empty(&txq->axq_acq))
  59. pending = true;
  60. spin_unlock_bh(&txq->axq_lock);
  61. return pending;
  62. }
  63. static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  64. {
  65. unsigned long flags;
  66. bool ret;
  67. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  68. ret = ath9k_hw_setpower(sc->sc_ah, mode);
  69. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  70. return ret;
  71. }
  72. void ath9k_ps_wakeup(struct ath_softc *sc)
  73. {
  74. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  75. unsigned long flags;
  76. enum ath9k_power_mode power_mode;
  77. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  78. if (++sc->ps_usecount != 1)
  79. goto unlock;
  80. power_mode = sc->sc_ah->power_mode;
  81. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  82. /*
  83. * While the hardware is asleep, the cycle counters contain no
  84. * useful data. Better clear them now so that they don't mess up
  85. * survey data results.
  86. */
  87. if (power_mode != ATH9K_PM_AWAKE) {
  88. spin_lock(&common->cc_lock);
  89. ath_hw_cycle_counters_update(common);
  90. memset(&common->cc_survey, 0, sizeof(common->cc_survey));
  91. spin_unlock(&common->cc_lock);
  92. }
  93. unlock:
  94. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  95. }
  96. void ath9k_ps_restore(struct ath_softc *sc)
  97. {
  98. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  99. enum ath9k_power_mode mode;
  100. unsigned long flags;
  101. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  102. if (--sc->ps_usecount != 0)
  103. goto unlock;
  104. if (sc->ps_flags & PS_WAIT_FOR_TX_ACK)
  105. goto unlock;
  106. if (sc->ps_idle)
  107. mode = ATH9K_PM_FULL_SLEEP;
  108. else if (sc->ps_enabled &&
  109. !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
  110. PS_WAIT_FOR_CAB |
  111. PS_WAIT_FOR_PSPOLL_DATA)))
  112. mode = ATH9K_PM_NETWORK_SLEEP;
  113. else
  114. goto unlock;
  115. spin_lock(&common->cc_lock);
  116. ath_hw_cycle_counters_update(common);
  117. spin_unlock(&common->cc_lock);
  118. ath9k_hw_setpower(sc->sc_ah, mode);
  119. unlock:
  120. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  121. }
  122. void ath_start_ani(struct ath_common *common)
  123. {
  124. struct ath_hw *ah = common->ah;
  125. unsigned long timestamp = jiffies_to_msecs(jiffies);
  126. struct ath_softc *sc = (struct ath_softc *) common->priv;
  127. if (!(sc->sc_flags & SC_OP_ANI_RUN))
  128. return;
  129. if (sc->sc_flags & SC_OP_OFFCHANNEL)
  130. return;
  131. common->ani.longcal_timer = timestamp;
  132. common->ani.shortcal_timer = timestamp;
  133. common->ani.checkani_timer = timestamp;
  134. mod_timer(&common->ani.timer,
  135. jiffies +
  136. msecs_to_jiffies((u32)ah->config.ani_poll_interval));
  137. }
  138. static void ath_update_survey_nf(struct ath_softc *sc, int channel)
  139. {
  140. struct ath_hw *ah = sc->sc_ah;
  141. struct ath9k_channel *chan = &ah->channels[channel];
  142. struct survey_info *survey = &sc->survey[channel];
  143. if (chan->noisefloor) {
  144. survey->filled |= SURVEY_INFO_NOISE_DBM;
  145. survey->noise = ath9k_hw_getchan_noise(ah, chan);
  146. }
  147. }
  148. /*
  149. * Updates the survey statistics and returns the busy time since last
  150. * update in %, if the measurement duration was long enough for the
  151. * result to be useful, -1 otherwise.
  152. */
  153. static int ath_update_survey_stats(struct ath_softc *sc)
  154. {
  155. struct ath_hw *ah = sc->sc_ah;
  156. struct ath_common *common = ath9k_hw_common(ah);
  157. int pos = ah->curchan - &ah->channels[0];
  158. struct survey_info *survey = &sc->survey[pos];
  159. struct ath_cycle_counters *cc = &common->cc_survey;
  160. unsigned int div = common->clockrate * 1000;
  161. int ret = 0;
  162. if (!ah->curchan)
  163. return -1;
  164. if (ah->power_mode == ATH9K_PM_AWAKE)
  165. ath_hw_cycle_counters_update(common);
  166. if (cc->cycles > 0) {
  167. survey->filled |= SURVEY_INFO_CHANNEL_TIME |
  168. SURVEY_INFO_CHANNEL_TIME_BUSY |
  169. SURVEY_INFO_CHANNEL_TIME_RX |
  170. SURVEY_INFO_CHANNEL_TIME_TX;
  171. survey->channel_time += cc->cycles / div;
  172. survey->channel_time_busy += cc->rx_busy / div;
  173. survey->channel_time_rx += cc->rx_frame / div;
  174. survey->channel_time_tx += cc->tx_frame / div;
  175. }
  176. if (cc->cycles < div)
  177. return -1;
  178. if (cc->cycles > 0)
  179. ret = cc->rx_busy * 100 / cc->cycles;
  180. memset(cc, 0, sizeof(*cc));
  181. ath_update_survey_nf(sc, pos);
  182. return ret;
  183. }
  184. static void __ath_cancel_work(struct ath_softc *sc)
  185. {
  186. cancel_work_sync(&sc->paprd_work);
  187. cancel_work_sync(&sc->hw_check_work);
  188. cancel_delayed_work_sync(&sc->tx_complete_work);
  189. cancel_delayed_work_sync(&sc->hw_pll_work);
  190. }
  191. static void ath_cancel_work(struct ath_softc *sc)
  192. {
  193. __ath_cancel_work(sc);
  194. cancel_work_sync(&sc->hw_reset_work);
  195. }
  196. static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush)
  197. {
  198. struct ath_hw *ah = sc->sc_ah;
  199. struct ath_common *common = ath9k_hw_common(ah);
  200. bool ret;
  201. ieee80211_stop_queues(sc->hw);
  202. sc->hw_busy_count = 0;
  203. del_timer_sync(&common->ani.timer);
  204. ath9k_debug_samp_bb_mac(sc);
  205. ath9k_hw_disable_interrupts(ah);
  206. ret = ath_drain_all_txq(sc, retry_tx);
  207. if (!ath_stoprecv(sc))
  208. ret = false;
  209. if (!flush) {
  210. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  211. ath_rx_tasklet(sc, 1, true);
  212. ath_rx_tasklet(sc, 1, false);
  213. } else {
  214. ath_flushrecv(sc);
  215. }
  216. return ret;
  217. }
  218. static bool ath_complete_reset(struct ath_softc *sc, bool start)
  219. {
  220. struct ath_hw *ah = sc->sc_ah;
  221. struct ath_common *common = ath9k_hw_common(ah);
  222. if (ath_startrecv(sc) != 0) {
  223. ath_err(common, "Unable to restart recv logic\n");
  224. return false;
  225. }
  226. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  227. sc->config.txpowlimit, &sc->curtxpow);
  228. ath9k_hw_set_interrupts(ah);
  229. ath9k_hw_enable_interrupts(ah);
  230. if (!(sc->sc_flags & (SC_OP_OFFCHANNEL)) && start) {
  231. if (sc->sc_flags & SC_OP_BEACONS)
  232. ath_set_beacon(sc);
  233. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  234. ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
  235. if (!common->disable_ani)
  236. ath_start_ani(common);
  237. }
  238. if ((ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) && sc->ant_rx != 3) {
  239. struct ath_hw_antcomb_conf div_ant_conf;
  240. u8 lna_conf;
  241. ath9k_hw_antdiv_comb_conf_get(ah, &div_ant_conf);
  242. if (sc->ant_rx == 1)
  243. lna_conf = ATH_ANT_DIV_COMB_LNA1;
  244. else
  245. lna_conf = ATH_ANT_DIV_COMB_LNA2;
  246. div_ant_conf.main_lna_conf = lna_conf;
  247. div_ant_conf.alt_lna_conf = lna_conf;
  248. ath9k_hw_antdiv_comb_conf_set(ah, &div_ant_conf);
  249. }
  250. ieee80211_wake_queues(sc->hw);
  251. return true;
  252. }
  253. static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan,
  254. bool retry_tx)
  255. {
  256. struct ath_hw *ah = sc->sc_ah;
  257. struct ath_common *common = ath9k_hw_common(ah);
  258. struct ath9k_hw_cal_data *caldata = NULL;
  259. bool fastcc = true;
  260. bool flush = false;
  261. int r;
  262. __ath_cancel_work(sc);
  263. spin_lock_bh(&sc->sc_pcu_lock);
  264. if (!(sc->sc_flags & SC_OP_OFFCHANNEL)) {
  265. fastcc = false;
  266. caldata = &sc->caldata;
  267. }
  268. if (!hchan) {
  269. fastcc = false;
  270. flush = true;
  271. hchan = ah->curchan;
  272. }
  273. if (fastcc && (ah->chip_fullsleep ||
  274. !ath9k_hw_check_alive(ah)))
  275. fastcc = false;
  276. if (!ath_prepare_reset(sc, retry_tx, flush))
  277. fastcc = false;
  278. ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
  279. hchan->channel, IS_CHAN_HT40(hchan), fastcc);
  280. r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
  281. if (r) {
  282. ath_err(common,
  283. "Unable to reset channel, reset status %d\n", r);
  284. goto out;
  285. }
  286. if (!ath_complete_reset(sc, true))
  287. r = -EIO;
  288. out:
  289. spin_unlock_bh(&sc->sc_pcu_lock);
  290. return r;
  291. }
  292. /*
  293. * Set/change channels. If the channel is really being changed, it's done
  294. * by reseting the chip. To accomplish this we must first cleanup any pending
  295. * DMA, then restart stuff.
  296. */
  297. static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
  298. struct ath9k_channel *hchan)
  299. {
  300. int r;
  301. if (sc->sc_flags & SC_OP_INVALID)
  302. return -EIO;
  303. r = ath_reset_internal(sc, hchan, false);
  304. return r;
  305. }
  306. static void ath_paprd_activate(struct ath_softc *sc)
  307. {
  308. struct ath_hw *ah = sc->sc_ah;
  309. struct ath9k_hw_cal_data *caldata = ah->caldata;
  310. int chain;
  311. if (!caldata || !caldata->paprd_done)
  312. return;
  313. ath9k_ps_wakeup(sc);
  314. ar9003_paprd_enable(ah, false);
  315. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  316. if (!(ah->txchainmask & BIT(chain)))
  317. continue;
  318. ar9003_paprd_populate_single_table(ah, caldata, chain);
  319. }
  320. ar9003_paprd_enable(ah, true);
  321. ath9k_ps_restore(sc);
  322. }
  323. static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
  324. {
  325. struct ieee80211_hw *hw = sc->hw;
  326. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  327. struct ath_hw *ah = sc->sc_ah;
  328. struct ath_common *common = ath9k_hw_common(ah);
  329. struct ath_tx_control txctl;
  330. int time_left;
  331. memset(&txctl, 0, sizeof(txctl));
  332. txctl.txq = sc->tx.txq_map[WME_AC_BE];
  333. memset(tx_info, 0, sizeof(*tx_info));
  334. tx_info->band = hw->conf.channel->band;
  335. tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
  336. tx_info->control.rates[0].idx = 0;
  337. tx_info->control.rates[0].count = 1;
  338. tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
  339. tx_info->control.rates[1].idx = -1;
  340. init_completion(&sc->paprd_complete);
  341. txctl.paprd = BIT(chain);
  342. if (ath_tx_start(hw, skb, &txctl) != 0) {
  343. ath_dbg(common, CALIBRATE, "PAPRD TX failed\n");
  344. dev_kfree_skb_any(skb);
  345. return false;
  346. }
  347. time_left = wait_for_completion_timeout(&sc->paprd_complete,
  348. msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
  349. if (!time_left)
  350. ath_dbg(common, CALIBRATE,
  351. "Timeout waiting for paprd training on TX chain %d\n",
  352. chain);
  353. return !!time_left;
  354. }
  355. void ath_paprd_calibrate(struct work_struct *work)
  356. {
  357. struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
  358. struct ieee80211_hw *hw = sc->hw;
  359. struct ath_hw *ah = sc->sc_ah;
  360. struct ieee80211_hdr *hdr;
  361. struct sk_buff *skb = NULL;
  362. struct ath9k_hw_cal_data *caldata = ah->caldata;
  363. struct ath_common *common = ath9k_hw_common(ah);
  364. int ftype;
  365. int chain_ok = 0;
  366. int chain;
  367. int len = 1800;
  368. if (!caldata)
  369. return;
  370. ath9k_ps_wakeup(sc);
  371. if (ar9003_paprd_init_table(ah) < 0)
  372. goto fail_paprd;
  373. skb = alloc_skb(len, GFP_KERNEL);
  374. if (!skb)
  375. goto fail_paprd;
  376. skb_put(skb, len);
  377. memset(skb->data, 0, len);
  378. hdr = (struct ieee80211_hdr *)skb->data;
  379. ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
  380. hdr->frame_control = cpu_to_le16(ftype);
  381. hdr->duration_id = cpu_to_le16(10);
  382. memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
  383. memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
  384. memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
  385. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  386. if (!(ah->txchainmask & BIT(chain)))
  387. continue;
  388. chain_ok = 0;
  389. ath_dbg(common, CALIBRATE,
  390. "Sending PAPRD frame for thermal measurement on chain %d\n",
  391. chain);
  392. if (!ath_paprd_send_frame(sc, skb, chain))
  393. goto fail_paprd;
  394. ar9003_paprd_setup_gain_table(ah, chain);
  395. ath_dbg(common, CALIBRATE,
  396. "Sending PAPRD training frame on chain %d\n", chain);
  397. if (!ath_paprd_send_frame(sc, skb, chain))
  398. goto fail_paprd;
  399. if (!ar9003_paprd_is_done(ah)) {
  400. ath_dbg(common, CALIBRATE,
  401. "PAPRD not yet done on chain %d\n", chain);
  402. break;
  403. }
  404. if (ar9003_paprd_create_curve(ah, caldata, chain)) {
  405. ath_dbg(common, CALIBRATE,
  406. "PAPRD create curve failed on chain %d\n",
  407. chain);
  408. break;
  409. }
  410. chain_ok = 1;
  411. }
  412. kfree_skb(skb);
  413. if (chain_ok) {
  414. caldata->paprd_done = true;
  415. ath_paprd_activate(sc);
  416. }
  417. fail_paprd:
  418. ath9k_ps_restore(sc);
  419. }
  420. /*
  421. * This routine performs the periodic noise floor calibration function
  422. * that is used to adjust and optimize the chip performance. This
  423. * takes environmental changes (location, temperature) into account.
  424. * When the task is complete, it reschedules itself depending on the
  425. * appropriate interval that was calculated.
  426. */
  427. void ath_ani_calibrate(unsigned long data)
  428. {
  429. struct ath_softc *sc = (struct ath_softc *)data;
  430. struct ath_hw *ah = sc->sc_ah;
  431. struct ath_common *common = ath9k_hw_common(ah);
  432. bool longcal = false;
  433. bool shortcal = false;
  434. bool aniflag = false;
  435. unsigned int timestamp = jiffies_to_msecs(jiffies);
  436. u32 cal_interval, short_cal_interval, long_cal_interval;
  437. unsigned long flags;
  438. if (ah->caldata && ah->caldata->nfcal_interference)
  439. long_cal_interval = ATH_LONG_CALINTERVAL_INT;
  440. else
  441. long_cal_interval = ATH_LONG_CALINTERVAL;
  442. short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
  443. ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
  444. /* Only calibrate if awake */
  445. if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
  446. goto set_timer;
  447. ath9k_ps_wakeup(sc);
  448. /* Long calibration runs independently of short calibration. */
  449. if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
  450. longcal = true;
  451. common->ani.longcal_timer = timestamp;
  452. }
  453. /* Short calibration applies only while caldone is false */
  454. if (!common->ani.caldone) {
  455. if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
  456. shortcal = true;
  457. common->ani.shortcal_timer = timestamp;
  458. common->ani.resetcal_timer = timestamp;
  459. }
  460. } else {
  461. if ((timestamp - common->ani.resetcal_timer) >=
  462. ATH_RESTART_CALINTERVAL) {
  463. common->ani.caldone = ath9k_hw_reset_calvalid(ah);
  464. if (common->ani.caldone)
  465. common->ani.resetcal_timer = timestamp;
  466. }
  467. }
  468. /* Verify whether we must check ANI */
  469. if (sc->sc_ah->config.enable_ani
  470. && (timestamp - common->ani.checkani_timer) >=
  471. ah->config.ani_poll_interval) {
  472. aniflag = true;
  473. common->ani.checkani_timer = timestamp;
  474. }
  475. /* Call ANI routine if necessary */
  476. if (aniflag) {
  477. spin_lock_irqsave(&common->cc_lock, flags);
  478. ath9k_hw_ani_monitor(ah, ah->curchan);
  479. ath_update_survey_stats(sc);
  480. spin_unlock_irqrestore(&common->cc_lock, flags);
  481. }
  482. /* Perform calibration if necessary */
  483. if (longcal || shortcal) {
  484. common->ani.caldone =
  485. ath9k_hw_calibrate(ah, ah->curchan,
  486. ah->rxchainmask, longcal);
  487. }
  488. ath_dbg(common, ANI,
  489. "Calibration @%lu finished: %s %s %s, caldone: %s\n",
  490. jiffies,
  491. longcal ? "long" : "", shortcal ? "short" : "",
  492. aniflag ? "ani" : "", common->ani.caldone ? "true" : "false");
  493. ath9k_ps_restore(sc);
  494. set_timer:
  495. /*
  496. * Set timer interval based on previous results.
  497. * The interval must be the shortest necessary to satisfy ANI,
  498. * short calibration and long calibration.
  499. */
  500. ath9k_debug_samp_bb_mac(sc);
  501. cal_interval = ATH_LONG_CALINTERVAL;
  502. if (sc->sc_ah->config.enable_ani)
  503. cal_interval = min(cal_interval,
  504. (u32)ah->config.ani_poll_interval);
  505. if (!common->ani.caldone)
  506. cal_interval = min(cal_interval, (u32)short_cal_interval);
  507. mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
  508. if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
  509. if (!ah->caldata->paprd_done)
  510. ieee80211_queue_work(sc->hw, &sc->paprd_work);
  511. else if (!ah->paprd_table_write_done)
  512. ath_paprd_activate(sc);
  513. }
  514. }
  515. static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
  516. struct ieee80211_vif *vif)
  517. {
  518. struct ath_node *an;
  519. an = (struct ath_node *)sta->drv_priv;
  520. #ifdef CONFIG_ATH9K_DEBUGFS
  521. spin_lock(&sc->nodes_lock);
  522. list_add(&an->list, &sc->nodes);
  523. spin_unlock(&sc->nodes_lock);
  524. #endif
  525. an->sta = sta;
  526. an->vif = vif;
  527. if (sc->sc_flags & SC_OP_TXAGGR) {
  528. ath_tx_node_init(sc, an);
  529. an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
  530. sta->ht_cap.ampdu_factor);
  531. an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
  532. }
  533. }
  534. static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
  535. {
  536. struct ath_node *an = (struct ath_node *)sta->drv_priv;
  537. #ifdef CONFIG_ATH9K_DEBUGFS
  538. spin_lock(&sc->nodes_lock);
  539. list_del(&an->list);
  540. spin_unlock(&sc->nodes_lock);
  541. an->sta = NULL;
  542. #endif
  543. if (sc->sc_flags & SC_OP_TXAGGR)
  544. ath_tx_node_cleanup(sc, an);
  545. }
  546. void ath9k_tasklet(unsigned long data)
  547. {
  548. struct ath_softc *sc = (struct ath_softc *)data;
  549. struct ath_hw *ah = sc->sc_ah;
  550. struct ath_common *common = ath9k_hw_common(ah);
  551. u32 status = sc->intrstatus;
  552. u32 rxmask;
  553. ath9k_ps_wakeup(sc);
  554. spin_lock(&sc->sc_pcu_lock);
  555. if ((status & ATH9K_INT_FATAL) ||
  556. (status & ATH9K_INT_BB_WATCHDOG)) {
  557. #ifdef CONFIG_ATH9K_DEBUGFS
  558. enum ath_reset_type type;
  559. if (status & ATH9K_INT_FATAL)
  560. type = RESET_TYPE_FATAL_INT;
  561. else
  562. type = RESET_TYPE_BB_WATCHDOG;
  563. RESET_STAT_INC(sc, type);
  564. #endif
  565. ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
  566. goto out;
  567. }
  568. /*
  569. * Only run the baseband hang check if beacons stop working in AP or
  570. * IBSS mode, because it has a high false positive rate. For station
  571. * mode it should not be necessary, since the upper layers will detect
  572. * this through a beacon miss automatically and the following channel
  573. * change will trigger a hardware reset anyway
  574. */
  575. if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
  576. !ath9k_hw_check_alive(ah))
  577. ieee80211_queue_work(sc->hw, &sc->hw_check_work);
  578. if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
  579. /*
  580. * TSF sync does not look correct; remain awake to sync with
  581. * the next Beacon.
  582. */
  583. ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
  584. sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
  585. }
  586. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  587. rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
  588. ATH9K_INT_RXORN);
  589. else
  590. rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  591. if (status & rxmask) {
  592. /* Check for high priority Rx first */
  593. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  594. (status & ATH9K_INT_RXHP))
  595. ath_rx_tasklet(sc, 0, true);
  596. ath_rx_tasklet(sc, 0, false);
  597. }
  598. if (status & ATH9K_INT_TX) {
  599. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  600. ath_tx_edma_tasklet(sc);
  601. else
  602. ath_tx_tasklet(sc);
  603. }
  604. ath9k_btcoex_handle_interrupt(sc, status);
  605. out:
  606. /* re-enable hardware interrupt */
  607. ath9k_hw_enable_interrupts(ah);
  608. spin_unlock(&sc->sc_pcu_lock);
  609. ath9k_ps_restore(sc);
  610. }
  611. irqreturn_t ath_isr(int irq, void *dev)
  612. {
  613. #define SCHED_INTR ( \
  614. ATH9K_INT_FATAL | \
  615. ATH9K_INT_BB_WATCHDOG | \
  616. ATH9K_INT_RXORN | \
  617. ATH9K_INT_RXEOL | \
  618. ATH9K_INT_RX | \
  619. ATH9K_INT_RXLP | \
  620. ATH9K_INT_RXHP | \
  621. ATH9K_INT_TX | \
  622. ATH9K_INT_BMISS | \
  623. ATH9K_INT_CST | \
  624. ATH9K_INT_TSFOOR | \
  625. ATH9K_INT_GENTIMER | \
  626. ATH9K_INT_MCI)
  627. struct ath_softc *sc = dev;
  628. struct ath_hw *ah = sc->sc_ah;
  629. struct ath_common *common = ath9k_hw_common(ah);
  630. enum ath9k_int status;
  631. bool sched = false;
  632. /*
  633. * The hardware is not ready/present, don't
  634. * touch anything. Note this can happen early
  635. * on if the IRQ is shared.
  636. */
  637. if (sc->sc_flags & SC_OP_INVALID)
  638. return IRQ_NONE;
  639. /* shared irq, not for us */
  640. if (!ath9k_hw_intrpend(ah))
  641. return IRQ_NONE;
  642. /*
  643. * Figure out the reason(s) for the interrupt. Note
  644. * that the hal returns a pseudo-ISR that may include
  645. * bits we haven't explicitly enabled so we mask the
  646. * value to insure we only process bits we requested.
  647. */
  648. ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
  649. status &= ah->imask; /* discard unasked-for bits */
  650. /*
  651. * If there are no status bits set, then this interrupt was not
  652. * for me (should have been caught above).
  653. */
  654. if (!status)
  655. return IRQ_NONE;
  656. /* Cache the status */
  657. sc->intrstatus = status;
  658. if (status & SCHED_INTR)
  659. sched = true;
  660. /*
  661. * If a FATAL or RXORN interrupt is received, we have to reset the
  662. * chip immediately.
  663. */
  664. if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
  665. !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
  666. goto chip_reset;
  667. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  668. (status & ATH9K_INT_BB_WATCHDOG)) {
  669. spin_lock(&common->cc_lock);
  670. ath_hw_cycle_counters_update(common);
  671. ar9003_hw_bb_watchdog_dbg_info(ah);
  672. spin_unlock(&common->cc_lock);
  673. goto chip_reset;
  674. }
  675. if (status & ATH9K_INT_SWBA)
  676. tasklet_schedule(&sc->bcon_tasklet);
  677. if (status & ATH9K_INT_TXURN)
  678. ath9k_hw_updatetxtriglevel(ah, true);
  679. if (status & ATH9K_INT_RXEOL) {
  680. ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  681. ath9k_hw_set_interrupts(ah);
  682. }
  683. if (status & ATH9K_INT_MIB) {
  684. /*
  685. * Disable interrupts until we service the MIB
  686. * interrupt; otherwise it will continue to
  687. * fire.
  688. */
  689. ath9k_hw_disable_interrupts(ah);
  690. /*
  691. * Let the hal handle the event. We assume
  692. * it will clear whatever condition caused
  693. * the interrupt.
  694. */
  695. spin_lock(&common->cc_lock);
  696. ath9k_hw_proc_mib_event(ah);
  697. spin_unlock(&common->cc_lock);
  698. ath9k_hw_enable_interrupts(ah);
  699. }
  700. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  701. if (status & ATH9K_INT_TIM_TIMER) {
  702. if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
  703. goto chip_reset;
  704. /* Clear RxAbort bit so that we can
  705. * receive frames */
  706. ath9k_setpower(sc, ATH9K_PM_AWAKE);
  707. ath9k_hw_setrxabort(sc->sc_ah, 0);
  708. sc->ps_flags |= PS_WAIT_FOR_BEACON;
  709. }
  710. chip_reset:
  711. ath_debug_stat_interrupt(sc, status);
  712. if (sched) {
  713. /* turn off every interrupt */
  714. ath9k_hw_disable_interrupts(ah);
  715. tasklet_schedule(&sc->intr_tq);
  716. }
  717. return IRQ_HANDLED;
  718. #undef SCHED_INTR
  719. }
  720. static int ath_reset(struct ath_softc *sc, bool retry_tx)
  721. {
  722. int r;
  723. ath9k_ps_wakeup(sc);
  724. r = ath_reset_internal(sc, NULL, retry_tx);
  725. if (retry_tx) {
  726. int i;
  727. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  728. if (ATH_TXQ_SETUP(sc, i)) {
  729. spin_lock_bh(&sc->tx.txq[i].axq_lock);
  730. ath_txq_schedule(sc, &sc->tx.txq[i]);
  731. spin_unlock_bh(&sc->tx.txq[i].axq_lock);
  732. }
  733. }
  734. }
  735. ath9k_ps_restore(sc);
  736. return r;
  737. }
  738. void ath_reset_work(struct work_struct *work)
  739. {
  740. struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
  741. ath_reset(sc, true);
  742. }
  743. void ath_hw_check(struct work_struct *work)
  744. {
  745. struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
  746. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  747. unsigned long flags;
  748. int busy;
  749. ath9k_ps_wakeup(sc);
  750. if (ath9k_hw_check_alive(sc->sc_ah))
  751. goto out;
  752. spin_lock_irqsave(&common->cc_lock, flags);
  753. busy = ath_update_survey_stats(sc);
  754. spin_unlock_irqrestore(&common->cc_lock, flags);
  755. ath_dbg(common, RESET, "Possible baseband hang, busy=%d (try %d)\n",
  756. busy, sc->hw_busy_count + 1);
  757. if (busy >= 99) {
  758. if (++sc->hw_busy_count >= 3) {
  759. RESET_STAT_INC(sc, RESET_TYPE_BB_HANG);
  760. ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
  761. }
  762. } else if (busy >= 0)
  763. sc->hw_busy_count = 0;
  764. out:
  765. ath9k_ps_restore(sc);
  766. }
  767. static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
  768. {
  769. static int count;
  770. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  771. if (pll_sqsum >= 0x40000) {
  772. count++;
  773. if (count == 3) {
  774. /* Rx is hung for more than 500ms. Reset it */
  775. ath_dbg(common, RESET, "Possible RX hang, resetting\n");
  776. RESET_STAT_INC(sc, RESET_TYPE_PLL_HANG);
  777. ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
  778. count = 0;
  779. }
  780. } else
  781. count = 0;
  782. }
  783. void ath_hw_pll_work(struct work_struct *work)
  784. {
  785. struct ath_softc *sc = container_of(work, struct ath_softc,
  786. hw_pll_work.work);
  787. u32 pll_sqsum;
  788. if (AR_SREV_9485(sc->sc_ah)) {
  789. ath9k_ps_wakeup(sc);
  790. pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
  791. ath9k_ps_restore(sc);
  792. ath_hw_pll_rx_hang_check(sc, pll_sqsum);
  793. ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
  794. }
  795. }
  796. /**********************/
  797. /* mac80211 callbacks */
  798. /**********************/
  799. static int ath9k_start(struct ieee80211_hw *hw)
  800. {
  801. struct ath_softc *sc = hw->priv;
  802. struct ath_hw *ah = sc->sc_ah;
  803. struct ath_common *common = ath9k_hw_common(ah);
  804. struct ieee80211_channel *curchan = hw->conf.channel;
  805. struct ath9k_channel *init_channel;
  806. int r;
  807. ath_dbg(common, CONFIG,
  808. "Starting driver with initial channel: %d MHz\n",
  809. curchan->center_freq);
  810. ath9k_ps_wakeup(sc);
  811. mutex_lock(&sc->mutex);
  812. init_channel = ath9k_cmn_get_curchannel(hw, ah);
  813. /* Reset SERDES registers */
  814. ath9k_hw_configpcipowersave(ah, false);
  815. /*
  816. * The basic interface to setting the hardware in a good
  817. * state is ``reset''. On return the hardware is known to
  818. * be powered up and with interrupts disabled. This must
  819. * be followed by initialization of the appropriate bits
  820. * and then setup of the interrupt mask.
  821. */
  822. spin_lock_bh(&sc->sc_pcu_lock);
  823. atomic_set(&ah->intr_ref_cnt, -1);
  824. r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
  825. if (r) {
  826. ath_err(common,
  827. "Unable to reset hardware; reset status %d (freq %u MHz)\n",
  828. r, curchan->center_freq);
  829. spin_unlock_bh(&sc->sc_pcu_lock);
  830. goto mutex_unlock;
  831. }
  832. /* Setup our intr mask. */
  833. ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
  834. ATH9K_INT_RXORN | ATH9K_INT_FATAL |
  835. ATH9K_INT_GLOBAL;
  836. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  837. ah->imask |= ATH9K_INT_RXHP |
  838. ATH9K_INT_RXLP |
  839. ATH9K_INT_BB_WATCHDOG;
  840. else
  841. ah->imask |= ATH9K_INT_RX;
  842. ah->imask |= ATH9K_INT_GTT;
  843. if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
  844. ah->imask |= ATH9K_INT_CST;
  845. if (ah->caps.hw_caps & ATH9K_HW_CAP_MCI)
  846. ah->imask |= ATH9K_INT_MCI;
  847. sc->sc_flags &= ~SC_OP_INVALID;
  848. sc->sc_ah->is_monitoring = false;
  849. if (!ath_complete_reset(sc, false)) {
  850. r = -EIO;
  851. spin_unlock_bh(&sc->sc_pcu_lock);
  852. goto mutex_unlock;
  853. }
  854. if (ah->led_pin >= 0) {
  855. ath9k_hw_cfg_output(ah, ah->led_pin,
  856. AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  857. ath9k_hw_set_gpio(ah, ah->led_pin, 0);
  858. }
  859. /*
  860. * Reset key cache to sane defaults (all entries cleared) instead of
  861. * semi-random values after suspend/resume.
  862. */
  863. ath9k_cmn_init_crypto(sc->sc_ah);
  864. spin_unlock_bh(&sc->sc_pcu_lock);
  865. ath9k_start_btcoex(sc);
  866. if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
  867. common->bus_ops->extn_synch_en(common);
  868. mutex_unlock:
  869. mutex_unlock(&sc->mutex);
  870. ath9k_ps_restore(sc);
  871. return r;
  872. }
  873. static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  874. {
  875. struct ath_softc *sc = hw->priv;
  876. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  877. struct ath_tx_control txctl;
  878. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
  879. if (sc->ps_enabled) {
  880. /*
  881. * mac80211 does not set PM field for normal data frames, so we
  882. * need to update that based on the current PS mode.
  883. */
  884. if (ieee80211_is_data(hdr->frame_control) &&
  885. !ieee80211_is_nullfunc(hdr->frame_control) &&
  886. !ieee80211_has_pm(hdr->frame_control)) {
  887. ath_dbg(common, PS,
  888. "Add PM=1 for a TX frame while in PS mode\n");
  889. hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
  890. }
  891. }
  892. /*
  893. * Cannot tx while the hardware is in full sleep, it first needs a full
  894. * chip reset to recover from that
  895. */
  896. if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP))
  897. goto exit;
  898. if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
  899. /*
  900. * We are using PS-Poll and mac80211 can request TX while in
  901. * power save mode. Need to wake up hardware for the TX to be
  902. * completed and if needed, also for RX of buffered frames.
  903. */
  904. ath9k_ps_wakeup(sc);
  905. if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  906. ath9k_hw_setrxabort(sc->sc_ah, 0);
  907. if (ieee80211_is_pspoll(hdr->frame_control)) {
  908. ath_dbg(common, PS,
  909. "Sending PS-Poll to pick a buffered frame\n");
  910. sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
  911. } else {
  912. ath_dbg(common, PS, "Wake up to complete TX\n");
  913. sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
  914. }
  915. /*
  916. * The actual restore operation will happen only after
  917. * the sc_flags bit is cleared. We are just dropping
  918. * the ps_usecount here.
  919. */
  920. ath9k_ps_restore(sc);
  921. }
  922. memset(&txctl, 0, sizeof(struct ath_tx_control));
  923. txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
  924. ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
  925. if (ath_tx_start(hw, skb, &txctl) != 0) {
  926. ath_dbg(common, XMIT, "TX failed\n");
  927. goto exit;
  928. }
  929. return;
  930. exit:
  931. dev_kfree_skb_any(skb);
  932. }
  933. static void ath9k_stop(struct ieee80211_hw *hw)
  934. {
  935. struct ath_softc *sc = hw->priv;
  936. struct ath_hw *ah = sc->sc_ah;
  937. struct ath_common *common = ath9k_hw_common(ah);
  938. bool prev_idle;
  939. mutex_lock(&sc->mutex);
  940. ath_cancel_work(sc);
  941. if (sc->sc_flags & SC_OP_INVALID) {
  942. ath_dbg(common, ANY, "Device not present\n");
  943. mutex_unlock(&sc->mutex);
  944. return;
  945. }
  946. /* Ensure HW is awake when we try to shut it down. */
  947. ath9k_ps_wakeup(sc);
  948. ath9k_stop_btcoex(sc);
  949. spin_lock_bh(&sc->sc_pcu_lock);
  950. /* prevent tasklets to enable interrupts once we disable them */
  951. ah->imask &= ~ATH9K_INT_GLOBAL;
  952. /* make sure h/w will not generate any interrupt
  953. * before setting the invalid flag. */
  954. ath9k_hw_disable_interrupts(ah);
  955. spin_unlock_bh(&sc->sc_pcu_lock);
  956. /* we can now sync irq and kill any running tasklets, since we already
  957. * disabled interrupts and not holding a spin lock */
  958. synchronize_irq(sc->irq);
  959. tasklet_kill(&sc->intr_tq);
  960. tasklet_kill(&sc->bcon_tasklet);
  961. prev_idle = sc->ps_idle;
  962. sc->ps_idle = true;
  963. spin_lock_bh(&sc->sc_pcu_lock);
  964. if (ah->led_pin >= 0) {
  965. ath9k_hw_set_gpio(ah, ah->led_pin, 1);
  966. ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
  967. }
  968. ath_prepare_reset(sc, false, true);
  969. if (sc->rx.frag) {
  970. dev_kfree_skb_any(sc->rx.frag);
  971. sc->rx.frag = NULL;
  972. }
  973. if (!ah->curchan)
  974. ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
  975. ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  976. ath9k_hw_phy_disable(ah);
  977. ath9k_hw_configpcipowersave(ah, true);
  978. spin_unlock_bh(&sc->sc_pcu_lock);
  979. ath9k_ps_restore(sc);
  980. sc->sc_flags |= SC_OP_INVALID;
  981. sc->ps_idle = prev_idle;
  982. mutex_unlock(&sc->mutex);
  983. ath_dbg(common, CONFIG, "Driver halt\n");
  984. }
  985. bool ath9k_uses_beacons(int type)
  986. {
  987. switch (type) {
  988. case NL80211_IFTYPE_AP:
  989. case NL80211_IFTYPE_ADHOC:
  990. case NL80211_IFTYPE_MESH_POINT:
  991. return true;
  992. default:
  993. return false;
  994. }
  995. }
  996. static void ath9k_reclaim_beacon(struct ath_softc *sc,
  997. struct ieee80211_vif *vif)
  998. {
  999. struct ath_vif *avp = (void *)vif->drv_priv;
  1000. ath9k_set_beaconing_status(sc, false);
  1001. ath_beacon_return(sc, avp);
  1002. ath9k_set_beaconing_status(sc, true);
  1003. sc->sc_flags &= ~SC_OP_BEACONS;
  1004. }
  1005. static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
  1006. {
  1007. struct ath9k_vif_iter_data *iter_data = data;
  1008. int i;
  1009. if (iter_data->hw_macaddr)
  1010. for (i = 0; i < ETH_ALEN; i++)
  1011. iter_data->mask[i] &=
  1012. ~(iter_data->hw_macaddr[i] ^ mac[i]);
  1013. switch (vif->type) {
  1014. case NL80211_IFTYPE_AP:
  1015. iter_data->naps++;
  1016. break;
  1017. case NL80211_IFTYPE_STATION:
  1018. iter_data->nstations++;
  1019. break;
  1020. case NL80211_IFTYPE_ADHOC:
  1021. iter_data->nadhocs++;
  1022. break;
  1023. case NL80211_IFTYPE_MESH_POINT:
  1024. iter_data->nmeshes++;
  1025. break;
  1026. case NL80211_IFTYPE_WDS:
  1027. iter_data->nwds++;
  1028. break;
  1029. default:
  1030. break;
  1031. }
  1032. }
  1033. /* Called with sc->mutex held. */
  1034. void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
  1035. struct ieee80211_vif *vif,
  1036. struct ath9k_vif_iter_data *iter_data)
  1037. {
  1038. struct ath_softc *sc = hw->priv;
  1039. struct ath_hw *ah = sc->sc_ah;
  1040. struct ath_common *common = ath9k_hw_common(ah);
  1041. /*
  1042. * Use the hardware MAC address as reference, the hardware uses it
  1043. * together with the BSSID mask when matching addresses.
  1044. */
  1045. memset(iter_data, 0, sizeof(*iter_data));
  1046. iter_data->hw_macaddr = common->macaddr;
  1047. memset(&iter_data->mask, 0xff, ETH_ALEN);
  1048. if (vif)
  1049. ath9k_vif_iter(iter_data, vif->addr, vif);
  1050. /* Get list of all active MAC addresses */
  1051. ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
  1052. iter_data);
  1053. }
  1054. /* Called with sc->mutex held. */
  1055. static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
  1056. struct ieee80211_vif *vif)
  1057. {
  1058. struct ath_softc *sc = hw->priv;
  1059. struct ath_hw *ah = sc->sc_ah;
  1060. struct ath_common *common = ath9k_hw_common(ah);
  1061. struct ath9k_vif_iter_data iter_data;
  1062. ath9k_calculate_iter_data(hw, vif, &iter_data);
  1063. /* Set BSSID mask. */
  1064. memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
  1065. ath_hw_setbssidmask(common);
  1066. /* Set op-mode & TSF */
  1067. if (iter_data.naps > 0) {
  1068. ath9k_hw_set_tsfadjust(ah, 1);
  1069. sc->sc_flags |= SC_OP_TSF_RESET;
  1070. ah->opmode = NL80211_IFTYPE_AP;
  1071. } else {
  1072. ath9k_hw_set_tsfadjust(ah, 0);
  1073. sc->sc_flags &= ~SC_OP_TSF_RESET;
  1074. if (iter_data.nmeshes)
  1075. ah->opmode = NL80211_IFTYPE_MESH_POINT;
  1076. else if (iter_data.nwds)
  1077. ah->opmode = NL80211_IFTYPE_AP;
  1078. else if (iter_data.nadhocs)
  1079. ah->opmode = NL80211_IFTYPE_ADHOC;
  1080. else
  1081. ah->opmode = NL80211_IFTYPE_STATION;
  1082. }
  1083. /*
  1084. * Enable MIB interrupts when there are hardware phy counters.
  1085. */
  1086. if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
  1087. if (ah->config.enable_ani)
  1088. ah->imask |= ATH9K_INT_MIB;
  1089. ah->imask |= ATH9K_INT_TSFOOR;
  1090. } else {
  1091. ah->imask &= ~ATH9K_INT_MIB;
  1092. ah->imask &= ~ATH9K_INT_TSFOOR;
  1093. }
  1094. ath9k_hw_set_interrupts(ah);
  1095. /* Set up ANI */
  1096. if (iter_data.naps > 0) {
  1097. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1098. if (!common->disable_ani) {
  1099. sc->sc_flags |= SC_OP_ANI_RUN;
  1100. ath_start_ani(common);
  1101. }
  1102. } else {
  1103. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1104. del_timer_sync(&common->ani.timer);
  1105. }
  1106. }
  1107. /* Called with sc->mutex held, vif counts set up properly. */
  1108. static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
  1109. struct ieee80211_vif *vif)
  1110. {
  1111. struct ath_softc *sc = hw->priv;
  1112. ath9k_calculate_summary_state(hw, vif);
  1113. if (ath9k_uses_beacons(vif->type)) {
  1114. int error;
  1115. /* This may fail because upper levels do not have beacons
  1116. * properly configured yet. That's OK, we assume it
  1117. * will be properly configured and then we will be notified
  1118. * in the info_changed method and set up beacons properly
  1119. * there.
  1120. */
  1121. ath9k_set_beaconing_status(sc, false);
  1122. error = ath_beacon_alloc(sc, vif);
  1123. if (!error)
  1124. ath_beacon_config(sc, vif);
  1125. ath9k_set_beaconing_status(sc, true);
  1126. }
  1127. }
  1128. static int ath9k_add_interface(struct ieee80211_hw *hw,
  1129. struct ieee80211_vif *vif)
  1130. {
  1131. struct ath_softc *sc = hw->priv;
  1132. struct ath_hw *ah = sc->sc_ah;
  1133. struct ath_common *common = ath9k_hw_common(ah);
  1134. int ret = 0;
  1135. ath9k_ps_wakeup(sc);
  1136. mutex_lock(&sc->mutex);
  1137. switch (vif->type) {
  1138. case NL80211_IFTYPE_STATION:
  1139. case NL80211_IFTYPE_WDS:
  1140. case NL80211_IFTYPE_ADHOC:
  1141. case NL80211_IFTYPE_AP:
  1142. case NL80211_IFTYPE_MESH_POINT:
  1143. break;
  1144. default:
  1145. ath_err(common, "Interface type %d not yet supported\n",
  1146. vif->type);
  1147. ret = -EOPNOTSUPP;
  1148. goto out;
  1149. }
  1150. if (ath9k_uses_beacons(vif->type)) {
  1151. if (sc->nbcnvifs >= ATH_BCBUF) {
  1152. ath_err(common, "Not enough beacon buffers when adding"
  1153. " new interface of type: %i\n",
  1154. vif->type);
  1155. ret = -ENOBUFS;
  1156. goto out;
  1157. }
  1158. }
  1159. if ((ah->opmode == NL80211_IFTYPE_ADHOC) ||
  1160. ((vif->type == NL80211_IFTYPE_ADHOC) &&
  1161. sc->nvifs > 0)) {
  1162. ath_err(common, "Cannot create ADHOC interface when other"
  1163. " interfaces already exist.\n");
  1164. ret = -EINVAL;
  1165. goto out;
  1166. }
  1167. ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
  1168. sc->nvifs++;
  1169. ath9k_do_vif_add_setup(hw, vif);
  1170. out:
  1171. mutex_unlock(&sc->mutex);
  1172. ath9k_ps_restore(sc);
  1173. return ret;
  1174. }
  1175. static int ath9k_change_interface(struct ieee80211_hw *hw,
  1176. struct ieee80211_vif *vif,
  1177. enum nl80211_iftype new_type,
  1178. bool p2p)
  1179. {
  1180. struct ath_softc *sc = hw->priv;
  1181. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1182. int ret = 0;
  1183. ath_dbg(common, CONFIG, "Change Interface\n");
  1184. mutex_lock(&sc->mutex);
  1185. ath9k_ps_wakeup(sc);
  1186. /* See if new interface type is valid. */
  1187. if ((new_type == NL80211_IFTYPE_ADHOC) &&
  1188. (sc->nvifs > 1)) {
  1189. ath_err(common, "When using ADHOC, it must be the only"
  1190. " interface.\n");
  1191. ret = -EINVAL;
  1192. goto out;
  1193. }
  1194. if (ath9k_uses_beacons(new_type) &&
  1195. !ath9k_uses_beacons(vif->type)) {
  1196. if (sc->nbcnvifs >= ATH_BCBUF) {
  1197. ath_err(common, "No beacon slot available\n");
  1198. ret = -ENOBUFS;
  1199. goto out;
  1200. }
  1201. }
  1202. /* Clean up old vif stuff */
  1203. if (ath9k_uses_beacons(vif->type))
  1204. ath9k_reclaim_beacon(sc, vif);
  1205. /* Add new settings */
  1206. vif->type = new_type;
  1207. vif->p2p = p2p;
  1208. ath9k_do_vif_add_setup(hw, vif);
  1209. out:
  1210. ath9k_ps_restore(sc);
  1211. mutex_unlock(&sc->mutex);
  1212. return ret;
  1213. }
  1214. static void ath9k_remove_interface(struct ieee80211_hw *hw,
  1215. struct ieee80211_vif *vif)
  1216. {
  1217. struct ath_softc *sc = hw->priv;
  1218. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1219. ath_dbg(common, CONFIG, "Detach Interface\n");
  1220. ath9k_ps_wakeup(sc);
  1221. mutex_lock(&sc->mutex);
  1222. sc->nvifs--;
  1223. /* Reclaim beacon resources */
  1224. if (ath9k_uses_beacons(vif->type))
  1225. ath9k_reclaim_beacon(sc, vif);
  1226. ath9k_calculate_summary_state(hw, NULL);
  1227. mutex_unlock(&sc->mutex);
  1228. ath9k_ps_restore(sc);
  1229. }
  1230. static void ath9k_enable_ps(struct ath_softc *sc)
  1231. {
  1232. struct ath_hw *ah = sc->sc_ah;
  1233. sc->ps_enabled = true;
  1234. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1235. if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
  1236. ah->imask |= ATH9K_INT_TIM_TIMER;
  1237. ath9k_hw_set_interrupts(ah);
  1238. }
  1239. ath9k_hw_setrxabort(ah, 1);
  1240. }
  1241. }
  1242. static void ath9k_disable_ps(struct ath_softc *sc)
  1243. {
  1244. struct ath_hw *ah = sc->sc_ah;
  1245. sc->ps_enabled = false;
  1246. ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
  1247. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1248. ath9k_hw_setrxabort(ah, 0);
  1249. sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
  1250. PS_WAIT_FOR_CAB |
  1251. PS_WAIT_FOR_PSPOLL_DATA |
  1252. PS_WAIT_FOR_TX_ACK);
  1253. if (ah->imask & ATH9K_INT_TIM_TIMER) {
  1254. ah->imask &= ~ATH9K_INT_TIM_TIMER;
  1255. ath9k_hw_set_interrupts(ah);
  1256. }
  1257. }
  1258. }
  1259. static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
  1260. {
  1261. struct ath_softc *sc = hw->priv;
  1262. struct ath_hw *ah = sc->sc_ah;
  1263. struct ath_common *common = ath9k_hw_common(ah);
  1264. struct ieee80211_conf *conf = &hw->conf;
  1265. ath9k_ps_wakeup(sc);
  1266. mutex_lock(&sc->mutex);
  1267. if (changed & IEEE80211_CONF_CHANGE_IDLE) {
  1268. sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
  1269. if (sc->ps_idle)
  1270. ath_cancel_work(sc);
  1271. }
  1272. /*
  1273. * We just prepare to enable PS. We have to wait until our AP has
  1274. * ACK'd our null data frame to disable RX otherwise we'll ignore
  1275. * those ACKs and end up retransmitting the same null data frames.
  1276. * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
  1277. */
  1278. if (changed & IEEE80211_CONF_CHANGE_PS) {
  1279. unsigned long flags;
  1280. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  1281. if (conf->flags & IEEE80211_CONF_PS)
  1282. ath9k_enable_ps(sc);
  1283. else
  1284. ath9k_disable_ps(sc);
  1285. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  1286. }
  1287. if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
  1288. if (conf->flags & IEEE80211_CONF_MONITOR) {
  1289. ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
  1290. sc->sc_ah->is_monitoring = true;
  1291. } else {
  1292. ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
  1293. sc->sc_ah->is_monitoring = false;
  1294. }
  1295. }
  1296. if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
  1297. struct ieee80211_channel *curchan = hw->conf.channel;
  1298. int pos = curchan->hw_value;
  1299. int old_pos = -1;
  1300. unsigned long flags;
  1301. if (ah->curchan)
  1302. old_pos = ah->curchan - &ah->channels[0];
  1303. if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
  1304. sc->sc_flags |= SC_OP_OFFCHANNEL;
  1305. else
  1306. sc->sc_flags &= ~SC_OP_OFFCHANNEL;
  1307. ath_dbg(common, CONFIG, "Set channel: %d MHz type: %d\n",
  1308. curchan->center_freq, conf->channel_type);
  1309. /* update survey stats for the old channel before switching */
  1310. spin_lock_irqsave(&common->cc_lock, flags);
  1311. ath_update_survey_stats(sc);
  1312. spin_unlock_irqrestore(&common->cc_lock, flags);
  1313. /*
  1314. * Preserve the current channel values, before updating
  1315. * the same channel
  1316. */
  1317. if (ah->curchan && (old_pos == pos))
  1318. ath9k_hw_getnf(ah, ah->curchan);
  1319. ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
  1320. curchan, conf->channel_type);
  1321. /*
  1322. * If the operating channel changes, change the survey in-use flags
  1323. * along with it.
  1324. * Reset the survey data for the new channel, unless we're switching
  1325. * back to the operating channel from an off-channel operation.
  1326. */
  1327. if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
  1328. sc->cur_survey != &sc->survey[pos]) {
  1329. if (sc->cur_survey)
  1330. sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
  1331. sc->cur_survey = &sc->survey[pos];
  1332. memset(sc->cur_survey, 0, sizeof(struct survey_info));
  1333. sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
  1334. } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
  1335. memset(&sc->survey[pos], 0, sizeof(struct survey_info));
  1336. }
  1337. if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
  1338. ath_err(common, "Unable to set channel\n");
  1339. mutex_unlock(&sc->mutex);
  1340. return -EINVAL;
  1341. }
  1342. /*
  1343. * The most recent snapshot of channel->noisefloor for the old
  1344. * channel is only available after the hardware reset. Copy it to
  1345. * the survey stats now.
  1346. */
  1347. if (old_pos >= 0)
  1348. ath_update_survey_nf(sc, old_pos);
  1349. }
  1350. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  1351. ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level);
  1352. sc->config.txpowlimit = 2 * conf->power_level;
  1353. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  1354. sc->config.txpowlimit, &sc->curtxpow);
  1355. }
  1356. mutex_unlock(&sc->mutex);
  1357. ath9k_ps_restore(sc);
  1358. return 0;
  1359. }
  1360. #define SUPPORTED_FILTERS \
  1361. (FIF_PROMISC_IN_BSS | \
  1362. FIF_ALLMULTI | \
  1363. FIF_CONTROL | \
  1364. FIF_PSPOLL | \
  1365. FIF_OTHER_BSS | \
  1366. FIF_BCN_PRBRESP_PROMISC | \
  1367. FIF_PROBE_REQ | \
  1368. FIF_FCSFAIL)
  1369. /* FIXME: sc->sc_full_reset ? */
  1370. static void ath9k_configure_filter(struct ieee80211_hw *hw,
  1371. unsigned int changed_flags,
  1372. unsigned int *total_flags,
  1373. u64 multicast)
  1374. {
  1375. struct ath_softc *sc = hw->priv;
  1376. u32 rfilt;
  1377. changed_flags &= SUPPORTED_FILTERS;
  1378. *total_flags &= SUPPORTED_FILTERS;
  1379. sc->rx.rxfilter = *total_flags;
  1380. ath9k_ps_wakeup(sc);
  1381. rfilt = ath_calcrxfilter(sc);
  1382. ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
  1383. ath9k_ps_restore(sc);
  1384. ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
  1385. rfilt);
  1386. }
  1387. static int ath9k_sta_add(struct ieee80211_hw *hw,
  1388. struct ieee80211_vif *vif,
  1389. struct ieee80211_sta *sta)
  1390. {
  1391. struct ath_softc *sc = hw->priv;
  1392. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1393. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1394. struct ieee80211_key_conf ps_key = { };
  1395. ath_node_attach(sc, sta, vif);
  1396. if (vif->type != NL80211_IFTYPE_AP &&
  1397. vif->type != NL80211_IFTYPE_AP_VLAN)
  1398. return 0;
  1399. an->ps_key = ath_key_config(common, vif, sta, &ps_key);
  1400. return 0;
  1401. }
  1402. static void ath9k_del_ps_key(struct ath_softc *sc,
  1403. struct ieee80211_vif *vif,
  1404. struct ieee80211_sta *sta)
  1405. {
  1406. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1407. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1408. struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
  1409. if (!an->ps_key)
  1410. return;
  1411. ath_key_delete(common, &ps_key);
  1412. }
  1413. static int ath9k_sta_remove(struct ieee80211_hw *hw,
  1414. struct ieee80211_vif *vif,
  1415. struct ieee80211_sta *sta)
  1416. {
  1417. struct ath_softc *sc = hw->priv;
  1418. ath9k_del_ps_key(sc, vif, sta);
  1419. ath_node_detach(sc, sta);
  1420. return 0;
  1421. }
  1422. static void ath9k_sta_notify(struct ieee80211_hw *hw,
  1423. struct ieee80211_vif *vif,
  1424. enum sta_notify_cmd cmd,
  1425. struct ieee80211_sta *sta)
  1426. {
  1427. struct ath_softc *sc = hw->priv;
  1428. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1429. if (!(sc->sc_flags & SC_OP_TXAGGR))
  1430. return;
  1431. switch (cmd) {
  1432. case STA_NOTIFY_SLEEP:
  1433. an->sleeping = true;
  1434. ath_tx_aggr_sleep(sta, sc, an);
  1435. break;
  1436. case STA_NOTIFY_AWAKE:
  1437. an->sleeping = false;
  1438. ath_tx_aggr_wakeup(sc, an);
  1439. break;
  1440. }
  1441. }
  1442. static int ath9k_conf_tx(struct ieee80211_hw *hw,
  1443. struct ieee80211_vif *vif, u16 queue,
  1444. const struct ieee80211_tx_queue_params *params)
  1445. {
  1446. struct ath_softc *sc = hw->priv;
  1447. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1448. struct ath_txq *txq;
  1449. struct ath9k_tx_queue_info qi;
  1450. int ret = 0;
  1451. if (queue >= WME_NUM_AC)
  1452. return 0;
  1453. txq = sc->tx.txq_map[queue];
  1454. ath9k_ps_wakeup(sc);
  1455. mutex_lock(&sc->mutex);
  1456. memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
  1457. qi.tqi_aifs = params->aifs;
  1458. qi.tqi_cwmin = params->cw_min;
  1459. qi.tqi_cwmax = params->cw_max;
  1460. qi.tqi_burstTime = params->txop;
  1461. ath_dbg(common, CONFIG,
  1462. "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
  1463. queue, txq->axq_qnum, params->aifs, params->cw_min,
  1464. params->cw_max, params->txop);
  1465. ret = ath_txq_update(sc, txq->axq_qnum, &qi);
  1466. if (ret)
  1467. ath_err(common, "TXQ Update failed\n");
  1468. if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
  1469. if (queue == WME_AC_BE && !ret)
  1470. ath_beaconq_config(sc);
  1471. mutex_unlock(&sc->mutex);
  1472. ath9k_ps_restore(sc);
  1473. return ret;
  1474. }
  1475. static int ath9k_set_key(struct ieee80211_hw *hw,
  1476. enum set_key_cmd cmd,
  1477. struct ieee80211_vif *vif,
  1478. struct ieee80211_sta *sta,
  1479. struct ieee80211_key_conf *key)
  1480. {
  1481. struct ath_softc *sc = hw->priv;
  1482. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1483. int ret = 0;
  1484. if (ath9k_modparam_nohwcrypt)
  1485. return -ENOSPC;
  1486. if ((vif->type == NL80211_IFTYPE_ADHOC ||
  1487. vif->type == NL80211_IFTYPE_MESH_POINT) &&
  1488. (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
  1489. key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
  1490. !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
  1491. /*
  1492. * For now, disable hw crypto for the RSN IBSS group keys. This
  1493. * could be optimized in the future to use a modified key cache
  1494. * design to support per-STA RX GTK, but until that gets
  1495. * implemented, use of software crypto for group addressed
  1496. * frames is a acceptable to allow RSN IBSS to be used.
  1497. */
  1498. return -EOPNOTSUPP;
  1499. }
  1500. mutex_lock(&sc->mutex);
  1501. ath9k_ps_wakeup(sc);
  1502. ath_dbg(common, CONFIG, "Set HW Key\n");
  1503. switch (cmd) {
  1504. case SET_KEY:
  1505. if (sta)
  1506. ath9k_del_ps_key(sc, vif, sta);
  1507. ret = ath_key_config(common, vif, sta, key);
  1508. if (ret >= 0) {
  1509. key->hw_key_idx = ret;
  1510. /* push IV and Michael MIC generation to stack */
  1511. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  1512. if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
  1513. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  1514. if (sc->sc_ah->sw_mgmt_crypto &&
  1515. key->cipher == WLAN_CIPHER_SUITE_CCMP)
  1516. key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
  1517. ret = 0;
  1518. }
  1519. break;
  1520. case DISABLE_KEY:
  1521. ath_key_delete(common, key);
  1522. break;
  1523. default:
  1524. ret = -EINVAL;
  1525. }
  1526. ath9k_ps_restore(sc);
  1527. mutex_unlock(&sc->mutex);
  1528. return ret;
  1529. }
  1530. static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
  1531. {
  1532. struct ath_softc *sc = data;
  1533. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1534. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  1535. struct ath_vif *avp = (void *)vif->drv_priv;
  1536. /*
  1537. * Skip iteration if primary station vif's bss info
  1538. * was not changed
  1539. */
  1540. if (sc->sc_flags & SC_OP_PRIM_STA_VIF)
  1541. return;
  1542. if (bss_conf->assoc) {
  1543. sc->sc_flags |= SC_OP_PRIM_STA_VIF;
  1544. avp->primary_sta_vif = true;
  1545. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1546. common->curaid = bss_conf->aid;
  1547. ath9k_hw_write_associd(sc->sc_ah);
  1548. ath_dbg(common, CONFIG, "Bss Info ASSOC %d, bssid: %pM\n",
  1549. bss_conf->aid, common->curbssid);
  1550. ath_beacon_config(sc, vif);
  1551. /*
  1552. * Request a re-configuration of Beacon related timers
  1553. * on the receipt of the first Beacon frame (i.e.,
  1554. * after time sync with the AP).
  1555. */
  1556. sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
  1557. /* Reset rssi stats */
  1558. sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
  1559. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1560. if (!common->disable_ani) {
  1561. sc->sc_flags |= SC_OP_ANI_RUN;
  1562. ath_start_ani(common);
  1563. }
  1564. }
  1565. }
  1566. static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
  1567. {
  1568. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1569. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  1570. struct ath_vif *avp = (void *)vif->drv_priv;
  1571. if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
  1572. return;
  1573. /* Reconfigure bss info */
  1574. if (avp->primary_sta_vif && !bss_conf->assoc) {
  1575. ath_dbg(common, CONFIG, "Bss Info DISASSOC %d, bssid %pM\n",
  1576. common->curaid, common->curbssid);
  1577. sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
  1578. avp->primary_sta_vif = false;
  1579. memset(common->curbssid, 0, ETH_ALEN);
  1580. common->curaid = 0;
  1581. }
  1582. ieee80211_iterate_active_interfaces_atomic(
  1583. sc->hw, ath9k_bss_iter, sc);
  1584. /*
  1585. * None of station vifs are associated.
  1586. * Clear bssid & aid
  1587. */
  1588. if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
  1589. ath9k_hw_write_associd(sc->sc_ah);
  1590. /* Stop ANI */
  1591. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1592. del_timer_sync(&common->ani.timer);
  1593. memset(&sc->caldata, 0, sizeof(sc->caldata));
  1594. }
  1595. }
  1596. static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
  1597. struct ieee80211_vif *vif,
  1598. struct ieee80211_bss_conf *bss_conf,
  1599. u32 changed)
  1600. {
  1601. struct ath_softc *sc = hw->priv;
  1602. struct ath_hw *ah = sc->sc_ah;
  1603. struct ath_common *common = ath9k_hw_common(ah);
  1604. struct ath_vif *avp = (void *)vif->drv_priv;
  1605. int slottime;
  1606. int error;
  1607. ath9k_ps_wakeup(sc);
  1608. mutex_lock(&sc->mutex);
  1609. if (changed & BSS_CHANGED_ASSOC) {
  1610. ath9k_config_bss(sc, vif);
  1611. ath_dbg(common, CONFIG, "BSSID: %pM aid: 0x%x\n",
  1612. common->curbssid, common->curaid);
  1613. }
  1614. if (changed & BSS_CHANGED_IBSS) {
  1615. /* There can be only one vif available */
  1616. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1617. common->curaid = bss_conf->aid;
  1618. ath9k_hw_write_associd(sc->sc_ah);
  1619. if (bss_conf->ibss_joined) {
  1620. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1621. if (!common->disable_ani) {
  1622. sc->sc_flags |= SC_OP_ANI_RUN;
  1623. ath_start_ani(common);
  1624. }
  1625. } else {
  1626. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1627. del_timer_sync(&common->ani.timer);
  1628. }
  1629. }
  1630. /* Enable transmission of beacons (AP, IBSS, MESH) */
  1631. if ((changed & BSS_CHANGED_BEACON) ||
  1632. ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
  1633. ath9k_set_beaconing_status(sc, false);
  1634. error = ath_beacon_alloc(sc, vif);
  1635. if (!error)
  1636. ath_beacon_config(sc, vif);
  1637. ath9k_set_beaconing_status(sc, true);
  1638. }
  1639. if (changed & BSS_CHANGED_ERP_SLOT) {
  1640. if (bss_conf->use_short_slot)
  1641. slottime = 9;
  1642. else
  1643. slottime = 20;
  1644. if (vif->type == NL80211_IFTYPE_AP) {
  1645. /*
  1646. * Defer update, so that connected stations can adjust
  1647. * their settings at the same time.
  1648. * See beacon.c for more details
  1649. */
  1650. sc->beacon.slottime = slottime;
  1651. sc->beacon.updateslot = UPDATE;
  1652. } else {
  1653. ah->slottime = slottime;
  1654. ath9k_hw_init_global_settings(ah);
  1655. }
  1656. }
  1657. /* Disable transmission of beacons */
  1658. if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
  1659. !bss_conf->enable_beacon) {
  1660. ath9k_set_beaconing_status(sc, false);
  1661. avp->is_bslot_active = false;
  1662. ath9k_set_beaconing_status(sc, true);
  1663. }
  1664. if (changed & BSS_CHANGED_BEACON_INT) {
  1665. /*
  1666. * In case of AP mode, the HW TSF has to be reset
  1667. * when the beacon interval changes.
  1668. */
  1669. if (vif->type == NL80211_IFTYPE_AP) {
  1670. sc->sc_flags |= SC_OP_TSF_RESET;
  1671. ath9k_set_beaconing_status(sc, false);
  1672. error = ath_beacon_alloc(sc, vif);
  1673. if (!error)
  1674. ath_beacon_config(sc, vif);
  1675. ath9k_set_beaconing_status(sc, true);
  1676. } else
  1677. ath_beacon_config(sc, vif);
  1678. }
  1679. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  1680. ath_dbg(common, CONFIG, "BSS Changed PREAMBLE %d\n",
  1681. bss_conf->use_short_preamble);
  1682. if (bss_conf->use_short_preamble)
  1683. sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
  1684. else
  1685. sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
  1686. }
  1687. if (changed & BSS_CHANGED_ERP_CTS_PROT) {
  1688. ath_dbg(common, CONFIG, "BSS Changed CTS PROT %d\n",
  1689. bss_conf->use_cts_prot);
  1690. if (bss_conf->use_cts_prot &&
  1691. hw->conf.channel->band != IEEE80211_BAND_5GHZ)
  1692. sc->sc_flags |= SC_OP_PROTECT_ENABLE;
  1693. else
  1694. sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
  1695. }
  1696. mutex_unlock(&sc->mutex);
  1697. ath9k_ps_restore(sc);
  1698. }
  1699. static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  1700. {
  1701. struct ath_softc *sc = hw->priv;
  1702. u64 tsf;
  1703. mutex_lock(&sc->mutex);
  1704. ath9k_ps_wakeup(sc);
  1705. tsf = ath9k_hw_gettsf64(sc->sc_ah);
  1706. ath9k_ps_restore(sc);
  1707. mutex_unlock(&sc->mutex);
  1708. return tsf;
  1709. }
  1710. static void ath9k_set_tsf(struct ieee80211_hw *hw,
  1711. struct ieee80211_vif *vif,
  1712. u64 tsf)
  1713. {
  1714. struct ath_softc *sc = hw->priv;
  1715. mutex_lock(&sc->mutex);
  1716. ath9k_ps_wakeup(sc);
  1717. ath9k_hw_settsf64(sc->sc_ah, tsf);
  1718. ath9k_ps_restore(sc);
  1719. mutex_unlock(&sc->mutex);
  1720. }
  1721. static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  1722. {
  1723. struct ath_softc *sc = hw->priv;
  1724. mutex_lock(&sc->mutex);
  1725. ath9k_ps_wakeup(sc);
  1726. ath9k_hw_reset_tsf(sc->sc_ah);
  1727. ath9k_ps_restore(sc);
  1728. mutex_unlock(&sc->mutex);
  1729. }
  1730. static int ath9k_ampdu_action(struct ieee80211_hw *hw,
  1731. struct ieee80211_vif *vif,
  1732. enum ieee80211_ampdu_mlme_action action,
  1733. struct ieee80211_sta *sta,
  1734. u16 tid, u16 *ssn, u8 buf_size)
  1735. {
  1736. struct ath_softc *sc = hw->priv;
  1737. int ret = 0;
  1738. local_bh_disable();
  1739. switch (action) {
  1740. case IEEE80211_AMPDU_RX_START:
  1741. if (!(sc->sc_flags & SC_OP_RXAGGR))
  1742. ret = -ENOTSUPP;
  1743. break;
  1744. case IEEE80211_AMPDU_RX_STOP:
  1745. break;
  1746. case IEEE80211_AMPDU_TX_START:
  1747. if (!(sc->sc_flags & SC_OP_TXAGGR))
  1748. return -EOPNOTSUPP;
  1749. ath9k_ps_wakeup(sc);
  1750. ret = ath_tx_aggr_start(sc, sta, tid, ssn);
  1751. if (!ret)
  1752. ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1753. ath9k_ps_restore(sc);
  1754. break;
  1755. case IEEE80211_AMPDU_TX_STOP:
  1756. ath9k_ps_wakeup(sc);
  1757. ath_tx_aggr_stop(sc, sta, tid);
  1758. ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1759. ath9k_ps_restore(sc);
  1760. break;
  1761. case IEEE80211_AMPDU_TX_OPERATIONAL:
  1762. ath9k_ps_wakeup(sc);
  1763. ath_tx_aggr_resume(sc, sta, tid);
  1764. ath9k_ps_restore(sc);
  1765. break;
  1766. default:
  1767. ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
  1768. }
  1769. local_bh_enable();
  1770. return ret;
  1771. }
  1772. static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
  1773. struct survey_info *survey)
  1774. {
  1775. struct ath_softc *sc = hw->priv;
  1776. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1777. struct ieee80211_supported_band *sband;
  1778. struct ieee80211_channel *chan;
  1779. unsigned long flags;
  1780. int pos;
  1781. spin_lock_irqsave(&common->cc_lock, flags);
  1782. if (idx == 0)
  1783. ath_update_survey_stats(sc);
  1784. sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
  1785. if (sband && idx >= sband->n_channels) {
  1786. idx -= sband->n_channels;
  1787. sband = NULL;
  1788. }
  1789. if (!sband)
  1790. sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
  1791. if (!sband || idx >= sband->n_channels) {
  1792. spin_unlock_irqrestore(&common->cc_lock, flags);
  1793. return -ENOENT;
  1794. }
  1795. chan = &sband->channels[idx];
  1796. pos = chan->hw_value;
  1797. memcpy(survey, &sc->survey[pos], sizeof(*survey));
  1798. survey->channel = chan;
  1799. spin_unlock_irqrestore(&common->cc_lock, flags);
  1800. return 0;
  1801. }
  1802. static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
  1803. {
  1804. struct ath_softc *sc = hw->priv;
  1805. struct ath_hw *ah = sc->sc_ah;
  1806. mutex_lock(&sc->mutex);
  1807. ah->coverage_class = coverage_class;
  1808. ath9k_ps_wakeup(sc);
  1809. ath9k_hw_init_global_settings(ah);
  1810. ath9k_ps_restore(sc);
  1811. mutex_unlock(&sc->mutex);
  1812. }
  1813. static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
  1814. {
  1815. struct ath_softc *sc = hw->priv;
  1816. struct ath_hw *ah = sc->sc_ah;
  1817. struct ath_common *common = ath9k_hw_common(ah);
  1818. int timeout = 200; /* ms */
  1819. int i, j;
  1820. bool drain_txq;
  1821. mutex_lock(&sc->mutex);
  1822. cancel_delayed_work_sync(&sc->tx_complete_work);
  1823. if (ah->ah_flags & AH_UNPLUGGED) {
  1824. ath_dbg(common, ANY, "Device has been unplugged!\n");
  1825. mutex_unlock(&sc->mutex);
  1826. return;
  1827. }
  1828. if (sc->sc_flags & SC_OP_INVALID) {
  1829. ath_dbg(common, ANY, "Device not present\n");
  1830. mutex_unlock(&sc->mutex);
  1831. return;
  1832. }
  1833. for (j = 0; j < timeout; j++) {
  1834. bool npend = false;
  1835. if (j)
  1836. usleep_range(1000, 2000);
  1837. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  1838. if (!ATH_TXQ_SETUP(sc, i))
  1839. continue;
  1840. npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
  1841. if (npend)
  1842. break;
  1843. }
  1844. if (!npend)
  1845. break;
  1846. }
  1847. if (drop) {
  1848. ath9k_ps_wakeup(sc);
  1849. spin_lock_bh(&sc->sc_pcu_lock);
  1850. drain_txq = ath_drain_all_txq(sc, false);
  1851. spin_unlock_bh(&sc->sc_pcu_lock);
  1852. if (!drain_txq)
  1853. ath_reset(sc, false);
  1854. ath9k_ps_restore(sc);
  1855. ieee80211_wake_queues(hw);
  1856. }
  1857. ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
  1858. mutex_unlock(&sc->mutex);
  1859. }
  1860. static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
  1861. {
  1862. struct ath_softc *sc = hw->priv;
  1863. int i;
  1864. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  1865. if (!ATH_TXQ_SETUP(sc, i))
  1866. continue;
  1867. if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
  1868. return true;
  1869. }
  1870. return false;
  1871. }
  1872. static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
  1873. {
  1874. struct ath_softc *sc = hw->priv;
  1875. struct ath_hw *ah = sc->sc_ah;
  1876. struct ieee80211_vif *vif;
  1877. struct ath_vif *avp;
  1878. struct ath_buf *bf;
  1879. struct ath_tx_status ts;
  1880. bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
  1881. int status;
  1882. vif = sc->beacon.bslot[0];
  1883. if (!vif)
  1884. return 0;
  1885. avp = (void *)vif->drv_priv;
  1886. if (!avp->is_bslot_active)
  1887. return 0;
  1888. if (!sc->beacon.tx_processed && !edma) {
  1889. tasklet_disable(&sc->bcon_tasklet);
  1890. bf = avp->av_bcbuf;
  1891. if (!bf || !bf->bf_mpdu)
  1892. goto skip;
  1893. status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
  1894. if (status == -EINPROGRESS)
  1895. goto skip;
  1896. sc->beacon.tx_processed = true;
  1897. sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
  1898. skip:
  1899. tasklet_enable(&sc->bcon_tasklet);
  1900. }
  1901. return sc->beacon.tx_last;
  1902. }
  1903. static int ath9k_get_stats(struct ieee80211_hw *hw,
  1904. struct ieee80211_low_level_stats *stats)
  1905. {
  1906. struct ath_softc *sc = hw->priv;
  1907. struct ath_hw *ah = sc->sc_ah;
  1908. struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
  1909. stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
  1910. stats->dot11RTSFailureCount = mib_stats->rts_bad;
  1911. stats->dot11FCSErrorCount = mib_stats->fcs_bad;
  1912. stats->dot11RTSSuccessCount = mib_stats->rts_good;
  1913. return 0;
  1914. }
  1915. static u32 fill_chainmask(u32 cap, u32 new)
  1916. {
  1917. u32 filled = 0;
  1918. int i;
  1919. for (i = 0; cap && new; i++, cap >>= 1) {
  1920. if (!(cap & BIT(0)))
  1921. continue;
  1922. if (new & BIT(0))
  1923. filled |= BIT(i);
  1924. new >>= 1;
  1925. }
  1926. return filled;
  1927. }
  1928. static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
  1929. {
  1930. struct ath_softc *sc = hw->priv;
  1931. struct ath_hw *ah = sc->sc_ah;
  1932. if (!rx_ant || !tx_ant)
  1933. return -EINVAL;
  1934. sc->ant_rx = rx_ant;
  1935. sc->ant_tx = tx_ant;
  1936. if (ah->caps.rx_chainmask == 1)
  1937. return 0;
  1938. /* AR9100 runs into calibration issues if not all rx chains are enabled */
  1939. if (AR_SREV_9100(ah))
  1940. ah->rxchainmask = 0x7;
  1941. else
  1942. ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
  1943. ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
  1944. ath9k_reload_chainmask_settings(sc);
  1945. return 0;
  1946. }
  1947. static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
  1948. {
  1949. struct ath_softc *sc = hw->priv;
  1950. *tx_ant = sc->ant_tx;
  1951. *rx_ant = sc->ant_rx;
  1952. return 0;
  1953. }
  1954. struct ieee80211_ops ath9k_ops = {
  1955. .tx = ath9k_tx,
  1956. .start = ath9k_start,
  1957. .stop = ath9k_stop,
  1958. .add_interface = ath9k_add_interface,
  1959. .change_interface = ath9k_change_interface,
  1960. .remove_interface = ath9k_remove_interface,
  1961. .config = ath9k_config,
  1962. .configure_filter = ath9k_configure_filter,
  1963. .sta_add = ath9k_sta_add,
  1964. .sta_remove = ath9k_sta_remove,
  1965. .sta_notify = ath9k_sta_notify,
  1966. .conf_tx = ath9k_conf_tx,
  1967. .bss_info_changed = ath9k_bss_info_changed,
  1968. .set_key = ath9k_set_key,
  1969. .get_tsf = ath9k_get_tsf,
  1970. .set_tsf = ath9k_set_tsf,
  1971. .reset_tsf = ath9k_reset_tsf,
  1972. .ampdu_action = ath9k_ampdu_action,
  1973. .get_survey = ath9k_get_survey,
  1974. .rfkill_poll = ath9k_rfkill_poll_state,
  1975. .set_coverage_class = ath9k_set_coverage_class,
  1976. .flush = ath9k_flush,
  1977. .tx_frames_pending = ath9k_tx_frames_pending,
  1978. .tx_last_beacon = ath9k_tx_last_beacon,
  1979. .get_stats = ath9k_get_stats,
  1980. .set_antenna = ath9k_set_antenna,
  1981. .get_antenna = ath9k_get_antenna,
  1982. };