coherency_ll.S 1.3 KB

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  1. /*
  2. * Coherency fabric: low level functions
  3. *
  4. * Copyright (C) 2012 Marvell
  5. *
  6. * Gregory CLEMENT <gregory.clement@free-electrons.com>
  7. *
  8. * This file is licensed under the terms of the GNU General Public
  9. * License version 2. This program is licensed "as is" without any
  10. * warranty of any kind, whether express or implied.
  11. *
  12. * This file implements the assembly function to add a CPU to the
  13. * coherency fabric. This function is called by each of the secondary
  14. * CPUs during their early boot in an SMP kernel, this why this
  15. * function have to callable from assembly. It can also be called by a
  16. * primary CPU from C code during its boot.
  17. */
  18. #include <linux/linkage.h>
  19. #define ARMADA_XP_CFB_CTL_REG_OFFSET 0x0
  20. #define ARMADA_XP_CFB_CFG_REG_OFFSET 0x4
  21. #include <asm/assembler.h>
  22. .text
  23. /*
  24. * r0: Coherency fabric base register address
  25. * r1: HW CPU id
  26. */
  27. ENTRY(ll_set_cpu_coherent)
  28. /* Create bit by cpu index */
  29. mov r3, #(1 << 24)
  30. lsl r1, r3, r1
  31. ARM_BE8(rev r1, r1)
  32. /* Add CPU to SMP group - Atomic */
  33. add r3, r0, #ARMADA_XP_CFB_CTL_REG_OFFSET
  34. 1:
  35. ldrex r2, [r3]
  36. orr r2, r2, r1
  37. strex r0, r2, [r3]
  38. cmp r0, #0
  39. bne 1b
  40. /* Enable coherency on CPU - Atomic */
  41. add r3, r3, #ARMADA_XP_CFB_CFG_REG_OFFSET
  42. 1:
  43. ldrex r2, [r3]
  44. orr r2, r2, r1
  45. strex r0, r2, [r3]
  46. cmp r0, #0
  47. bne 1b
  48. dsb
  49. mov r0, #0
  50. mov pc, lr
  51. ENDPROC(ll_set_cpu_coherent)