fimc-capture.c 50 KB

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  1. /*
  2. * Samsung S5P/EXYNOS4 SoC series camera interface (camera capture) driver
  3. *
  4. * Copyright (C) 2010 - 2012 Samsung Electronics Co., Ltd.
  5. * Sylwester Nawrocki <s.nawrocki@samsung.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/types.h>
  14. #include <linux/errno.h>
  15. #include <linux/bug.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/device.h>
  18. #include <linux/pm_runtime.h>
  19. #include <linux/list.h>
  20. #include <linux/slab.h>
  21. #include <linux/videodev2.h>
  22. #include <media/v4l2-device.h>
  23. #include <media/v4l2-ioctl.h>
  24. #include <media/v4l2-mem2mem.h>
  25. #include <media/videobuf2-core.h>
  26. #include <media/videobuf2-dma-contig.h>
  27. #include "media-dev.h"
  28. #include "fimc-core.h"
  29. #include "fimc-reg.h"
  30. static int fimc_capture_hw_init(struct fimc_dev *fimc)
  31. {
  32. struct fimc_source_info *si = &fimc->vid_cap.source_config;
  33. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  34. int ret;
  35. unsigned long flags;
  36. if (ctx == NULL || ctx->s_frame.fmt == NULL)
  37. return -EINVAL;
  38. if (si->fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK) {
  39. ret = fimc_hw_camblk_cfg_writeback(fimc);
  40. if (ret < 0)
  41. return ret;
  42. }
  43. spin_lock_irqsave(&fimc->slock, flags);
  44. fimc_prepare_dma_offset(ctx, &ctx->d_frame);
  45. fimc_set_yuv_order(ctx);
  46. fimc_hw_set_camera_polarity(fimc, si);
  47. fimc_hw_set_camera_type(fimc, si);
  48. fimc_hw_set_camera_source(fimc, si);
  49. fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
  50. ret = fimc_set_scaler_info(ctx);
  51. if (!ret) {
  52. fimc_hw_set_input_path(ctx);
  53. fimc_hw_set_prescaler(ctx);
  54. fimc_hw_set_mainscaler(ctx);
  55. fimc_hw_set_target_format(ctx);
  56. fimc_hw_set_rotation(ctx);
  57. fimc_hw_set_effect(ctx);
  58. fimc_hw_set_output_path(ctx);
  59. fimc_hw_set_out_dma(ctx);
  60. if (fimc->drv_data->alpha_color)
  61. fimc_hw_set_rgb_alpha(ctx);
  62. clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  63. }
  64. spin_unlock_irqrestore(&fimc->slock, flags);
  65. return ret;
  66. }
  67. /*
  68. * Reinitialize the driver so it is ready to start the streaming again.
  69. * Set fimc->state to indicate stream off and the hardware shut down state.
  70. * If not suspending (@suspend is false), return any buffers to videobuf2.
  71. * Otherwise put any owned buffers onto the pending buffers queue, so they
  72. * can be re-spun when the device is being resumed. Also perform FIMC
  73. * software reset and disable streaming on the whole pipeline if required.
  74. */
  75. static int fimc_capture_state_cleanup(struct fimc_dev *fimc, bool suspend)
  76. {
  77. struct fimc_vid_cap *cap = &fimc->vid_cap;
  78. struct fimc_vid_buffer *buf;
  79. unsigned long flags;
  80. bool streaming;
  81. spin_lock_irqsave(&fimc->slock, flags);
  82. streaming = fimc->state & (1 << ST_CAPT_ISP_STREAM);
  83. fimc->state &= ~(1 << ST_CAPT_RUN | 1 << ST_CAPT_SHUT |
  84. 1 << ST_CAPT_STREAM | 1 << ST_CAPT_ISP_STREAM);
  85. if (suspend)
  86. fimc->state |= (1 << ST_CAPT_SUSPENDED);
  87. else
  88. fimc->state &= ~(1 << ST_CAPT_PEND | 1 << ST_CAPT_SUSPENDED);
  89. /* Release unused buffers */
  90. while (!suspend && !list_empty(&cap->pending_buf_q)) {
  91. buf = fimc_pending_queue_pop(cap);
  92. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  93. }
  94. /* If suspending put unused buffers onto pending queue */
  95. while (!list_empty(&cap->active_buf_q)) {
  96. buf = fimc_active_queue_pop(cap);
  97. if (suspend)
  98. fimc_pending_queue_add(cap, buf);
  99. else
  100. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  101. }
  102. fimc_hw_reset(fimc);
  103. cap->buf_index = 0;
  104. spin_unlock_irqrestore(&fimc->slock, flags);
  105. if (streaming)
  106. return fimc_pipeline_call(fimc, set_stream,
  107. &fimc->pipeline, 0);
  108. else
  109. return 0;
  110. }
  111. static int fimc_stop_capture(struct fimc_dev *fimc, bool suspend)
  112. {
  113. unsigned long flags;
  114. if (!fimc_capture_active(fimc))
  115. return 0;
  116. spin_lock_irqsave(&fimc->slock, flags);
  117. set_bit(ST_CAPT_SHUT, &fimc->state);
  118. fimc_deactivate_capture(fimc);
  119. spin_unlock_irqrestore(&fimc->slock, flags);
  120. wait_event_timeout(fimc->irq_queue,
  121. !test_bit(ST_CAPT_SHUT, &fimc->state),
  122. (2*HZ/10)); /* 200 ms */
  123. return fimc_capture_state_cleanup(fimc, suspend);
  124. }
  125. /**
  126. * fimc_capture_config_update - apply the camera interface configuration
  127. *
  128. * To be called from within the interrupt handler with fimc.slock
  129. * spinlock held. It updates the camera pixel crop, rotation and
  130. * image flip in H/W.
  131. */
  132. static int fimc_capture_config_update(struct fimc_ctx *ctx)
  133. {
  134. struct fimc_dev *fimc = ctx->fimc_dev;
  135. int ret;
  136. fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
  137. ret = fimc_set_scaler_info(ctx);
  138. if (ret)
  139. return ret;
  140. fimc_hw_set_prescaler(ctx);
  141. fimc_hw_set_mainscaler(ctx);
  142. fimc_hw_set_target_format(ctx);
  143. fimc_hw_set_rotation(ctx);
  144. fimc_hw_set_effect(ctx);
  145. fimc_prepare_dma_offset(ctx, &ctx->d_frame);
  146. fimc_hw_set_out_dma(ctx);
  147. if (fimc->drv_data->alpha_color)
  148. fimc_hw_set_rgb_alpha(ctx);
  149. clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  150. return ret;
  151. }
  152. void fimc_capture_irq_handler(struct fimc_dev *fimc, int deq_buf)
  153. {
  154. struct v4l2_subdev *csis = fimc->pipeline.subdevs[IDX_CSIS];
  155. struct fimc_vid_cap *cap = &fimc->vid_cap;
  156. struct fimc_frame *f = &cap->ctx->d_frame;
  157. struct fimc_vid_buffer *v_buf;
  158. struct timeval *tv;
  159. struct timespec ts;
  160. if (test_and_clear_bit(ST_CAPT_SHUT, &fimc->state)) {
  161. wake_up(&fimc->irq_queue);
  162. goto done;
  163. }
  164. if (!list_empty(&cap->active_buf_q) &&
  165. test_bit(ST_CAPT_RUN, &fimc->state) && deq_buf) {
  166. ktime_get_real_ts(&ts);
  167. v_buf = fimc_active_queue_pop(cap);
  168. tv = &v_buf->vb.v4l2_buf.timestamp;
  169. tv->tv_sec = ts.tv_sec;
  170. tv->tv_usec = ts.tv_nsec / NSEC_PER_USEC;
  171. v_buf->vb.v4l2_buf.sequence = cap->frame_count++;
  172. vb2_buffer_done(&v_buf->vb, VB2_BUF_STATE_DONE);
  173. }
  174. if (!list_empty(&cap->pending_buf_q)) {
  175. v_buf = fimc_pending_queue_pop(cap);
  176. fimc_hw_set_output_addr(fimc, &v_buf->paddr, cap->buf_index);
  177. v_buf->index = cap->buf_index;
  178. /* Move the buffer to the capture active queue */
  179. fimc_active_queue_add(cap, v_buf);
  180. dbg("next frame: %d, done frame: %d",
  181. fimc_hw_get_frame_index(fimc), v_buf->index);
  182. if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
  183. cap->buf_index = 0;
  184. }
  185. /*
  186. * Set up a buffer at MIPI-CSIS if current image format
  187. * requires the frame embedded data capture.
  188. */
  189. if (f->fmt->mdataplanes && !list_empty(&cap->active_buf_q)) {
  190. unsigned int plane = ffs(f->fmt->mdataplanes) - 1;
  191. unsigned int size = f->payload[plane];
  192. s32 index = fimc_hw_get_frame_index(fimc);
  193. void *vaddr;
  194. list_for_each_entry(v_buf, &cap->active_buf_q, list) {
  195. if (v_buf->index != index)
  196. continue;
  197. vaddr = vb2_plane_vaddr(&v_buf->vb, plane);
  198. v4l2_subdev_call(csis, video, s_rx_buffer,
  199. vaddr, &size);
  200. break;
  201. }
  202. }
  203. if (cap->active_buf_cnt == 0) {
  204. if (deq_buf)
  205. clear_bit(ST_CAPT_RUN, &fimc->state);
  206. if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
  207. cap->buf_index = 0;
  208. } else {
  209. set_bit(ST_CAPT_RUN, &fimc->state);
  210. }
  211. if (test_bit(ST_CAPT_APPLY_CFG, &fimc->state))
  212. fimc_capture_config_update(cap->ctx);
  213. done:
  214. if (cap->active_buf_cnt == 1) {
  215. fimc_deactivate_capture(fimc);
  216. clear_bit(ST_CAPT_STREAM, &fimc->state);
  217. }
  218. dbg("frame: %d, active_buf_cnt: %d",
  219. fimc_hw_get_frame_index(fimc), cap->active_buf_cnt);
  220. }
  221. static int start_streaming(struct vb2_queue *q, unsigned int count)
  222. {
  223. struct fimc_ctx *ctx = q->drv_priv;
  224. struct fimc_dev *fimc = ctx->fimc_dev;
  225. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  226. int min_bufs;
  227. int ret;
  228. vid_cap->frame_count = 0;
  229. ret = fimc_capture_hw_init(fimc);
  230. if (ret) {
  231. fimc_capture_state_cleanup(fimc, false);
  232. return ret;
  233. }
  234. set_bit(ST_CAPT_PEND, &fimc->state);
  235. min_bufs = fimc->vid_cap.reqbufs_count > 1 ? 2 : 1;
  236. if (vid_cap->active_buf_cnt >= min_bufs &&
  237. !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
  238. fimc_activate_capture(ctx);
  239. if (!test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
  240. return fimc_pipeline_call(fimc, set_stream,
  241. &fimc->pipeline, 1);
  242. }
  243. return 0;
  244. }
  245. static int stop_streaming(struct vb2_queue *q)
  246. {
  247. struct fimc_ctx *ctx = q->drv_priv;
  248. struct fimc_dev *fimc = ctx->fimc_dev;
  249. if (!fimc_capture_active(fimc))
  250. return -EINVAL;
  251. return fimc_stop_capture(fimc, false);
  252. }
  253. int fimc_capture_suspend(struct fimc_dev *fimc)
  254. {
  255. bool suspend = fimc_capture_busy(fimc);
  256. int ret = fimc_stop_capture(fimc, suspend);
  257. if (ret)
  258. return ret;
  259. return fimc_pipeline_call(fimc, close, &fimc->pipeline);
  260. }
  261. static void buffer_queue(struct vb2_buffer *vb);
  262. int fimc_capture_resume(struct fimc_dev *fimc)
  263. {
  264. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  265. struct exynos_video_entity *ve = &vid_cap->ve;
  266. struct fimc_vid_buffer *buf;
  267. int i;
  268. if (!test_and_clear_bit(ST_CAPT_SUSPENDED, &fimc->state))
  269. return 0;
  270. INIT_LIST_HEAD(&fimc->vid_cap.active_buf_q);
  271. vid_cap->buf_index = 0;
  272. fimc_pipeline_call(fimc, open, &fimc->pipeline,
  273. &ve->vdev.entity, false);
  274. fimc_capture_hw_init(fimc);
  275. clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
  276. for (i = 0; i < vid_cap->reqbufs_count; i++) {
  277. if (list_empty(&vid_cap->pending_buf_q))
  278. break;
  279. buf = fimc_pending_queue_pop(vid_cap);
  280. buffer_queue(&buf->vb);
  281. }
  282. return 0;
  283. }
  284. static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *pfmt,
  285. unsigned int *num_buffers, unsigned int *num_planes,
  286. unsigned int sizes[], void *allocators[])
  287. {
  288. const struct v4l2_pix_format_mplane *pixm = NULL;
  289. struct fimc_ctx *ctx = vq->drv_priv;
  290. struct fimc_frame *frame = &ctx->d_frame;
  291. struct fimc_fmt *fmt = frame->fmt;
  292. unsigned long wh;
  293. int i;
  294. if (pfmt) {
  295. pixm = &pfmt->fmt.pix_mp;
  296. fmt = fimc_find_format(&pixm->pixelformat, NULL,
  297. FMT_FLAGS_CAM | FMT_FLAGS_M2M, -1);
  298. wh = pixm->width * pixm->height;
  299. } else {
  300. wh = frame->f_width * frame->f_height;
  301. }
  302. if (fmt == NULL)
  303. return -EINVAL;
  304. *num_planes = fmt->memplanes;
  305. for (i = 0; i < fmt->memplanes; i++) {
  306. unsigned int size = (wh * fmt->depth[i]) / 8;
  307. if (pixm)
  308. sizes[i] = max(size, pixm->plane_fmt[i].sizeimage);
  309. else if (fimc_fmt_is_user_defined(fmt->color))
  310. sizes[i] = frame->payload[i];
  311. else
  312. sizes[i] = max_t(u32, size, frame->payload[i]);
  313. allocators[i] = ctx->fimc_dev->alloc_ctx;
  314. }
  315. return 0;
  316. }
  317. static int buffer_prepare(struct vb2_buffer *vb)
  318. {
  319. struct vb2_queue *vq = vb->vb2_queue;
  320. struct fimc_ctx *ctx = vq->drv_priv;
  321. int i;
  322. if (ctx->d_frame.fmt == NULL)
  323. return -EINVAL;
  324. for (i = 0; i < ctx->d_frame.fmt->memplanes; i++) {
  325. unsigned long size = ctx->d_frame.payload[i];
  326. if (vb2_plane_size(vb, i) < size) {
  327. v4l2_err(&ctx->fimc_dev->vid_cap.ve.vdev,
  328. "User buffer too small (%ld < %ld)\n",
  329. vb2_plane_size(vb, i), size);
  330. return -EINVAL;
  331. }
  332. vb2_set_plane_payload(vb, i, size);
  333. }
  334. return 0;
  335. }
  336. static void buffer_queue(struct vb2_buffer *vb)
  337. {
  338. struct fimc_vid_buffer *buf
  339. = container_of(vb, struct fimc_vid_buffer, vb);
  340. struct fimc_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
  341. struct fimc_dev *fimc = ctx->fimc_dev;
  342. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  343. struct exynos_video_entity *ve = &vid_cap->ve;
  344. unsigned long flags;
  345. int min_bufs;
  346. spin_lock_irqsave(&fimc->slock, flags);
  347. fimc_prepare_addr(ctx, &buf->vb, &ctx->d_frame, &buf->paddr);
  348. if (!test_bit(ST_CAPT_SUSPENDED, &fimc->state) &&
  349. !test_bit(ST_CAPT_STREAM, &fimc->state) &&
  350. vid_cap->active_buf_cnt < FIMC_MAX_OUT_BUFS) {
  351. /* Setup the buffer directly for processing. */
  352. int buf_id = (vid_cap->reqbufs_count == 1) ? -1 :
  353. vid_cap->buf_index;
  354. fimc_hw_set_output_addr(fimc, &buf->paddr, buf_id);
  355. buf->index = vid_cap->buf_index;
  356. fimc_active_queue_add(vid_cap, buf);
  357. if (++vid_cap->buf_index >= FIMC_MAX_OUT_BUFS)
  358. vid_cap->buf_index = 0;
  359. } else {
  360. fimc_pending_queue_add(vid_cap, buf);
  361. }
  362. min_bufs = vid_cap->reqbufs_count > 1 ? 2 : 1;
  363. if (vb2_is_streaming(&vid_cap->vbq) &&
  364. vid_cap->active_buf_cnt >= min_bufs &&
  365. !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
  366. int ret;
  367. fimc_activate_capture(ctx);
  368. spin_unlock_irqrestore(&fimc->slock, flags);
  369. if (test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
  370. return;
  371. ret = fimc_pipeline_call(fimc, set_stream, &fimc->pipeline, 1);
  372. if (ret < 0)
  373. v4l2_err(&ve->vdev, "stream on failed: %d\n", ret);
  374. return;
  375. }
  376. spin_unlock_irqrestore(&fimc->slock, flags);
  377. }
  378. static struct vb2_ops fimc_capture_qops = {
  379. .queue_setup = queue_setup,
  380. .buf_prepare = buffer_prepare,
  381. .buf_queue = buffer_queue,
  382. .wait_prepare = vb2_ops_wait_prepare,
  383. .wait_finish = vb2_ops_wait_finish,
  384. .start_streaming = start_streaming,
  385. .stop_streaming = stop_streaming,
  386. };
  387. /**
  388. * fimc_capture_ctrls_create - initialize the control handler
  389. * Initialize the capture video node control handler and fill it
  390. * with the FIMC controls. Inherit any sensor's controls if the
  391. * 'user_subdev_api' flag is false (default behaviour).
  392. * This function need to be called with the graph mutex held.
  393. */
  394. int fimc_capture_ctrls_create(struct fimc_dev *fimc)
  395. {
  396. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  397. struct v4l2_subdev *sensor = fimc->pipeline.subdevs[IDX_SENSOR];
  398. int ret;
  399. if (WARN_ON(vid_cap->ctx == NULL))
  400. return -ENXIO;
  401. if (vid_cap->ctx->ctrls.ready)
  402. return 0;
  403. ret = fimc_ctrls_create(vid_cap->ctx);
  404. if (ret || vid_cap->user_subdev_api || !sensor ||
  405. !vid_cap->ctx->ctrls.ready)
  406. return ret;
  407. return v4l2_ctrl_add_handler(&vid_cap->ctx->ctrls.handler,
  408. sensor->ctrl_handler, NULL);
  409. }
  410. static int fimc_capture_set_default_format(struct fimc_dev *fimc);
  411. static int fimc_capture_open(struct file *file)
  412. {
  413. struct fimc_dev *fimc = video_drvdata(file);
  414. struct exynos_video_entity *ve = &fimc->vid_cap.ve;
  415. int ret = -EBUSY;
  416. dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
  417. fimc_md_graph_lock(ve);
  418. mutex_lock(&fimc->lock);
  419. if (fimc_m2m_active(fimc))
  420. goto unlock;
  421. set_bit(ST_CAPT_BUSY, &fimc->state);
  422. ret = pm_runtime_get_sync(&fimc->pdev->dev);
  423. if (ret < 0)
  424. goto unlock;
  425. ret = v4l2_fh_open(file);
  426. if (ret) {
  427. pm_runtime_put(&fimc->pdev->dev);
  428. goto unlock;
  429. }
  430. if (v4l2_fh_is_singular_file(file)) {
  431. ret = fimc_pipeline_call(fimc, open, &fimc->pipeline,
  432. &fimc->vid_cap.ve.vdev.entity, true);
  433. if (!ret && !fimc->vid_cap.user_subdev_api)
  434. ret = fimc_capture_set_default_format(fimc);
  435. if (!ret)
  436. ret = fimc_capture_ctrls_create(fimc);
  437. if (ret < 0) {
  438. clear_bit(ST_CAPT_BUSY, &fimc->state);
  439. pm_runtime_put_sync(&fimc->pdev->dev);
  440. v4l2_fh_release(file);
  441. } else {
  442. fimc->vid_cap.refcnt++;
  443. }
  444. }
  445. unlock:
  446. mutex_unlock(&fimc->lock);
  447. fimc_md_graph_unlock(ve);
  448. return ret;
  449. }
  450. static int fimc_capture_release(struct file *file)
  451. {
  452. struct fimc_dev *fimc = video_drvdata(file);
  453. struct fimc_vid_cap *vc = &fimc->vid_cap;
  454. int ret;
  455. dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
  456. mutex_lock(&fimc->lock);
  457. if (v4l2_fh_is_singular_file(file)) {
  458. if (vc->streaming) {
  459. media_entity_pipeline_stop(&vc->ve.vdev.entity);
  460. vc->streaming = false;
  461. }
  462. clear_bit(ST_CAPT_BUSY, &fimc->state);
  463. fimc_stop_capture(fimc, false);
  464. fimc_pipeline_call(fimc, close, &fimc->pipeline);
  465. clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
  466. fimc->vid_cap.refcnt--;
  467. }
  468. pm_runtime_put(&fimc->pdev->dev);
  469. if (v4l2_fh_is_singular_file(file))
  470. fimc_ctrls_delete(fimc->vid_cap.ctx);
  471. ret = vb2_fop_release(file);
  472. mutex_unlock(&fimc->lock);
  473. return ret;
  474. }
  475. static const struct v4l2_file_operations fimc_capture_fops = {
  476. .owner = THIS_MODULE,
  477. .open = fimc_capture_open,
  478. .release = fimc_capture_release,
  479. .poll = vb2_fop_poll,
  480. .unlocked_ioctl = video_ioctl2,
  481. .mmap = vb2_fop_mmap,
  482. };
  483. /*
  484. * Format and crop negotiation helpers
  485. */
  486. static struct fimc_fmt *fimc_capture_try_format(struct fimc_ctx *ctx,
  487. u32 *width, u32 *height,
  488. u32 *code, u32 *fourcc, int pad)
  489. {
  490. bool rotation = ctx->rotation == 90 || ctx->rotation == 270;
  491. struct fimc_dev *fimc = ctx->fimc_dev;
  492. const struct fimc_variant *var = fimc->variant;
  493. const struct fimc_pix_limit *pl = var->pix_limit;
  494. struct fimc_frame *dst = &ctx->d_frame;
  495. u32 depth, min_w, max_w, min_h, align_h = 3;
  496. u32 mask = FMT_FLAGS_CAM;
  497. struct fimc_fmt *ffmt;
  498. /* Conversion from/to JPEG or User Defined format is not supported */
  499. if (code && ctx->s_frame.fmt && pad == FIMC_SD_PAD_SOURCE &&
  500. fimc_fmt_is_user_defined(ctx->s_frame.fmt->color))
  501. *code = ctx->s_frame.fmt->mbus_code;
  502. if (fourcc && *fourcc != V4L2_PIX_FMT_JPEG && pad == FIMC_SD_PAD_SOURCE)
  503. mask |= FMT_FLAGS_M2M;
  504. if (pad == FIMC_SD_PAD_SINK_FIFO)
  505. mask = FMT_FLAGS_WRITEBACK;
  506. ffmt = fimc_find_format(fourcc, code, mask, 0);
  507. if (WARN_ON(!ffmt))
  508. return NULL;
  509. if (code)
  510. *code = ffmt->mbus_code;
  511. if (fourcc)
  512. *fourcc = ffmt->fourcc;
  513. if (pad != FIMC_SD_PAD_SOURCE) {
  514. max_w = fimc_fmt_is_user_defined(ffmt->color) ?
  515. pl->scaler_dis_w : pl->scaler_en_w;
  516. /* Apply the camera input interface pixel constraints */
  517. v4l_bound_align_image(width, max_t(u32, *width, 32), max_w, 4,
  518. height, max_t(u32, *height, 32),
  519. FIMC_CAMIF_MAX_HEIGHT,
  520. fimc_fmt_is_user_defined(ffmt->color) ?
  521. 3 : 1,
  522. 0);
  523. return ffmt;
  524. }
  525. /* Can't scale or crop in transparent (JPEG) transfer mode */
  526. if (fimc_fmt_is_user_defined(ffmt->color)) {
  527. *width = ctx->s_frame.f_width;
  528. *height = ctx->s_frame.f_height;
  529. return ffmt;
  530. }
  531. /* Apply the scaler and the output DMA constraints */
  532. max_w = rotation ? pl->out_rot_en_w : pl->out_rot_dis_w;
  533. if (ctx->state & FIMC_COMPOSE) {
  534. min_w = dst->offs_h + dst->width;
  535. min_h = dst->offs_v + dst->height;
  536. } else {
  537. min_w = var->min_out_pixsize;
  538. min_h = var->min_out_pixsize;
  539. }
  540. if (var->min_vsize_align == 1 && !rotation)
  541. align_h = fimc_fmt_is_rgb(ffmt->color) ? 0 : 1;
  542. depth = fimc_get_format_depth(ffmt);
  543. v4l_bound_align_image(width, min_w, max_w,
  544. ffs(var->min_out_pixsize) - 1,
  545. height, min_h, FIMC_CAMIF_MAX_HEIGHT,
  546. align_h,
  547. 64/(ALIGN(depth, 8)));
  548. dbg("pad%d: code: 0x%x, %dx%d. dst fmt: %dx%d",
  549. pad, code ? *code : 0, *width, *height,
  550. dst->f_width, dst->f_height);
  551. return ffmt;
  552. }
  553. static void fimc_capture_try_selection(struct fimc_ctx *ctx,
  554. struct v4l2_rect *r,
  555. int target)
  556. {
  557. bool rotate = ctx->rotation == 90 || ctx->rotation == 270;
  558. struct fimc_dev *fimc = ctx->fimc_dev;
  559. const struct fimc_variant *var = fimc->variant;
  560. const struct fimc_pix_limit *pl = var->pix_limit;
  561. struct fimc_frame *sink = &ctx->s_frame;
  562. u32 max_w, max_h, min_w = 0, min_h = 0, min_sz;
  563. u32 align_sz = 0, align_h = 4;
  564. u32 max_sc_h, max_sc_v;
  565. /* In JPEG transparent transfer mode cropping is not supported */
  566. if (fimc_fmt_is_user_defined(ctx->d_frame.fmt->color)) {
  567. r->width = sink->f_width;
  568. r->height = sink->f_height;
  569. r->left = r->top = 0;
  570. return;
  571. }
  572. if (target == V4L2_SEL_TGT_COMPOSE) {
  573. if (ctx->rotation != 90 && ctx->rotation != 270)
  574. align_h = 1;
  575. max_sc_h = min(SCALER_MAX_HRATIO, 1 << (ffs(sink->width) - 3));
  576. max_sc_v = min(SCALER_MAX_VRATIO, 1 << (ffs(sink->height) - 1));
  577. min_sz = var->min_out_pixsize;
  578. } else {
  579. u32 depth = fimc_get_format_depth(sink->fmt);
  580. align_sz = 64/ALIGN(depth, 8);
  581. min_sz = var->min_inp_pixsize;
  582. min_w = min_h = min_sz;
  583. max_sc_h = max_sc_v = 1;
  584. }
  585. /*
  586. * For the compose rectangle the following constraints must be met:
  587. * - it must fit in the sink pad format rectangle (f_width/f_height);
  588. * - maximum downscaling ratio is 64;
  589. * - maximum crop size depends if the rotator is used or not;
  590. * - the sink pad format width/height must be 4 multiple of the
  591. * prescaler ratios determined by sink pad size and source pad crop,
  592. * the prescaler ratio is returned by fimc_get_scaler_factor().
  593. */
  594. max_w = min_t(u32,
  595. rotate ? pl->out_rot_en_w : pl->out_rot_dis_w,
  596. rotate ? sink->f_height : sink->f_width);
  597. max_h = min_t(u32, FIMC_CAMIF_MAX_HEIGHT, sink->f_height);
  598. if (target == V4L2_SEL_TGT_COMPOSE) {
  599. min_w = min_t(u32, max_w, sink->f_width / max_sc_h);
  600. min_h = min_t(u32, max_h, sink->f_height / max_sc_v);
  601. if (rotate) {
  602. swap(max_sc_h, max_sc_v);
  603. swap(min_w, min_h);
  604. }
  605. }
  606. v4l_bound_align_image(&r->width, min_w, max_w, ffs(min_sz) - 1,
  607. &r->height, min_h, max_h, align_h,
  608. align_sz);
  609. /* Adjust left/top if crop/compose rectangle is out of bounds */
  610. r->left = clamp_t(u32, r->left, 0, sink->f_width - r->width);
  611. r->top = clamp_t(u32, r->top, 0, sink->f_height - r->height);
  612. r->left = round_down(r->left, var->hor_offs_align);
  613. dbg("target %#x: (%d,%d)/%dx%d, sink fmt: %dx%d",
  614. target, r->left, r->top, r->width, r->height,
  615. sink->f_width, sink->f_height);
  616. }
  617. /*
  618. * The video node ioctl operations
  619. */
  620. static int fimc_cap_querycap(struct file *file, void *priv,
  621. struct v4l2_capability *cap)
  622. {
  623. struct fimc_dev *fimc = video_drvdata(file);
  624. __fimc_vidioc_querycap(&fimc->pdev->dev, cap, V4L2_CAP_STREAMING |
  625. V4L2_CAP_VIDEO_CAPTURE_MPLANE);
  626. return 0;
  627. }
  628. static int fimc_cap_enum_fmt_mplane(struct file *file, void *priv,
  629. struct v4l2_fmtdesc *f)
  630. {
  631. struct fimc_fmt *fmt;
  632. fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM | FMT_FLAGS_M2M,
  633. f->index);
  634. if (!fmt)
  635. return -EINVAL;
  636. strncpy(f->description, fmt->name, sizeof(f->description) - 1);
  637. f->pixelformat = fmt->fourcc;
  638. if (fmt->fourcc == V4L2_MBUS_FMT_JPEG_1X8)
  639. f->flags |= V4L2_FMT_FLAG_COMPRESSED;
  640. return 0;
  641. }
  642. static struct media_entity *fimc_pipeline_get_head(struct media_entity *me)
  643. {
  644. struct media_pad *pad = &me->pads[0];
  645. while (!(pad->flags & MEDIA_PAD_FL_SOURCE)) {
  646. pad = media_entity_remote_pad(pad);
  647. if (!pad)
  648. break;
  649. me = pad->entity;
  650. pad = &me->pads[0];
  651. }
  652. return me;
  653. }
  654. /**
  655. * fimc_pipeline_try_format - negotiate and/or set formats at pipeline
  656. * elements
  657. * @ctx: FIMC capture context
  658. * @tfmt: media bus format to try/set on subdevs
  659. * @fmt_id: fimc pixel format id corresponding to returned @tfmt (output)
  660. * @set: true to set format on subdevs, false to try only
  661. */
  662. static int fimc_pipeline_try_format(struct fimc_ctx *ctx,
  663. struct v4l2_mbus_framefmt *tfmt,
  664. struct fimc_fmt **fmt_id,
  665. bool set)
  666. {
  667. struct fimc_dev *fimc = ctx->fimc_dev;
  668. struct v4l2_subdev *sd = fimc->pipeline.subdevs[IDX_SENSOR];
  669. struct v4l2_subdev_format sfmt;
  670. struct v4l2_mbus_framefmt *mf = &sfmt.format;
  671. struct media_entity *me;
  672. struct fimc_fmt *ffmt;
  673. struct media_pad *pad;
  674. int ret, i = 1;
  675. u32 fcc;
  676. if (WARN_ON(!sd || !tfmt))
  677. return -EINVAL;
  678. memset(&sfmt, 0, sizeof(sfmt));
  679. sfmt.format = *tfmt;
  680. sfmt.which = set ? V4L2_SUBDEV_FORMAT_ACTIVE : V4L2_SUBDEV_FORMAT_TRY;
  681. me = fimc_pipeline_get_head(&sd->entity);
  682. while (1) {
  683. ffmt = fimc_find_format(NULL, mf->code != 0 ? &mf->code : NULL,
  684. FMT_FLAGS_CAM, i++);
  685. if (ffmt == NULL) {
  686. /*
  687. * Notify user-space if common pixel code for
  688. * host and sensor does not exist.
  689. */
  690. return -EINVAL;
  691. }
  692. mf->code = tfmt->code = ffmt->mbus_code;
  693. /* set format on all pipeline subdevs */
  694. while (me != &fimc->vid_cap.subdev.entity) {
  695. sd = media_entity_to_v4l2_subdev(me);
  696. sfmt.pad = 0;
  697. ret = v4l2_subdev_call(sd, pad, set_fmt, NULL, &sfmt);
  698. if (ret)
  699. return ret;
  700. if (me->pads[0].flags & MEDIA_PAD_FL_SINK) {
  701. sfmt.pad = me->num_pads - 1;
  702. mf->code = tfmt->code;
  703. ret = v4l2_subdev_call(sd, pad, set_fmt, NULL,
  704. &sfmt);
  705. if (ret)
  706. return ret;
  707. }
  708. pad = media_entity_remote_pad(&me->pads[sfmt.pad]);
  709. if (!pad)
  710. return -EINVAL;
  711. me = pad->entity;
  712. }
  713. if (mf->code != tfmt->code)
  714. continue;
  715. fcc = ffmt->fourcc;
  716. tfmt->width = mf->width;
  717. tfmt->height = mf->height;
  718. ffmt = fimc_capture_try_format(ctx, &tfmt->width, &tfmt->height,
  719. NULL, &fcc, FIMC_SD_PAD_SINK_CAM);
  720. ffmt = fimc_capture_try_format(ctx, &tfmt->width, &tfmt->height,
  721. NULL, &fcc, FIMC_SD_PAD_SOURCE);
  722. if (ffmt && ffmt->mbus_code)
  723. mf->code = ffmt->mbus_code;
  724. if (mf->width != tfmt->width || mf->height != tfmt->height)
  725. continue;
  726. tfmt->code = mf->code;
  727. break;
  728. }
  729. if (fmt_id && ffmt)
  730. *fmt_id = ffmt;
  731. *tfmt = *mf;
  732. return 0;
  733. }
  734. /**
  735. * fimc_get_sensor_frame_desc - query the sensor for media bus frame parameters
  736. * @sensor: pointer to the sensor subdev
  737. * @plane_fmt: provides plane sizes corresponding to the frame layout entries
  738. * @try: true to set the frame parameters, false to query only
  739. *
  740. * This function is used by this driver only for compressed/blob data formats.
  741. */
  742. static int fimc_get_sensor_frame_desc(struct v4l2_subdev *sensor,
  743. struct v4l2_plane_pix_format *plane_fmt,
  744. unsigned int num_planes, bool try)
  745. {
  746. struct v4l2_mbus_frame_desc fd;
  747. int i, ret;
  748. int pad;
  749. for (i = 0; i < num_planes; i++)
  750. fd.entry[i].length = plane_fmt[i].sizeimage;
  751. pad = sensor->entity.num_pads - 1;
  752. if (try)
  753. ret = v4l2_subdev_call(sensor, pad, set_frame_desc, pad, &fd);
  754. else
  755. ret = v4l2_subdev_call(sensor, pad, get_frame_desc, pad, &fd);
  756. if (ret < 0)
  757. return ret;
  758. if (num_planes != fd.num_entries)
  759. return -EINVAL;
  760. for (i = 0; i < num_planes; i++)
  761. plane_fmt[i].sizeimage = fd.entry[i].length;
  762. if (fd.entry[0].length > FIMC_MAX_JPEG_BUF_SIZE) {
  763. v4l2_err(sensor->v4l2_dev, "Unsupported buffer size: %u\n",
  764. fd.entry[0].length);
  765. return -EINVAL;
  766. }
  767. return 0;
  768. }
  769. static int fimc_cap_g_fmt_mplane(struct file *file, void *fh,
  770. struct v4l2_format *f)
  771. {
  772. struct fimc_dev *fimc = video_drvdata(file);
  773. __fimc_get_format(&fimc->vid_cap.ctx->d_frame, f);
  774. return 0;
  775. }
  776. static int fimc_cap_try_fmt_mplane(struct file *file, void *fh,
  777. struct v4l2_format *f)
  778. {
  779. struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
  780. struct fimc_dev *fimc = video_drvdata(file);
  781. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  782. struct exynos_video_entity *ve = &fimc->vid_cap.ve;
  783. struct v4l2_mbus_framefmt mf;
  784. struct fimc_fmt *ffmt = NULL;
  785. int ret = 0;
  786. fimc_md_graph_lock(ve);
  787. mutex_lock(&fimc->lock);
  788. if (fimc_jpeg_fourcc(pix->pixelformat)) {
  789. fimc_capture_try_format(ctx, &pix->width, &pix->height,
  790. NULL, &pix->pixelformat,
  791. FIMC_SD_PAD_SINK_CAM);
  792. ctx->s_frame.f_width = pix->width;
  793. ctx->s_frame.f_height = pix->height;
  794. }
  795. ffmt = fimc_capture_try_format(ctx, &pix->width, &pix->height,
  796. NULL, &pix->pixelformat,
  797. FIMC_SD_PAD_SOURCE);
  798. if (!ffmt) {
  799. ret = -EINVAL;
  800. goto unlock;
  801. }
  802. if (!fimc->vid_cap.user_subdev_api) {
  803. mf.width = pix->width;
  804. mf.height = pix->height;
  805. mf.code = ffmt->mbus_code;
  806. fimc_pipeline_try_format(ctx, &mf, &ffmt, false);
  807. pix->width = mf.width;
  808. pix->height = mf.height;
  809. if (ffmt)
  810. pix->pixelformat = ffmt->fourcc;
  811. }
  812. fimc_adjust_mplane_format(ffmt, pix->width, pix->height, pix);
  813. if (ffmt->flags & FMT_FLAGS_COMPRESSED)
  814. fimc_get_sensor_frame_desc(fimc->pipeline.subdevs[IDX_SENSOR],
  815. pix->plane_fmt, ffmt->memplanes, true);
  816. unlock:
  817. mutex_unlock(&fimc->lock);
  818. fimc_md_graph_unlock(ve);
  819. return ret;
  820. }
  821. static void fimc_capture_mark_jpeg_xfer(struct fimc_ctx *ctx,
  822. enum fimc_color_fmt color)
  823. {
  824. bool jpeg = fimc_fmt_is_user_defined(color);
  825. ctx->scaler.enabled = !jpeg;
  826. fimc_ctrls_activate(ctx, !jpeg);
  827. if (jpeg)
  828. set_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
  829. else
  830. clear_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
  831. }
  832. static int __fimc_capture_set_format(struct fimc_dev *fimc,
  833. struct v4l2_format *f)
  834. {
  835. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  836. struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
  837. struct v4l2_mbus_framefmt *mf = &fimc->vid_cap.ci_fmt;
  838. struct fimc_frame *ff = &ctx->d_frame;
  839. struct fimc_fmt *s_fmt = NULL;
  840. int ret, i;
  841. if (vb2_is_busy(&fimc->vid_cap.vbq))
  842. return -EBUSY;
  843. /* Pre-configure format at camera interface input, for JPEG only */
  844. if (fimc_jpeg_fourcc(pix->pixelformat)) {
  845. fimc_capture_try_format(ctx, &pix->width, &pix->height,
  846. NULL, &pix->pixelformat,
  847. FIMC_SD_PAD_SINK_CAM);
  848. ctx->s_frame.f_width = pix->width;
  849. ctx->s_frame.f_height = pix->height;
  850. }
  851. /* Try the format at the scaler and the DMA output */
  852. ff->fmt = fimc_capture_try_format(ctx, &pix->width, &pix->height,
  853. NULL, &pix->pixelformat,
  854. FIMC_SD_PAD_SOURCE);
  855. if (!ff->fmt)
  856. return -EINVAL;
  857. /* Update RGB Alpha control state and value range */
  858. fimc_alpha_ctrl_update(ctx);
  859. /* Try to match format at the host and the sensor */
  860. if (!fimc->vid_cap.user_subdev_api) {
  861. mf->code = ff->fmt->mbus_code;
  862. mf->width = pix->width;
  863. mf->height = pix->height;
  864. ret = fimc_pipeline_try_format(ctx, mf, &s_fmt, true);
  865. if (ret)
  866. return ret;
  867. pix->width = mf->width;
  868. pix->height = mf->height;
  869. }
  870. fimc_adjust_mplane_format(ff->fmt, pix->width, pix->height, pix);
  871. if (ff->fmt->flags & FMT_FLAGS_COMPRESSED) {
  872. ret = fimc_get_sensor_frame_desc(fimc->pipeline.subdevs[IDX_SENSOR],
  873. pix->plane_fmt, ff->fmt->memplanes,
  874. true);
  875. if (ret < 0)
  876. return ret;
  877. }
  878. for (i = 0; i < ff->fmt->memplanes; i++) {
  879. ff->bytesperline[i] = pix->plane_fmt[i].bytesperline;
  880. ff->payload[i] = pix->plane_fmt[i].sizeimage;
  881. }
  882. set_frame_bounds(ff, pix->width, pix->height);
  883. /* Reset the composition rectangle if not yet configured */
  884. if (!(ctx->state & FIMC_COMPOSE))
  885. set_frame_crop(ff, 0, 0, pix->width, pix->height);
  886. fimc_capture_mark_jpeg_xfer(ctx, ff->fmt->color);
  887. /* Reset cropping and set format at the camera interface input */
  888. if (!fimc->vid_cap.user_subdev_api) {
  889. ctx->s_frame.fmt = s_fmt;
  890. set_frame_bounds(&ctx->s_frame, pix->width, pix->height);
  891. set_frame_crop(&ctx->s_frame, 0, 0, pix->width, pix->height);
  892. }
  893. return ret;
  894. }
  895. static int fimc_cap_s_fmt_mplane(struct file *file, void *priv,
  896. struct v4l2_format *f)
  897. {
  898. struct fimc_dev *fimc = video_drvdata(file);
  899. int ret;
  900. fimc_md_graph_lock(&fimc->vid_cap.ve);
  901. mutex_lock(&fimc->lock);
  902. /*
  903. * The graph is walked within __fimc_capture_set_format() to set
  904. * the format at subdevs thus the graph mutex needs to be held at
  905. * this point and acquired before the video mutex, to avoid AB-BA
  906. * deadlock when fimc_md_link_notify() is called by other thread.
  907. * Ideally the graph walking and setting format at the whole pipeline
  908. * should be removed from this driver and handled in userspace only.
  909. */
  910. ret = __fimc_capture_set_format(fimc, f);
  911. fimc_md_graph_unlock(&fimc->vid_cap.ve);
  912. mutex_unlock(&fimc->lock);
  913. return ret;
  914. }
  915. static int fimc_cap_enum_input(struct file *file, void *priv,
  916. struct v4l2_input *i)
  917. {
  918. struct fimc_dev *fimc = video_drvdata(file);
  919. struct v4l2_subdev *sd = fimc->pipeline.subdevs[IDX_SENSOR];
  920. if (i->index != 0)
  921. return -EINVAL;
  922. i->type = V4L2_INPUT_TYPE_CAMERA;
  923. if (sd)
  924. strlcpy(i->name, sd->name, sizeof(i->name));
  925. return 0;
  926. }
  927. static int fimc_cap_s_input(struct file *file, void *priv, unsigned int i)
  928. {
  929. return i == 0 ? i : -EINVAL;
  930. }
  931. static int fimc_cap_g_input(struct file *file, void *priv, unsigned int *i)
  932. {
  933. *i = 0;
  934. return 0;
  935. }
  936. /**
  937. * fimc_pipeline_validate - check for formats inconsistencies
  938. * between source and sink pad of each link
  939. *
  940. * Return 0 if all formats match or -EPIPE otherwise.
  941. */
  942. static int fimc_pipeline_validate(struct fimc_dev *fimc)
  943. {
  944. struct v4l2_subdev_format sink_fmt, src_fmt;
  945. struct fimc_vid_cap *vc = &fimc->vid_cap;
  946. struct v4l2_subdev *sd = &vc->subdev;
  947. struct media_pad *sink_pad, *src_pad;
  948. int i, ret;
  949. while (1) {
  950. /*
  951. * Find current entity sink pad and any remote sink pad linked
  952. * to it. We stop if there is no sink pad in current entity or
  953. * it is not linked to any other remote entity.
  954. */
  955. src_pad = NULL;
  956. for (i = 0; i < sd->entity.num_pads; i++) {
  957. struct media_pad *p = &sd->entity.pads[i];
  958. if (p->flags & MEDIA_PAD_FL_SINK) {
  959. sink_pad = p;
  960. src_pad = media_entity_remote_pad(sink_pad);
  961. if (src_pad)
  962. break;
  963. }
  964. }
  965. if (src_pad == NULL ||
  966. media_entity_type(src_pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  967. break;
  968. /* Don't call FIMC subdev operation to avoid nested locking */
  969. if (sd == &vc->subdev) {
  970. struct fimc_frame *ff = &vc->ctx->s_frame;
  971. sink_fmt.format.width = ff->f_width;
  972. sink_fmt.format.height = ff->f_height;
  973. sink_fmt.format.code = ff->fmt ? ff->fmt->mbus_code : 0;
  974. } else {
  975. sink_fmt.pad = sink_pad->index;
  976. sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  977. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &sink_fmt);
  978. if (ret < 0 && ret != -ENOIOCTLCMD)
  979. return -EPIPE;
  980. }
  981. /* Retrieve format at the source pad */
  982. sd = media_entity_to_v4l2_subdev(src_pad->entity);
  983. src_fmt.pad = src_pad->index;
  984. src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  985. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
  986. if (ret < 0 && ret != -ENOIOCTLCMD)
  987. return -EPIPE;
  988. if (src_fmt.format.width != sink_fmt.format.width ||
  989. src_fmt.format.height != sink_fmt.format.height ||
  990. src_fmt.format.code != sink_fmt.format.code)
  991. return -EPIPE;
  992. if (sd == fimc->pipeline.subdevs[IDX_SENSOR] &&
  993. fimc_user_defined_mbus_fmt(src_fmt.format.code)) {
  994. struct v4l2_plane_pix_format plane_fmt[FIMC_MAX_PLANES];
  995. struct fimc_frame *frame = &vc->ctx->d_frame;
  996. unsigned int i;
  997. ret = fimc_get_sensor_frame_desc(sd, plane_fmt,
  998. frame->fmt->memplanes,
  999. false);
  1000. if (ret < 0)
  1001. return -EPIPE;
  1002. for (i = 0; i < frame->fmt->memplanes; i++)
  1003. if (frame->payload[i] < plane_fmt[i].sizeimage)
  1004. return -EPIPE;
  1005. }
  1006. }
  1007. return 0;
  1008. }
  1009. static int fimc_cap_streamon(struct file *file, void *priv,
  1010. enum v4l2_buf_type type)
  1011. {
  1012. struct fimc_dev *fimc = video_drvdata(file);
  1013. struct fimc_pipeline *p = &fimc->pipeline;
  1014. struct fimc_vid_cap *vc = &fimc->vid_cap;
  1015. struct media_entity *entity = &vc->ve.vdev.entity;
  1016. struct fimc_source_info *si = NULL;
  1017. struct v4l2_subdev *sd;
  1018. int ret;
  1019. if (fimc_capture_active(fimc))
  1020. return -EBUSY;
  1021. ret = media_entity_pipeline_start(entity, p->m_pipeline);
  1022. if (ret < 0)
  1023. return ret;
  1024. sd = p->subdevs[IDX_SENSOR];
  1025. if (sd)
  1026. si = v4l2_get_subdev_hostdata(sd);
  1027. if (si == NULL) {
  1028. ret = -EPIPE;
  1029. goto err_p_stop;
  1030. }
  1031. /*
  1032. * Save configuration data related to currently attached image
  1033. * sensor or other data source, e.g. FIMC-IS.
  1034. */
  1035. vc->source_config = *si;
  1036. if (vc->input == GRP_ID_FIMC_IS)
  1037. vc->source_config.fimc_bus_type = FIMC_BUS_TYPE_ISP_WRITEBACK;
  1038. if (vc->user_subdev_api) {
  1039. ret = fimc_pipeline_validate(fimc);
  1040. if (ret < 0)
  1041. goto err_p_stop;
  1042. }
  1043. ret = vb2_ioctl_streamon(file, priv, type);
  1044. if (!ret) {
  1045. vc->streaming = true;
  1046. return ret;
  1047. }
  1048. err_p_stop:
  1049. media_entity_pipeline_stop(entity);
  1050. return ret;
  1051. }
  1052. static int fimc_cap_streamoff(struct file *file, void *priv,
  1053. enum v4l2_buf_type type)
  1054. {
  1055. struct fimc_dev *fimc = video_drvdata(file);
  1056. struct fimc_vid_cap *vc = &fimc->vid_cap;
  1057. int ret;
  1058. ret = vb2_ioctl_streamoff(file, priv, type);
  1059. if (ret < 0)
  1060. return ret;
  1061. media_entity_pipeline_stop(&vc->ve.vdev.entity);
  1062. vc->streaming = false;
  1063. return 0;
  1064. }
  1065. static int fimc_cap_reqbufs(struct file *file, void *priv,
  1066. struct v4l2_requestbuffers *reqbufs)
  1067. {
  1068. struct fimc_dev *fimc = video_drvdata(file);
  1069. int ret;
  1070. ret = vb2_ioctl_reqbufs(file, priv, reqbufs);
  1071. if (!ret)
  1072. fimc->vid_cap.reqbufs_count = reqbufs->count;
  1073. return ret;
  1074. }
  1075. static int fimc_cap_g_selection(struct file *file, void *fh,
  1076. struct v4l2_selection *s)
  1077. {
  1078. struct fimc_dev *fimc = video_drvdata(file);
  1079. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1080. struct fimc_frame *f = &ctx->s_frame;
  1081. if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  1082. return -EINVAL;
  1083. switch (s->target) {
  1084. case V4L2_SEL_TGT_COMPOSE_DEFAULT:
  1085. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  1086. f = &ctx->d_frame;
  1087. case V4L2_SEL_TGT_CROP_BOUNDS:
  1088. case V4L2_SEL_TGT_CROP_DEFAULT:
  1089. s->r.left = 0;
  1090. s->r.top = 0;
  1091. s->r.width = f->o_width;
  1092. s->r.height = f->o_height;
  1093. return 0;
  1094. case V4L2_SEL_TGT_COMPOSE:
  1095. f = &ctx->d_frame;
  1096. case V4L2_SEL_TGT_CROP:
  1097. s->r.left = f->offs_h;
  1098. s->r.top = f->offs_v;
  1099. s->r.width = f->width;
  1100. s->r.height = f->height;
  1101. return 0;
  1102. }
  1103. return -EINVAL;
  1104. }
  1105. /* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */
  1106. static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)
  1107. {
  1108. if (a->left < b->left || a->top < b->top)
  1109. return 0;
  1110. if (a->left + a->width > b->left + b->width)
  1111. return 0;
  1112. if (a->top + a->height > b->top + b->height)
  1113. return 0;
  1114. return 1;
  1115. }
  1116. static int fimc_cap_s_selection(struct file *file, void *fh,
  1117. struct v4l2_selection *s)
  1118. {
  1119. struct fimc_dev *fimc = video_drvdata(file);
  1120. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1121. struct v4l2_rect rect = s->r;
  1122. struct fimc_frame *f;
  1123. unsigned long flags;
  1124. if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  1125. return -EINVAL;
  1126. if (s->target == V4L2_SEL_TGT_COMPOSE)
  1127. f = &ctx->d_frame;
  1128. else if (s->target == V4L2_SEL_TGT_CROP)
  1129. f = &ctx->s_frame;
  1130. else
  1131. return -EINVAL;
  1132. fimc_capture_try_selection(ctx, &rect, s->target);
  1133. if (s->flags & V4L2_SEL_FLAG_LE &&
  1134. !enclosed_rectangle(&rect, &s->r))
  1135. return -ERANGE;
  1136. if (s->flags & V4L2_SEL_FLAG_GE &&
  1137. !enclosed_rectangle(&s->r, &rect))
  1138. return -ERANGE;
  1139. s->r = rect;
  1140. spin_lock_irqsave(&fimc->slock, flags);
  1141. set_frame_crop(f, s->r.left, s->r.top, s->r.width,
  1142. s->r.height);
  1143. spin_unlock_irqrestore(&fimc->slock, flags);
  1144. set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  1145. return 0;
  1146. }
  1147. static const struct v4l2_ioctl_ops fimc_capture_ioctl_ops = {
  1148. .vidioc_querycap = fimc_cap_querycap,
  1149. .vidioc_enum_fmt_vid_cap_mplane = fimc_cap_enum_fmt_mplane,
  1150. .vidioc_try_fmt_vid_cap_mplane = fimc_cap_try_fmt_mplane,
  1151. .vidioc_s_fmt_vid_cap_mplane = fimc_cap_s_fmt_mplane,
  1152. .vidioc_g_fmt_vid_cap_mplane = fimc_cap_g_fmt_mplane,
  1153. .vidioc_reqbufs = fimc_cap_reqbufs,
  1154. .vidioc_querybuf = vb2_ioctl_querybuf,
  1155. .vidioc_qbuf = vb2_ioctl_qbuf,
  1156. .vidioc_dqbuf = vb2_ioctl_dqbuf,
  1157. .vidioc_expbuf = vb2_ioctl_expbuf,
  1158. .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
  1159. .vidioc_create_bufs = vb2_ioctl_create_bufs,
  1160. .vidioc_streamon = fimc_cap_streamon,
  1161. .vidioc_streamoff = fimc_cap_streamoff,
  1162. .vidioc_g_selection = fimc_cap_g_selection,
  1163. .vidioc_s_selection = fimc_cap_s_selection,
  1164. .vidioc_enum_input = fimc_cap_enum_input,
  1165. .vidioc_s_input = fimc_cap_s_input,
  1166. .vidioc_g_input = fimc_cap_g_input,
  1167. };
  1168. /* Capture subdev media entity operations */
  1169. static int fimc_link_setup(struct media_entity *entity,
  1170. const struct media_pad *local,
  1171. const struct media_pad *remote, u32 flags)
  1172. {
  1173. struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
  1174. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1175. if (media_entity_type(remote->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  1176. return -EINVAL;
  1177. if (WARN_ON(fimc == NULL))
  1178. return 0;
  1179. dbg("%s --> %s, flags: 0x%x. input: 0x%x",
  1180. local->entity->name, remote->entity->name, flags,
  1181. fimc->vid_cap.input);
  1182. if (flags & MEDIA_LNK_FL_ENABLED) {
  1183. if (fimc->vid_cap.input != 0)
  1184. return -EBUSY;
  1185. fimc->vid_cap.input = sd->grp_id;
  1186. return 0;
  1187. }
  1188. fimc->vid_cap.input = 0;
  1189. return 0;
  1190. }
  1191. static const struct media_entity_operations fimc_sd_media_ops = {
  1192. .link_setup = fimc_link_setup,
  1193. };
  1194. /**
  1195. * fimc_sensor_notify - v4l2_device notification from a sensor subdev
  1196. * @sd: pointer to a subdev generating the notification
  1197. * @notification: the notification type, must be S5P_FIMC_TX_END_NOTIFY
  1198. * @arg: pointer to an u32 type integer that stores the frame payload value
  1199. *
  1200. * The End Of Frame notification sent by sensor subdev in its still capture
  1201. * mode. If there is only a single VSYNC generated by the sensor at the
  1202. * beginning of a frame transmission, FIMC does not issue the LastIrq
  1203. * (end of frame) interrupt. And this notification is used to complete the
  1204. * frame capture and returning a buffer to user-space. Subdev drivers should
  1205. * call this notification from their last 'End of frame capture' interrupt.
  1206. */
  1207. void fimc_sensor_notify(struct v4l2_subdev *sd, unsigned int notification,
  1208. void *arg)
  1209. {
  1210. struct fimc_source_info *si;
  1211. struct fimc_vid_buffer *buf;
  1212. struct fimc_md *fmd;
  1213. struct fimc_dev *fimc;
  1214. unsigned long flags;
  1215. if (sd == NULL)
  1216. return;
  1217. si = v4l2_get_subdev_hostdata(sd);
  1218. fmd = entity_to_fimc_mdev(&sd->entity);
  1219. spin_lock_irqsave(&fmd->slock, flags);
  1220. fimc = si ? source_to_sensor_info(si)->host : NULL;
  1221. if (fimc && arg && notification == S5P_FIMC_TX_END_NOTIFY &&
  1222. test_bit(ST_CAPT_PEND, &fimc->state)) {
  1223. unsigned long irq_flags;
  1224. spin_lock_irqsave(&fimc->slock, irq_flags);
  1225. if (!list_empty(&fimc->vid_cap.active_buf_q)) {
  1226. buf = list_entry(fimc->vid_cap.active_buf_q.next,
  1227. struct fimc_vid_buffer, list);
  1228. vb2_set_plane_payload(&buf->vb, 0, *((u32 *)arg));
  1229. }
  1230. fimc_capture_irq_handler(fimc, 1);
  1231. fimc_deactivate_capture(fimc);
  1232. spin_unlock_irqrestore(&fimc->slock, irq_flags);
  1233. }
  1234. spin_unlock_irqrestore(&fmd->slock, flags);
  1235. }
  1236. static int fimc_subdev_enum_mbus_code(struct v4l2_subdev *sd,
  1237. struct v4l2_subdev_fh *fh,
  1238. struct v4l2_subdev_mbus_code_enum *code)
  1239. {
  1240. struct fimc_fmt *fmt;
  1241. fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, code->index);
  1242. if (!fmt)
  1243. return -EINVAL;
  1244. code->code = fmt->mbus_code;
  1245. return 0;
  1246. }
  1247. static int fimc_subdev_get_fmt(struct v4l2_subdev *sd,
  1248. struct v4l2_subdev_fh *fh,
  1249. struct v4l2_subdev_format *fmt)
  1250. {
  1251. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1252. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1253. struct fimc_frame *ff = &ctx->s_frame;
  1254. struct v4l2_mbus_framefmt *mf;
  1255. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  1256. mf = v4l2_subdev_get_try_format(fh, fmt->pad);
  1257. fmt->format = *mf;
  1258. return 0;
  1259. }
  1260. mf = &fmt->format;
  1261. mutex_lock(&fimc->lock);
  1262. switch (fmt->pad) {
  1263. case FIMC_SD_PAD_SOURCE:
  1264. if (!WARN_ON(ff->fmt == NULL))
  1265. mf->code = ff->fmt->mbus_code;
  1266. /* Sink pads crop rectangle size */
  1267. mf->width = ff->width;
  1268. mf->height = ff->height;
  1269. break;
  1270. case FIMC_SD_PAD_SINK_FIFO:
  1271. *mf = fimc->vid_cap.wb_fmt;
  1272. break;
  1273. case FIMC_SD_PAD_SINK_CAM:
  1274. default:
  1275. *mf = fimc->vid_cap.ci_fmt;
  1276. break;
  1277. }
  1278. mutex_unlock(&fimc->lock);
  1279. mf->colorspace = V4L2_COLORSPACE_JPEG;
  1280. return 0;
  1281. }
  1282. static int fimc_subdev_set_fmt(struct v4l2_subdev *sd,
  1283. struct v4l2_subdev_fh *fh,
  1284. struct v4l2_subdev_format *fmt)
  1285. {
  1286. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1287. struct v4l2_mbus_framefmt *mf = &fmt->format;
  1288. struct fimc_vid_cap *vc = &fimc->vid_cap;
  1289. struct fimc_ctx *ctx = vc->ctx;
  1290. struct fimc_frame *ff;
  1291. struct fimc_fmt *ffmt;
  1292. dbg("pad%d: code: 0x%x, %dx%d",
  1293. fmt->pad, mf->code, mf->width, mf->height);
  1294. if (fmt->pad == FIMC_SD_PAD_SOURCE && vb2_is_busy(&vc->vbq))
  1295. return -EBUSY;
  1296. mutex_lock(&fimc->lock);
  1297. ffmt = fimc_capture_try_format(ctx, &mf->width, &mf->height,
  1298. &mf->code, NULL, fmt->pad);
  1299. mutex_unlock(&fimc->lock);
  1300. mf->colorspace = V4L2_COLORSPACE_JPEG;
  1301. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  1302. mf = v4l2_subdev_get_try_format(fh, fmt->pad);
  1303. *mf = fmt->format;
  1304. return 0;
  1305. }
  1306. /* There must be a bug in the driver if this happens */
  1307. if (WARN_ON(ffmt == NULL))
  1308. return -EINVAL;
  1309. /* Update RGB Alpha control state and value range */
  1310. fimc_alpha_ctrl_update(ctx);
  1311. fimc_capture_mark_jpeg_xfer(ctx, ffmt->color);
  1312. if (fmt->pad == FIMC_SD_PAD_SOURCE) {
  1313. ff = &ctx->d_frame;
  1314. /* Sink pads crop rectangle size */
  1315. mf->width = ctx->s_frame.width;
  1316. mf->height = ctx->s_frame.height;
  1317. } else {
  1318. ff = &ctx->s_frame;
  1319. }
  1320. mutex_lock(&fimc->lock);
  1321. set_frame_bounds(ff, mf->width, mf->height);
  1322. if (fmt->pad == FIMC_SD_PAD_SINK_FIFO)
  1323. vc->wb_fmt = *mf;
  1324. else if (fmt->pad == FIMC_SD_PAD_SINK_CAM)
  1325. vc->ci_fmt = *mf;
  1326. ff->fmt = ffmt;
  1327. /* Reset the crop rectangle if required. */
  1328. if (!(fmt->pad == FIMC_SD_PAD_SOURCE && (ctx->state & FIMC_COMPOSE)))
  1329. set_frame_crop(ff, 0, 0, mf->width, mf->height);
  1330. if (fmt->pad != FIMC_SD_PAD_SOURCE)
  1331. ctx->state &= ~FIMC_COMPOSE;
  1332. mutex_unlock(&fimc->lock);
  1333. return 0;
  1334. }
  1335. static int fimc_subdev_get_selection(struct v4l2_subdev *sd,
  1336. struct v4l2_subdev_fh *fh,
  1337. struct v4l2_subdev_selection *sel)
  1338. {
  1339. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1340. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1341. struct fimc_frame *f = &ctx->s_frame;
  1342. struct v4l2_rect *r = &sel->r;
  1343. struct v4l2_rect *try_sel;
  1344. if (sel->pad == FIMC_SD_PAD_SOURCE)
  1345. return -EINVAL;
  1346. mutex_lock(&fimc->lock);
  1347. switch (sel->target) {
  1348. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  1349. f = &ctx->d_frame;
  1350. case V4L2_SEL_TGT_CROP_BOUNDS:
  1351. r->width = f->o_width;
  1352. r->height = f->o_height;
  1353. r->left = 0;
  1354. r->top = 0;
  1355. mutex_unlock(&fimc->lock);
  1356. return 0;
  1357. case V4L2_SEL_TGT_CROP:
  1358. try_sel = v4l2_subdev_get_try_crop(fh, sel->pad);
  1359. break;
  1360. case V4L2_SEL_TGT_COMPOSE:
  1361. try_sel = v4l2_subdev_get_try_compose(fh, sel->pad);
  1362. f = &ctx->d_frame;
  1363. break;
  1364. default:
  1365. mutex_unlock(&fimc->lock);
  1366. return -EINVAL;
  1367. }
  1368. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  1369. sel->r = *try_sel;
  1370. } else {
  1371. r->left = f->offs_h;
  1372. r->top = f->offs_v;
  1373. r->width = f->width;
  1374. r->height = f->height;
  1375. }
  1376. dbg("target %#x: l:%d, t:%d, %dx%d, f_w: %d, f_h: %d",
  1377. sel->pad, r->left, r->top, r->width, r->height,
  1378. f->f_width, f->f_height);
  1379. mutex_unlock(&fimc->lock);
  1380. return 0;
  1381. }
  1382. static int fimc_subdev_set_selection(struct v4l2_subdev *sd,
  1383. struct v4l2_subdev_fh *fh,
  1384. struct v4l2_subdev_selection *sel)
  1385. {
  1386. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1387. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1388. struct fimc_frame *f = &ctx->s_frame;
  1389. struct v4l2_rect *r = &sel->r;
  1390. struct v4l2_rect *try_sel;
  1391. unsigned long flags;
  1392. if (sel->pad == FIMC_SD_PAD_SOURCE)
  1393. return -EINVAL;
  1394. mutex_lock(&fimc->lock);
  1395. fimc_capture_try_selection(ctx, r, V4L2_SEL_TGT_CROP);
  1396. switch (sel->target) {
  1397. case V4L2_SEL_TGT_CROP:
  1398. try_sel = v4l2_subdev_get_try_crop(fh, sel->pad);
  1399. break;
  1400. case V4L2_SEL_TGT_COMPOSE:
  1401. try_sel = v4l2_subdev_get_try_compose(fh, sel->pad);
  1402. f = &ctx->d_frame;
  1403. break;
  1404. default:
  1405. mutex_unlock(&fimc->lock);
  1406. return -EINVAL;
  1407. }
  1408. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  1409. *try_sel = sel->r;
  1410. } else {
  1411. spin_lock_irqsave(&fimc->slock, flags);
  1412. set_frame_crop(f, r->left, r->top, r->width, r->height);
  1413. set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  1414. if (sel->target == V4L2_SEL_TGT_COMPOSE)
  1415. ctx->state |= FIMC_COMPOSE;
  1416. spin_unlock_irqrestore(&fimc->slock, flags);
  1417. }
  1418. dbg("target %#x: (%d,%d)/%dx%d", sel->target, r->left, r->top,
  1419. r->width, r->height);
  1420. mutex_unlock(&fimc->lock);
  1421. return 0;
  1422. }
  1423. static struct v4l2_subdev_pad_ops fimc_subdev_pad_ops = {
  1424. .enum_mbus_code = fimc_subdev_enum_mbus_code,
  1425. .get_selection = fimc_subdev_get_selection,
  1426. .set_selection = fimc_subdev_set_selection,
  1427. .get_fmt = fimc_subdev_get_fmt,
  1428. .set_fmt = fimc_subdev_set_fmt,
  1429. };
  1430. static struct v4l2_subdev_ops fimc_subdev_ops = {
  1431. .pad = &fimc_subdev_pad_ops,
  1432. };
  1433. /* Set default format at the sensor and host interface */
  1434. static int fimc_capture_set_default_format(struct fimc_dev *fimc)
  1435. {
  1436. struct v4l2_format fmt = {
  1437. .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE,
  1438. .fmt.pix_mp = {
  1439. .width = 640,
  1440. .height = 480,
  1441. .pixelformat = V4L2_PIX_FMT_YUYV,
  1442. .field = V4L2_FIELD_NONE,
  1443. .colorspace = V4L2_COLORSPACE_JPEG,
  1444. },
  1445. };
  1446. return __fimc_capture_set_format(fimc, &fmt);
  1447. }
  1448. /* fimc->lock must be already initialized */
  1449. static int fimc_register_capture_device(struct fimc_dev *fimc,
  1450. struct v4l2_device *v4l2_dev)
  1451. {
  1452. struct video_device *vfd = &fimc->vid_cap.ve.vdev;
  1453. struct vb2_queue *q = &fimc->vid_cap.vbq;
  1454. struct fimc_ctx *ctx;
  1455. struct fimc_vid_cap *vid_cap;
  1456. int ret = -ENOMEM;
  1457. ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
  1458. if (!ctx)
  1459. return -ENOMEM;
  1460. ctx->fimc_dev = fimc;
  1461. ctx->in_path = FIMC_IO_CAMERA;
  1462. ctx->out_path = FIMC_IO_DMA;
  1463. ctx->state = FIMC_CTX_CAP;
  1464. ctx->s_frame.fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0);
  1465. ctx->d_frame.fmt = ctx->s_frame.fmt;
  1466. memset(vfd, 0, sizeof(*vfd));
  1467. snprintf(vfd->name, sizeof(vfd->name), "fimc.%d.capture", fimc->id);
  1468. vfd->fops = &fimc_capture_fops;
  1469. vfd->ioctl_ops = &fimc_capture_ioctl_ops;
  1470. vfd->v4l2_dev = v4l2_dev;
  1471. vfd->minor = -1;
  1472. vfd->release = video_device_release_empty;
  1473. vfd->queue = q;
  1474. vfd->lock = &fimc->lock;
  1475. video_set_drvdata(vfd, fimc);
  1476. vid_cap = &fimc->vid_cap;
  1477. vid_cap->active_buf_cnt = 0;
  1478. vid_cap->reqbufs_count = 0;
  1479. vid_cap->ctx = ctx;
  1480. INIT_LIST_HEAD(&vid_cap->pending_buf_q);
  1481. INIT_LIST_HEAD(&vid_cap->active_buf_q);
  1482. memset(q, 0, sizeof(*q));
  1483. q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
  1484. q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF;
  1485. q->drv_priv = ctx;
  1486. q->ops = &fimc_capture_qops;
  1487. q->mem_ops = &vb2_dma_contig_memops;
  1488. q->buf_struct_size = sizeof(struct fimc_vid_buffer);
  1489. q->timestamp_type = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
  1490. q->lock = &fimc->lock;
  1491. ret = vb2_queue_init(q);
  1492. if (ret)
  1493. goto err_ent;
  1494. vid_cap->vd_pad.flags = MEDIA_PAD_FL_SINK;
  1495. ret = media_entity_init(&vfd->entity, 1, &vid_cap->vd_pad, 0);
  1496. if (ret)
  1497. goto err_ent;
  1498. /*
  1499. * For proper order of acquiring/releasing the video
  1500. * and the graph mutex.
  1501. */
  1502. v4l2_disable_ioctl_locking(vfd, VIDIOC_TRY_FMT);
  1503. v4l2_disable_ioctl_locking(vfd, VIDIOC_S_FMT);
  1504. ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
  1505. if (ret)
  1506. goto err_vd;
  1507. v4l2_info(v4l2_dev, "Registered %s as /dev/%s\n",
  1508. vfd->name, video_device_node_name(vfd));
  1509. vfd->ctrl_handler = &ctx->ctrls.handler;
  1510. return 0;
  1511. err_vd:
  1512. media_entity_cleanup(&vfd->entity);
  1513. err_ent:
  1514. kfree(ctx);
  1515. return ret;
  1516. }
  1517. static int fimc_capture_subdev_registered(struct v4l2_subdev *sd)
  1518. {
  1519. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1520. int ret;
  1521. if (fimc == NULL)
  1522. return -ENXIO;
  1523. ret = fimc_register_m2m_device(fimc, sd->v4l2_dev);
  1524. if (ret)
  1525. return ret;
  1526. fimc->pipeline_ops = v4l2_get_subdev_hostdata(sd);
  1527. ret = fimc_register_capture_device(fimc, sd->v4l2_dev);
  1528. if (ret) {
  1529. fimc_unregister_m2m_device(fimc);
  1530. fimc->pipeline_ops = NULL;
  1531. }
  1532. return ret;
  1533. }
  1534. static void fimc_capture_subdev_unregistered(struct v4l2_subdev *sd)
  1535. {
  1536. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1537. struct video_device *vdev;
  1538. if (fimc == NULL)
  1539. return;
  1540. fimc_unregister_m2m_device(fimc);
  1541. vdev = &fimc->vid_cap.ve.vdev;
  1542. if (video_is_registered(vdev)) {
  1543. video_unregister_device(vdev);
  1544. media_entity_cleanup(&vdev->entity);
  1545. fimc->pipeline_ops = NULL;
  1546. }
  1547. kfree(fimc->vid_cap.ctx);
  1548. fimc->vid_cap.ctx = NULL;
  1549. }
  1550. static const struct v4l2_subdev_internal_ops fimc_capture_sd_internal_ops = {
  1551. .registered = fimc_capture_subdev_registered,
  1552. .unregistered = fimc_capture_subdev_unregistered,
  1553. };
  1554. int fimc_initialize_capture_subdev(struct fimc_dev *fimc)
  1555. {
  1556. struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
  1557. int ret;
  1558. v4l2_subdev_init(sd, &fimc_subdev_ops);
  1559. sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
  1560. snprintf(sd->name, sizeof(sd->name), "FIMC.%d", fimc->id);
  1561. fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK_CAM].flags = MEDIA_PAD_FL_SINK;
  1562. fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK_FIFO].flags = MEDIA_PAD_FL_SINK;
  1563. fimc->vid_cap.sd_pads[FIMC_SD_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
  1564. ret = media_entity_init(&sd->entity, FIMC_SD_PADS_NUM,
  1565. fimc->vid_cap.sd_pads, 0);
  1566. if (ret)
  1567. return ret;
  1568. sd->entity.ops = &fimc_sd_media_ops;
  1569. sd->internal_ops = &fimc_capture_sd_internal_ops;
  1570. v4l2_set_subdevdata(sd, fimc);
  1571. return 0;
  1572. }
  1573. void fimc_unregister_capture_subdev(struct fimc_dev *fimc)
  1574. {
  1575. struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
  1576. v4l2_device_unregister_subdev(sd);
  1577. media_entity_cleanup(&sd->entity);
  1578. v4l2_set_subdevdata(sd, NULL);
  1579. }