intel_lvds.c 31 KB

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  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. * Dave Airlie <airlied@linux.ie>
  27. * Jesse Barnes <jesse.barnes@intel.com>
  28. */
  29. #include <acpi/button.h>
  30. #include <linux/dmi.h>
  31. #include <linux/i2c.h>
  32. #include <linux/slab.h>
  33. #include <drm/drmP.h>
  34. #include <drm/drm_crtc.h>
  35. #include <drm/drm_edid.h>
  36. #include "intel_drv.h"
  37. #include <drm/i915_drm.h>
  38. #include "i915_drv.h"
  39. #include <linux/acpi.h>
  40. /* Private structure for the integrated LVDS support */
  41. struct intel_lvds_connector {
  42. struct intel_connector base;
  43. struct notifier_block lid_notifier;
  44. };
  45. struct intel_lvds_encoder {
  46. struct intel_encoder base;
  47. bool is_dual_link;
  48. u32 reg;
  49. struct intel_lvds_connector *attached_connector;
  50. };
  51. static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
  52. {
  53. return container_of(encoder, struct intel_lvds_encoder, base.base);
  54. }
  55. static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
  56. {
  57. return container_of(connector, struct intel_lvds_connector, base.base);
  58. }
  59. static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  60. enum pipe *pipe)
  61. {
  62. struct drm_device *dev = encoder->base.dev;
  63. struct drm_i915_private *dev_priv = dev->dev_private;
  64. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  65. u32 tmp;
  66. tmp = I915_READ(lvds_encoder->reg);
  67. if (!(tmp & LVDS_PORT_EN))
  68. return false;
  69. if (HAS_PCH_CPT(dev))
  70. *pipe = PORT_TO_PIPE_CPT(tmp);
  71. else
  72. *pipe = PORT_TO_PIPE(tmp);
  73. return true;
  74. }
  75. /* The LVDS pin pair needs to be on before the DPLLs are enabled.
  76. * This is an exception to the general rule that mode_set doesn't turn
  77. * things on.
  78. */
  79. static void intel_pre_pll_enable_lvds(struct intel_encoder *encoder)
  80. {
  81. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  82. struct drm_device *dev = encoder->base.dev;
  83. struct drm_i915_private *dev_priv = dev->dev_private;
  84. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
  85. struct drm_display_mode *fixed_mode =
  86. lvds_encoder->attached_connector->base.panel.fixed_mode;
  87. int pipe = intel_crtc->pipe;
  88. u32 temp;
  89. temp = I915_READ(lvds_encoder->reg);
  90. temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
  91. if (HAS_PCH_CPT(dev)) {
  92. temp &= ~PORT_TRANS_SEL_MASK;
  93. temp |= PORT_TRANS_SEL_CPT(pipe);
  94. } else {
  95. if (pipe == 1) {
  96. temp |= LVDS_PIPEB_SELECT;
  97. } else {
  98. temp &= ~LVDS_PIPEB_SELECT;
  99. }
  100. }
  101. /* set the corresponsding LVDS_BORDER bit */
  102. temp |= intel_crtc->config.gmch_pfit.lvds_border_bits;
  103. /* Set the B0-B3 data pairs corresponding to whether we're going to
  104. * set the DPLLs for dual-channel mode or not.
  105. */
  106. if (lvds_encoder->is_dual_link)
  107. temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
  108. else
  109. temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
  110. /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
  111. * appropriately here, but we need to look more thoroughly into how
  112. * panels behave in the two modes.
  113. */
  114. /* Set the dithering flag on LVDS as needed, note that there is no
  115. * special lvds dither control bit on pch-split platforms, dithering is
  116. * only controlled through the PIPECONF reg. */
  117. if (INTEL_INFO(dev)->gen == 4) {
  118. /* Bspec wording suggests that LVDS port dithering only exists
  119. * for 18bpp panels. */
  120. if (intel_crtc->config.dither &&
  121. intel_crtc->config.pipe_bpp == 18)
  122. temp |= LVDS_ENABLE_DITHER;
  123. else
  124. temp &= ~LVDS_ENABLE_DITHER;
  125. }
  126. temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
  127. if (fixed_mode->flags & DRM_MODE_FLAG_NHSYNC)
  128. temp |= LVDS_HSYNC_POLARITY;
  129. if (fixed_mode->flags & DRM_MODE_FLAG_NVSYNC)
  130. temp |= LVDS_VSYNC_POLARITY;
  131. I915_WRITE(lvds_encoder->reg, temp);
  132. }
  133. /**
  134. * Sets the power state for the panel.
  135. */
  136. static void intel_enable_lvds(struct intel_encoder *encoder)
  137. {
  138. struct drm_device *dev = encoder->base.dev;
  139. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  140. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
  141. struct drm_i915_private *dev_priv = dev->dev_private;
  142. u32 ctl_reg, stat_reg;
  143. if (HAS_PCH_SPLIT(dev)) {
  144. ctl_reg = PCH_PP_CONTROL;
  145. stat_reg = PCH_PP_STATUS;
  146. } else {
  147. ctl_reg = PP_CONTROL;
  148. stat_reg = PP_STATUS;
  149. }
  150. I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
  151. I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
  152. POSTING_READ(lvds_encoder->reg);
  153. if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
  154. DRM_ERROR("timed out waiting for panel to power on\n");
  155. intel_panel_enable_backlight(dev, intel_crtc->pipe);
  156. }
  157. static void intel_disable_lvds(struct intel_encoder *encoder)
  158. {
  159. struct drm_device *dev = encoder->base.dev;
  160. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  161. struct drm_i915_private *dev_priv = dev->dev_private;
  162. u32 ctl_reg, stat_reg;
  163. if (HAS_PCH_SPLIT(dev)) {
  164. ctl_reg = PCH_PP_CONTROL;
  165. stat_reg = PCH_PP_STATUS;
  166. } else {
  167. ctl_reg = PP_CONTROL;
  168. stat_reg = PP_STATUS;
  169. }
  170. intel_panel_disable_backlight(dev);
  171. I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
  172. if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
  173. DRM_ERROR("timed out waiting for panel to power off\n");
  174. I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
  175. POSTING_READ(lvds_encoder->reg);
  176. }
  177. static int intel_lvds_mode_valid(struct drm_connector *connector,
  178. struct drm_display_mode *mode)
  179. {
  180. struct intel_connector *intel_connector = to_intel_connector(connector);
  181. struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
  182. if (mode->hdisplay > fixed_mode->hdisplay)
  183. return MODE_PANEL;
  184. if (mode->vdisplay > fixed_mode->vdisplay)
  185. return MODE_PANEL;
  186. return MODE_OK;
  187. }
  188. static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
  189. struct intel_crtc_config *pipe_config)
  190. {
  191. struct drm_device *dev = intel_encoder->base.dev;
  192. struct drm_i915_private *dev_priv = dev->dev_private;
  193. struct intel_lvds_encoder *lvds_encoder =
  194. to_lvds_encoder(&intel_encoder->base);
  195. struct intel_connector *intel_connector =
  196. &lvds_encoder->attached_connector->base;
  197. struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
  198. struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
  199. unsigned int lvds_bpp;
  200. /* Should never happen!! */
  201. if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
  202. DRM_ERROR("Can't support LVDS on pipe A\n");
  203. return false;
  204. }
  205. if (intel_encoder_check_is_cloned(&lvds_encoder->base))
  206. return false;
  207. if ((I915_READ(lvds_encoder->reg) & LVDS_A3_POWER_MASK) ==
  208. LVDS_A3_POWER_UP)
  209. lvds_bpp = 8*3;
  210. else
  211. lvds_bpp = 6*3;
  212. if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
  213. DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
  214. pipe_config->pipe_bpp, lvds_bpp);
  215. pipe_config->pipe_bpp = lvds_bpp;
  216. }
  217. /*
  218. * We have timings from the BIOS for the panel, put them in
  219. * to the adjusted mode. The CRTC will be set up for this mode,
  220. * with the panel scaling set up to source from the H/VDisplay
  221. * of the original mode.
  222. */
  223. intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
  224. adjusted_mode);
  225. if (HAS_PCH_SPLIT(dev)) {
  226. pipe_config->has_pch_encoder = true;
  227. intel_pch_panel_fitting(intel_crtc, pipe_config,
  228. intel_connector->panel.fitting_mode);
  229. return true;
  230. } else {
  231. intel_gmch_panel_fitting(intel_crtc, pipe_config,
  232. intel_connector->panel.fitting_mode);
  233. }
  234. drm_mode_set_crtcinfo(adjusted_mode, 0);
  235. pipe_config->timings_set = true;
  236. /*
  237. * XXX: It would be nice to support lower refresh rates on the
  238. * panels to reduce power consumption, and perhaps match the
  239. * user's requested refresh rate.
  240. */
  241. return true;
  242. }
  243. static void intel_lvds_mode_set(struct drm_encoder *encoder,
  244. struct drm_display_mode *mode,
  245. struct drm_display_mode *adjusted_mode)
  246. {
  247. /*
  248. * The LVDS pin pair will already have been turned on in the
  249. * intel_crtc_mode_set since it has a large impact on the DPLL
  250. * settings.
  251. */
  252. }
  253. /**
  254. * Detect the LVDS connection.
  255. *
  256. * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
  257. * connected and closed means disconnected. We also send hotplug events as
  258. * needed, using lid status notification from the input layer.
  259. */
  260. static enum drm_connector_status
  261. intel_lvds_detect(struct drm_connector *connector, bool force)
  262. {
  263. struct drm_device *dev = connector->dev;
  264. enum drm_connector_status status;
  265. status = intel_panel_detect(dev);
  266. if (status != connector_status_unknown)
  267. return status;
  268. return connector_status_connected;
  269. }
  270. /**
  271. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  272. */
  273. static int intel_lvds_get_modes(struct drm_connector *connector)
  274. {
  275. struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
  276. struct drm_device *dev = connector->dev;
  277. struct drm_display_mode *mode;
  278. /* use cached edid if we have one */
  279. if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  280. return drm_add_edid_modes(connector, lvds_connector->base.edid);
  281. mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
  282. if (mode == NULL)
  283. return 0;
  284. drm_mode_probed_add(connector, mode);
  285. return 1;
  286. }
  287. static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
  288. {
  289. DRM_INFO("Skipping forced modeset for %s\n", id->ident);
  290. return 1;
  291. }
  292. /* The GPU hangs up on these systems if modeset is performed on LID open */
  293. static const struct dmi_system_id intel_no_modeset_on_lid[] = {
  294. {
  295. .callback = intel_no_modeset_on_lid_dmi_callback,
  296. .ident = "Toshiba Tecra A11",
  297. .matches = {
  298. DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
  299. DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
  300. },
  301. },
  302. { } /* terminating entry */
  303. };
  304. /*
  305. * Lid events. Note the use of 'modeset':
  306. * - we set it to MODESET_ON_LID_OPEN on lid close,
  307. * and set it to MODESET_DONE on open
  308. * - we use it as a "only once" bit (ie we ignore
  309. * duplicate events where it was already properly set)
  310. * - the suspend/resume paths will set it to
  311. * MODESET_SUSPENDED and ignore the lid open event,
  312. * because they restore the mode ("lid open").
  313. */
  314. static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
  315. void *unused)
  316. {
  317. struct intel_lvds_connector *lvds_connector =
  318. container_of(nb, struct intel_lvds_connector, lid_notifier);
  319. struct drm_connector *connector = &lvds_connector->base.base;
  320. struct drm_device *dev = connector->dev;
  321. struct drm_i915_private *dev_priv = dev->dev_private;
  322. if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
  323. return NOTIFY_OK;
  324. mutex_lock(&dev_priv->modeset_restore_lock);
  325. if (dev_priv->modeset_restore == MODESET_SUSPENDED)
  326. goto exit;
  327. /*
  328. * check and update the status of LVDS connector after receiving
  329. * the LID nofication event.
  330. */
  331. connector->status = connector->funcs->detect(connector, false);
  332. /* Don't force modeset on machines where it causes a GPU lockup */
  333. if (dmi_check_system(intel_no_modeset_on_lid))
  334. goto exit;
  335. if (!acpi_lid_open()) {
  336. /* do modeset on next lid open event */
  337. dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
  338. goto exit;
  339. }
  340. if (dev_priv->modeset_restore == MODESET_DONE)
  341. goto exit;
  342. drm_modeset_lock_all(dev);
  343. intel_modeset_setup_hw_state(dev, true);
  344. drm_modeset_unlock_all(dev);
  345. dev_priv->modeset_restore = MODESET_DONE;
  346. exit:
  347. mutex_unlock(&dev_priv->modeset_restore_lock);
  348. return NOTIFY_OK;
  349. }
  350. /**
  351. * intel_lvds_destroy - unregister and free LVDS structures
  352. * @connector: connector to free
  353. *
  354. * Unregister the DDC bus for this connector then free the driver private
  355. * structure.
  356. */
  357. static void intel_lvds_destroy(struct drm_connector *connector)
  358. {
  359. struct intel_lvds_connector *lvds_connector =
  360. to_lvds_connector(connector);
  361. if (lvds_connector->lid_notifier.notifier_call)
  362. acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
  363. if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  364. kfree(lvds_connector->base.edid);
  365. intel_panel_fini(&lvds_connector->base.panel);
  366. drm_sysfs_connector_remove(connector);
  367. drm_connector_cleanup(connector);
  368. kfree(connector);
  369. }
  370. static int intel_lvds_set_property(struct drm_connector *connector,
  371. struct drm_property *property,
  372. uint64_t value)
  373. {
  374. struct intel_connector *intel_connector = to_intel_connector(connector);
  375. struct drm_device *dev = connector->dev;
  376. if (property == dev->mode_config.scaling_mode_property) {
  377. struct drm_crtc *crtc;
  378. if (value == DRM_MODE_SCALE_NONE) {
  379. DRM_DEBUG_KMS("no scaling not supported\n");
  380. return -EINVAL;
  381. }
  382. if (intel_connector->panel.fitting_mode == value) {
  383. /* the LVDS scaling property is not changed */
  384. return 0;
  385. }
  386. intel_connector->panel.fitting_mode = value;
  387. crtc = intel_attached_encoder(connector)->base.crtc;
  388. if (crtc && crtc->enabled) {
  389. /*
  390. * If the CRTC is enabled, the display will be changed
  391. * according to the new panel fitting mode.
  392. */
  393. intel_crtc_restore_mode(crtc);
  394. }
  395. }
  396. return 0;
  397. }
  398. static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
  399. .mode_set = intel_lvds_mode_set,
  400. };
  401. static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
  402. .get_modes = intel_lvds_get_modes,
  403. .mode_valid = intel_lvds_mode_valid,
  404. .best_encoder = intel_best_encoder,
  405. };
  406. static const struct drm_connector_funcs intel_lvds_connector_funcs = {
  407. .dpms = intel_connector_dpms,
  408. .detect = intel_lvds_detect,
  409. .fill_modes = drm_helper_probe_single_connector_modes,
  410. .set_property = intel_lvds_set_property,
  411. .destroy = intel_lvds_destroy,
  412. };
  413. static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
  414. .destroy = intel_encoder_destroy,
  415. };
  416. static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
  417. {
  418. DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
  419. return 1;
  420. }
  421. /* These systems claim to have LVDS, but really don't */
  422. static const struct dmi_system_id intel_no_lvds[] = {
  423. {
  424. .callback = intel_no_lvds_dmi_callback,
  425. .ident = "Apple Mac Mini (Core series)",
  426. .matches = {
  427. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  428. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
  429. },
  430. },
  431. {
  432. .callback = intel_no_lvds_dmi_callback,
  433. .ident = "Apple Mac Mini (Core 2 series)",
  434. .matches = {
  435. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  436. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
  437. },
  438. },
  439. {
  440. .callback = intel_no_lvds_dmi_callback,
  441. .ident = "MSI IM-945GSE-A",
  442. .matches = {
  443. DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
  444. DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
  445. },
  446. },
  447. {
  448. .callback = intel_no_lvds_dmi_callback,
  449. .ident = "Dell Studio Hybrid",
  450. .matches = {
  451. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  452. DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
  453. },
  454. },
  455. {
  456. .callback = intel_no_lvds_dmi_callback,
  457. .ident = "Dell OptiPlex FX170",
  458. .matches = {
  459. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  460. DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
  461. },
  462. },
  463. {
  464. .callback = intel_no_lvds_dmi_callback,
  465. .ident = "AOpen Mini PC",
  466. .matches = {
  467. DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
  468. DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
  469. },
  470. },
  471. {
  472. .callback = intel_no_lvds_dmi_callback,
  473. .ident = "AOpen Mini PC MP915",
  474. .matches = {
  475. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  476. DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
  477. },
  478. },
  479. {
  480. .callback = intel_no_lvds_dmi_callback,
  481. .ident = "AOpen i915GMm-HFS",
  482. .matches = {
  483. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  484. DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
  485. },
  486. },
  487. {
  488. .callback = intel_no_lvds_dmi_callback,
  489. .ident = "AOpen i45GMx-I",
  490. .matches = {
  491. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  492. DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
  493. },
  494. },
  495. {
  496. .callback = intel_no_lvds_dmi_callback,
  497. .ident = "Aopen i945GTt-VFA",
  498. .matches = {
  499. DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
  500. },
  501. },
  502. {
  503. .callback = intel_no_lvds_dmi_callback,
  504. .ident = "Clientron U800",
  505. .matches = {
  506. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  507. DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
  508. },
  509. },
  510. {
  511. .callback = intel_no_lvds_dmi_callback,
  512. .ident = "Clientron E830",
  513. .matches = {
  514. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  515. DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
  516. },
  517. },
  518. {
  519. .callback = intel_no_lvds_dmi_callback,
  520. .ident = "Asus EeeBox PC EB1007",
  521. .matches = {
  522. DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
  523. DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
  524. },
  525. },
  526. {
  527. .callback = intel_no_lvds_dmi_callback,
  528. .ident = "Asus AT5NM10T-I",
  529. .matches = {
  530. DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
  531. DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
  532. },
  533. },
  534. {
  535. .callback = intel_no_lvds_dmi_callback,
  536. .ident = "Hewlett-Packard HP t5740e Thin Client",
  537. .matches = {
  538. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  539. DMI_MATCH(DMI_PRODUCT_NAME, "HP t5740e Thin Client"),
  540. },
  541. },
  542. {
  543. .callback = intel_no_lvds_dmi_callback,
  544. .ident = "Hewlett-Packard t5745",
  545. .matches = {
  546. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  547. DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
  548. },
  549. },
  550. {
  551. .callback = intel_no_lvds_dmi_callback,
  552. .ident = "Hewlett-Packard st5747",
  553. .matches = {
  554. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  555. DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
  556. },
  557. },
  558. {
  559. .callback = intel_no_lvds_dmi_callback,
  560. .ident = "MSI Wind Box DC500",
  561. .matches = {
  562. DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
  563. DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
  564. },
  565. },
  566. {
  567. .callback = intel_no_lvds_dmi_callback,
  568. .ident = "Gigabyte GA-D525TUD",
  569. .matches = {
  570. DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
  571. DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
  572. },
  573. },
  574. {
  575. .callback = intel_no_lvds_dmi_callback,
  576. .ident = "Supermicro X7SPA-H",
  577. .matches = {
  578. DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
  579. DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
  580. },
  581. },
  582. {
  583. .callback = intel_no_lvds_dmi_callback,
  584. .ident = "Fujitsu Esprimo Q900",
  585. .matches = {
  586. DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
  587. DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
  588. },
  589. },
  590. { } /* terminating entry */
  591. };
  592. /**
  593. * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
  594. * @dev: drm device
  595. * @connector: LVDS connector
  596. *
  597. * Find the reduced downclock for LVDS in EDID.
  598. */
  599. static void intel_find_lvds_downclock(struct drm_device *dev,
  600. struct drm_display_mode *fixed_mode,
  601. struct drm_connector *connector)
  602. {
  603. struct drm_i915_private *dev_priv = dev->dev_private;
  604. struct drm_display_mode *scan;
  605. int temp_downclock;
  606. temp_downclock = fixed_mode->clock;
  607. list_for_each_entry(scan, &connector->probed_modes, head) {
  608. /*
  609. * If one mode has the same resolution with the fixed_panel
  610. * mode while they have the different refresh rate, it means
  611. * that the reduced downclock is found for the LVDS. In such
  612. * case we can set the different FPx0/1 to dynamically select
  613. * between low and high frequency.
  614. */
  615. if (scan->hdisplay == fixed_mode->hdisplay &&
  616. scan->hsync_start == fixed_mode->hsync_start &&
  617. scan->hsync_end == fixed_mode->hsync_end &&
  618. scan->htotal == fixed_mode->htotal &&
  619. scan->vdisplay == fixed_mode->vdisplay &&
  620. scan->vsync_start == fixed_mode->vsync_start &&
  621. scan->vsync_end == fixed_mode->vsync_end &&
  622. scan->vtotal == fixed_mode->vtotal) {
  623. if (scan->clock < temp_downclock) {
  624. /*
  625. * The downclock is already found. But we
  626. * expect to find the lower downclock.
  627. */
  628. temp_downclock = scan->clock;
  629. }
  630. }
  631. }
  632. if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
  633. /* We found the downclock for LVDS. */
  634. dev_priv->lvds_downclock_avail = 1;
  635. dev_priv->lvds_downclock = temp_downclock;
  636. DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
  637. "Normal clock %dKhz, downclock %dKhz\n",
  638. fixed_mode->clock, temp_downclock);
  639. }
  640. }
  641. /*
  642. * Enumerate the child dev array parsed from VBT to check whether
  643. * the LVDS is present.
  644. * If it is present, return 1.
  645. * If it is not present, return false.
  646. * If no child dev is parsed from VBT, it assumes that the LVDS is present.
  647. */
  648. static bool lvds_is_present_in_vbt(struct drm_device *dev,
  649. u8 *i2c_pin)
  650. {
  651. struct drm_i915_private *dev_priv = dev->dev_private;
  652. int i;
  653. if (!dev_priv->child_dev_num)
  654. return true;
  655. for (i = 0; i < dev_priv->child_dev_num; i++) {
  656. struct child_device_config *child = dev_priv->child_dev + i;
  657. /* If the device type is not LFP, continue.
  658. * We have to check both the new identifiers as well as the
  659. * old for compatibility with some BIOSes.
  660. */
  661. if (child->device_type != DEVICE_TYPE_INT_LFP &&
  662. child->device_type != DEVICE_TYPE_LFP)
  663. continue;
  664. if (intel_gmbus_is_port_valid(child->i2c_pin))
  665. *i2c_pin = child->i2c_pin;
  666. /* However, we cannot trust the BIOS writers to populate
  667. * the VBT correctly. Since LVDS requires additional
  668. * information from AIM blocks, a non-zero addin offset is
  669. * a good indicator that the LVDS is actually present.
  670. */
  671. if (child->addin_offset)
  672. return true;
  673. /* But even then some BIOS writers perform some black magic
  674. * and instantiate the device without reference to any
  675. * additional data. Trust that if the VBT was written into
  676. * the OpRegion then they have validated the LVDS's existence.
  677. */
  678. if (dev_priv->opregion.vbt)
  679. return true;
  680. }
  681. return false;
  682. }
  683. static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
  684. {
  685. DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
  686. return 1;
  687. }
  688. static const struct dmi_system_id intel_dual_link_lvds[] = {
  689. {
  690. .callback = intel_dual_link_lvds_callback,
  691. .ident = "Apple MacBook Pro (Core i5/i7 Series)",
  692. .matches = {
  693. DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
  694. DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
  695. },
  696. },
  697. { } /* terminating entry */
  698. };
  699. bool intel_is_dual_link_lvds(struct drm_device *dev)
  700. {
  701. struct intel_encoder *encoder;
  702. struct intel_lvds_encoder *lvds_encoder;
  703. list_for_each_entry(encoder, &dev->mode_config.encoder_list,
  704. base.head) {
  705. if (encoder->type == INTEL_OUTPUT_LVDS) {
  706. lvds_encoder = to_lvds_encoder(&encoder->base);
  707. return lvds_encoder->is_dual_link;
  708. }
  709. }
  710. return false;
  711. }
  712. static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
  713. {
  714. struct drm_device *dev = lvds_encoder->base.base.dev;
  715. unsigned int val;
  716. struct drm_i915_private *dev_priv = dev->dev_private;
  717. /* use the module option value if specified */
  718. if (i915_lvds_channel_mode > 0)
  719. return i915_lvds_channel_mode == 2;
  720. if (dmi_check_system(intel_dual_link_lvds))
  721. return true;
  722. /* BIOS should set the proper LVDS register value at boot, but
  723. * in reality, it doesn't set the value when the lid is closed;
  724. * we need to check "the value to be set" in VBT when LVDS
  725. * register is uninitialized.
  726. */
  727. val = I915_READ(lvds_encoder->reg);
  728. if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
  729. val = dev_priv->bios_lvds_val;
  730. return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
  731. }
  732. static bool intel_lvds_supported(struct drm_device *dev)
  733. {
  734. /* With the introduction of the PCH we gained a dedicated
  735. * LVDS presence pin, use it. */
  736. if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
  737. return true;
  738. /* Otherwise LVDS was only attached to mobile products,
  739. * except for the inglorious 830gm */
  740. if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
  741. return true;
  742. return false;
  743. }
  744. /**
  745. * intel_lvds_init - setup LVDS connectors on this device
  746. * @dev: drm device
  747. *
  748. * Create the connector, register the LVDS DDC bus, and try to figure out what
  749. * modes we can display on the LVDS panel (if present).
  750. */
  751. bool intel_lvds_init(struct drm_device *dev)
  752. {
  753. struct drm_i915_private *dev_priv = dev->dev_private;
  754. struct intel_lvds_encoder *lvds_encoder;
  755. struct intel_encoder *intel_encoder;
  756. struct intel_lvds_connector *lvds_connector;
  757. struct intel_connector *intel_connector;
  758. struct drm_connector *connector;
  759. struct drm_encoder *encoder;
  760. struct drm_display_mode *scan; /* *modes, *bios_mode; */
  761. struct drm_display_mode *fixed_mode = NULL;
  762. struct edid *edid;
  763. struct drm_crtc *crtc;
  764. u32 lvds;
  765. int pipe;
  766. u8 pin;
  767. if (!intel_lvds_supported(dev))
  768. return false;
  769. /* Skip init on machines we know falsely report LVDS */
  770. if (dmi_check_system(intel_no_lvds))
  771. return false;
  772. pin = GMBUS_PORT_PANEL;
  773. if (!lvds_is_present_in_vbt(dev, &pin)) {
  774. DRM_DEBUG_KMS("LVDS is not present in VBT\n");
  775. return false;
  776. }
  777. if (HAS_PCH_SPLIT(dev)) {
  778. if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
  779. return false;
  780. if (dev_priv->edp.support) {
  781. DRM_DEBUG_KMS("disable LVDS for eDP support\n");
  782. return false;
  783. }
  784. }
  785. lvds_encoder = kzalloc(sizeof(struct intel_lvds_encoder), GFP_KERNEL);
  786. if (!lvds_encoder)
  787. return false;
  788. lvds_connector = kzalloc(sizeof(struct intel_lvds_connector), GFP_KERNEL);
  789. if (!lvds_connector) {
  790. kfree(lvds_encoder);
  791. return false;
  792. }
  793. lvds_encoder->attached_connector = lvds_connector;
  794. intel_encoder = &lvds_encoder->base;
  795. encoder = &intel_encoder->base;
  796. intel_connector = &lvds_connector->base;
  797. connector = &intel_connector->base;
  798. drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
  799. DRM_MODE_CONNECTOR_LVDS);
  800. drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
  801. DRM_MODE_ENCODER_LVDS);
  802. intel_encoder->enable = intel_enable_lvds;
  803. intel_encoder->pre_pll_enable = intel_pre_pll_enable_lvds;
  804. intel_encoder->compute_config = intel_lvds_compute_config;
  805. intel_encoder->disable = intel_disable_lvds;
  806. intel_encoder->get_hw_state = intel_lvds_get_hw_state;
  807. intel_connector->get_hw_state = intel_connector_get_hw_state;
  808. intel_connector_attach_encoder(intel_connector, intel_encoder);
  809. intel_encoder->type = INTEL_OUTPUT_LVDS;
  810. intel_encoder->cloneable = false;
  811. if (HAS_PCH_SPLIT(dev))
  812. intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  813. else if (IS_GEN4(dev))
  814. intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
  815. else
  816. intel_encoder->crtc_mask = (1 << 1);
  817. drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
  818. drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
  819. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  820. connector->interlace_allowed = false;
  821. connector->doublescan_allowed = false;
  822. if (HAS_PCH_SPLIT(dev)) {
  823. lvds_encoder->reg = PCH_LVDS;
  824. } else {
  825. lvds_encoder->reg = LVDS;
  826. }
  827. /* create the scaling mode property */
  828. drm_mode_create_scaling_mode_property(dev);
  829. drm_object_attach_property(&connector->base,
  830. dev->mode_config.scaling_mode_property,
  831. DRM_MODE_SCALE_ASPECT);
  832. intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
  833. /*
  834. * LVDS discovery:
  835. * 1) check for EDID on DDC
  836. * 2) check for VBT data
  837. * 3) check to see if LVDS is already on
  838. * if none of the above, no panel
  839. * 4) make sure lid is open
  840. * if closed, act like it's not there for now
  841. */
  842. /*
  843. * Attempt to get the fixed panel mode from DDC. Assume that the
  844. * preferred mode is the right one.
  845. */
  846. edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
  847. if (edid) {
  848. if (drm_add_edid_modes(connector, edid)) {
  849. drm_mode_connector_update_edid_property(connector,
  850. edid);
  851. } else {
  852. kfree(edid);
  853. edid = ERR_PTR(-EINVAL);
  854. }
  855. } else {
  856. edid = ERR_PTR(-ENOENT);
  857. }
  858. lvds_connector->base.edid = edid;
  859. if (IS_ERR_OR_NULL(edid)) {
  860. /* Didn't get an EDID, so
  861. * Set wide sync ranges so we get all modes
  862. * handed to valid_mode for checking
  863. */
  864. connector->display_info.min_vfreq = 0;
  865. connector->display_info.max_vfreq = 200;
  866. connector->display_info.min_hfreq = 0;
  867. connector->display_info.max_hfreq = 200;
  868. }
  869. list_for_each_entry(scan, &connector->probed_modes, head) {
  870. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  871. DRM_DEBUG_KMS("using preferred mode from EDID: ");
  872. drm_mode_debug_printmodeline(scan);
  873. fixed_mode = drm_mode_duplicate(dev, scan);
  874. if (fixed_mode) {
  875. intel_find_lvds_downclock(dev, fixed_mode,
  876. connector);
  877. goto out;
  878. }
  879. }
  880. }
  881. /* Failed to get EDID, what about VBT? */
  882. if (dev_priv->lfp_lvds_vbt_mode) {
  883. DRM_DEBUG_KMS("using mode from VBT: ");
  884. drm_mode_debug_printmodeline(dev_priv->lfp_lvds_vbt_mode);
  885. fixed_mode = drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
  886. if (fixed_mode) {
  887. fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  888. goto out;
  889. }
  890. }
  891. /*
  892. * If we didn't get EDID, try checking if the panel is already turned
  893. * on. If so, assume that whatever is currently programmed is the
  894. * correct mode.
  895. */
  896. /* Ironlake: FIXME if still fail, not try pipe mode now */
  897. if (HAS_PCH_SPLIT(dev))
  898. goto failed;
  899. lvds = I915_READ(LVDS);
  900. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  901. crtc = intel_get_crtc_for_pipe(dev, pipe);
  902. if (crtc && (lvds & LVDS_PORT_EN)) {
  903. fixed_mode = intel_crtc_mode_get(dev, crtc);
  904. if (fixed_mode) {
  905. DRM_DEBUG_KMS("using current (BIOS) mode: ");
  906. drm_mode_debug_printmodeline(fixed_mode);
  907. fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  908. goto out;
  909. }
  910. }
  911. /* If we still don't have a mode after all that, give up. */
  912. if (!fixed_mode)
  913. goto failed;
  914. out:
  915. lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
  916. DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
  917. lvds_encoder->is_dual_link ? "dual" : "single");
  918. /*
  919. * Unlock registers and just
  920. * leave them unlocked
  921. */
  922. if (HAS_PCH_SPLIT(dev)) {
  923. I915_WRITE(PCH_PP_CONTROL,
  924. I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
  925. } else {
  926. I915_WRITE(PP_CONTROL,
  927. I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
  928. }
  929. lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
  930. if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
  931. DRM_DEBUG_KMS("lid notifier registration failed\n");
  932. lvds_connector->lid_notifier.notifier_call = NULL;
  933. }
  934. drm_sysfs_connector_add(connector);
  935. intel_panel_init(&intel_connector->panel, fixed_mode);
  936. intel_panel_setup_backlight(connector);
  937. return true;
  938. failed:
  939. DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
  940. drm_connector_cleanup(connector);
  941. drm_encoder_cleanup(encoder);
  942. if (fixed_mode)
  943. drm_mode_destroy(dev, fixed_mode);
  944. kfree(lvds_encoder);
  945. kfree(lvds_connector);
  946. return false;
  947. }